AON6240
40V N-Channel MOSFET
General Description Product Summary
V
DS
I
D
(at V
GS
=10V) 85A
R
DS(ON)
(at V
GS
=10V) < 1.6mΩ
R
DS(ON)
(at V
GS
= 4.5V) < 2.4mΩ
100% UIS Tested
100% R
g
Tested
Symbol
V
DS
40V
Drain-Source Voltage
The AON6240 uses trench MOSFET technology that is
uniquely optimized to provide the most efficient high
frequency switching performance.Power losses are
minimized due to an extremely low combination of
R
DS(ON)
and Crss.In addition,switching behavior is well
controlled with a "Schottky style" soft recovery body
diode.
V
Maximum Units
Absolute Maximum Ratings T
A
=25°C unless otherwise noted
Parameter
40
G
D
S
Top View
1
2
3
4
8
7
6
5
PIN1
DFN5X6
Top View Bottom View
V
DS
V
GS
I
DM
I
AS
, I
AR
E
AS
, E
AR
T
J
, T
STG
Symbol
t ≤ 10s
Steady-State
Steady-State
R
θJC
Max
33
T
C
=100°C W
T
C
=25°C
W
T
A
=70°C
83
1.5
T
A
=25°C
Power Dissipation
A
P
DSM
°C/W
R
θJA
14
40 17 Units
Junction and Storage Temperature Range
Parameter
2.3
Maximum Junction-to-Ambient
A
-55 to 150 °C
Thermal Characteristics Typ
Drain-Source Voltage
mJ
Continuous Drain
Current
G
V
336
V±20Gate-Source Voltage
40
Avalanche Current
C
22
27
Avalanche energy L=0.1mH
C
A82
Continuous Drain
Current
I
D
85
67
A
T
A
=70°C
A
T
A
=25°C I
DSM
Maximum Junction-to-Case °C/W
°C/W
Maximum Junction-to-Ambient
155
1.5
T
C
=25°C
T
C
=100°C 355Pulsed Drain Current
C
Power Dissipation
B
P
D
G
D
S
Top View
1
2
3
4
8
7
6
5
PIN1
DFN5X6
Top View Bottom View
Rev 0: February 2011
www.aosmd.com Page 1 of 6
AON6240
Symbol Min Typ Max Units
BV
DSS
40 V
V
DS
=40V, V
GS
=0V 1
T
J
=55°C 5
I
GSS
100 nA
V
GS(th)
Gate Threshold Voltage 1.3 1.9 2.4 V
I
D(ON)
355 A
1.3 1.6
T
J
=125°C 2.1 2.7
1.8 2.4 mΩ
g
FS
166 S
V
SD
0.7 1 V
I
S
85 A
C
iss
4360 5458 6550 pF
C
oss
970 1395 1815 pF
C
rss
30 103 176 pF
R
g
0.5 1.0 1.6 Ω
Q
g
(10V) 58 72.8 88 nC
Q
g
(4.5V) 24 31 44 nC
Q
gs
14.8 nC
Q
gd
10.8 nC
t
D(on)
14.8 ns
t
5.5
Gate Drain Charge
I
S
=1A,V
GS
=0V
SWITCHING PARAMETERS
Total Gate Charge
Maximum Body-Diode Continuous Current
G
Input Capacitance
Output Capacitance
Turn-On DelayTime
DYNAMIC PARAMETERS
Turn-On Rise Time
Total Gate Charge
Electrical Characteristics (T
J
=25°C unless otherwise noted)
STATIC PARAMETERS Parameter Conditions
Zero Gate Voltage Drain Current
I
D
=250µA, V
GS
=0V
V
GS
=10V, V
DS
=5V
Gate-Body leakage current
Drain-Source Breakdown Voltage
R
DS(ON)
Static Drain-Source On-Resistance
I
DSS
V
GS
=4.5V, I
D
=20A
V
GS
=10V, I
D
=20A
On state drain current
V
=10V, V
=20V, R
=1
Ω
,
Gate resistance V
GS
=0V, V
DS
=0V, f=1MHz
µA
V
DS
=V
GS
I
D
=250µA
V
DS
=0V, V
GS
= ±20V
mΩ
Reverse Transfer Capacitance V
GS
=0V, V
DS
=20V, f=1MHz
Forward Transconductance
Diode Forward Voltage V
DS
=5V, I
D
=20A
V
GS
=10V, V
DS
=20V, I
D
=20A
Gate Source Charge
t
r
5.5
t
D(off)
61.3 ns
t
f
10 ns
t
rr
16 23.9 31 ns
Q
rr
59 84.6 110 nC
THIS PRODUCT HAS BEEN DESIGNED AND QUALIFIED FOR THE CONSUMER MARKET. APPLICATIONS OR USES AS CRITICAL
COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING
OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN,
FUNCTIONS AND RELIABILITY WITHOUT NOTICE.
Body Diode Reverse Recovery Charge I
F
=20A, dI/dt=500A/µs
Turn-Off DelayTime
I
F
=20A, dI/dt=500A/µs
Body Diode Reverse Recovery Time
Turn-On Rise Time
V
GS
=10V, V
DS
=20V, R
L
=1
Ω
,
R
GEN
=3Ω
Turn-Off Fall Time
A. The value of RθJA is measured with the device mounted on 1in2FR-4 board with 2oz. Copper, in a still air environment with TA=25°C. The
Power dissipation PDSM is based on R θJA and the maximum allowed junction temperature of 150°C. The value in any given application depends
on the user's specific board design.
B. The power dissipation PDis based on TJ(MAX)=150°C, using junction-to-case thermal resistance, and is more useful in setting the upper
dissipation limit for cases where additional heatsinking is used.
C. Repetitive rating, pulse width limited by junction temperature TJ(MAX)=150°C. Ratings are based on low frequency and duty cycles to keep
initial TJ =25°C.
D. The RθJA is the sum of the thermal impedence from junction to case RθJC and case to ambient.
E. The static characteristics in Figures 1 to 6 are obtained using <300µs pulses, duty cycle 0.5% max.
F. These curves are based on the junction-to-case thermal impedence which is measured with the device mounted to a large heatsink, assuming
a maximum junction temperature of TJ(MAX)=150°C. The SOA curve provides a single pulse rating.
G. The maximum current rating is package limited.
H. These tests are performed with the device mounted on 1 in2FR-4 board with 2oz. Copper, in a still air environment with TA=25°C.
Rev 0: February 2011 www.aosmd.com Page 2 of 6
AON6240
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
0
10
20
30
40
50
60
0 1 2 3 4 5 6
ID(A)
VGS(Volts)
Figure 2: Transfer Characteristics (Note E)
0
1
2
3
4
0 5 10 15 20 25 30
RDS(ON) (mΩ
Ω
Ω
Ω)
ID(A)
Figure 3: On-Resistance vs. Drain Current and Gate
Voltage (Note E)
0.8
1
1.2
1.4
1.6
1.8
2
0 25 50 75 100 125 150 175 200
Normalized On-Resistance
Temperature (°C)
Figure 4: On-Resistance vs. Junction Temperature
(Note E)
VGS=4.5V
ID=20A
VGS=10V
ID=20A
25°C
125°C
V
DS
=5V
VGS=4.5V
VGS=10V
0
10
20
30
40
50
60
012345
ID(A)
VDS (Volts)
Fig 1: On-Region Characteristics (Note E)
V
GS
=2.5V
3V
4.5V
10V
0
10
20
30
40
50
60
0 1 2 3 4 5 6
ID(A)
VGS(Volts)
Figure 2: Transfer Characteristics (Note E)
0
1
2
3
4
0 5 10 15 20 25 30
RDS(ON) (mΩ
Ω
Ω
Ω)
ID(A)
Figure 3: On-Resistance vs. Drain Current and Gate
Voltage (Note E)
1.0E-04
1.0E-03
1.0E-02
1.0E-01
1.0E+00
1.0E+01
1.0E+02
0.0 0.2 0.4 0.6 0.8 1.0 1.2
IS(A)
VSD (Volts)
Figure 6: Body-Diode Characteristics (Note E)
25°C
125°C
0.8
1
1.2
1.4
1.6
1.8
2
0 25 50 75 100 125 150 175 200
Normalized On-Resistance
Temperature (°C)
Figure 4: On-Resistance vs. Junction Temperature
(Note E)
VGS=4.5V
ID=20A
VGS=10V
ID=20A
0
1
2
3
4
5
2 4 6 8 10
RDS(ON) (mΩ
Ω
Ω
Ω)
VGS (Volts)
Figure 5: On-Resistance vs. Gate-Source Voltage
(Note E)
25°C
125°C
V
DS
=5V
VGS=4.5V
VGS=10V
ID=20A
25°C
125°C
0
10
20
30
40
50
60
012345
ID(A)
VDS (Volts)
Fig 1: On-Region Characteristics (Note E)
V
GS
=2.5V
3V
4.5V
10V
Rev 0: February 2011 www.aosmd.com Page 3 of 6
AON6240
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
0.0
0.1
1.0
10.0
100.0
1000.0
0.01 0.1 1 10 100
ID(Amps)
VDS (Volts)
Figure 9: Maximum Forward Biased Safe
Operating Area (Note F)
10
µ
s
10ms
1ms
DC
RDS(ON)
limited
TJ(Max)=150°C
T
C
=25°C
100
µ
s
0
2
4
6
8
10
0 10 20 30 40 50 60 70 80 90
VGS (Volts)
Qg(nC)
Figure 7: Gate-Charge Characteristics
0
1000
2000
3000
4000
5000
6000
7000
0 5 10 15 20 25
Capacitance (pF)
VDS (Volts)
Figure 8: Capacitance Characteristics
Ciss
Coss
C
rss
VDS=20V
ID=20A
TJ(Max)=150°C
TC=25°C
0
40
80
120
160
200
240
280
320
360
400
0.0001 0.001 0.01 0.1 1 10
Power (W)
Pulse Width (s)
Figure 10: Single Pulse Power Rating Junction-to-
Case (Note F)
0.0
0.1
1.0
10.0
100.0
1000.0
0.01 0.1 1 10 100
ID(Amps)
VDS (Volts)
Figure 9: Maximum Forward Biased Safe
Operating Area (Note F)
10
µ
s
10ms
1ms
DC
RDS(ON)
limited
TJ(Max)=150°C
T
C
=25°C
100
µ
s
0
2
4
6
8
10
0 10 20 30 40 50 60 70 80 90
VGS (Volts)
Qg(nC)
Figure 7: Gate-Charge Characteristics
0
1000
2000
3000
4000
5000
6000
7000
0 5 10 15 20 25
Capacitance (pF)
VDS (Volts)
Figure 8: Capacitance Characteristics
Ciss
0.01
0.1
1
10
0.00001 0.0001 0.001 0.01 0.1 1 10 100
Zθ
θ
θ
θJC Normalized Transient
Thermal Resistance
Pulse Width (s)
Figure 11: Normalized Maximum Transient Thermal Impedance (Note F)
Coss
C
rss
VDS=20V
ID=20A
Single Pulse
D=Ton/T
TJ,PK=TC+PDM.ZθJC.RθJC
T
on
T
P
D
In descending order
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse
TJ(Max)=150°C
TC=25°C
RθJC=1.5°C/W
0
40
80
120
160
200
240
280
320
360
400
0.0001 0.001 0.01 0.1 1 10
Power (W)
Pulse Width (s)
Figure 10: Single Pulse Power Rating Junction-to-
Case (Note F)
Rev 0: February 2011 www.aosmd.com Page 4 of 6
AON6240
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
0
10
20
30
40
50
60
70
80
90
100
0 25 50 75 100 125 150
Power Dissipation (W)
TCASE (°
°°
°C)
Figure 13: Power De-rating (Note F)
0
10
20
30
40
50
60
70
80
90
100
0 25 50 75 100 125 150
Current rating ID(A)
TCASE (°
°°
°C)
Figure 14: Current De-rating (Note F)
1
10
100
1000
10000
0.00001 0.001 0.1 10 1000
Power (W)
Pulse Width (s)
Figure 15: Single Pulse Power Rating Junction-to-
Ambient (Note H)
TA=25°C
1.0
10.0
100.0
1000.0
1 10 100 1000
IAR (A) Peak Avalanche Current
Time in avalanche, tA(µ
µµ
µs)
Figure 12: Single Pulse Avalanche capability
(Note C)
TA=25°C
TA=150°C
TA=100°C
TA=125°C
0.001
0.01
0.1
1
10
0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000
Zθ
θ
θ
θJA Normalized Transient
Thermal Resistance
Pulse Width (s)
Figure 16: Normalized Maximum Transient Thermal Impedance (Note H)
Single Pulse
D=Ton/T
TJ,PK=TA+PDM.ZθJA.RθJA
T
on
T
P
D
In descending order
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse
0
10
20
30
40
50
60
70
80
90
100
0 25 50 75 100 125 150
Power Dissipation (W)
TCASE (°
°°
°C)
Figure 13: Power De-rating (Note F)
0
10
20
30
40
50
60
70
80
90
100
0 25 50 75 100 125 150
Current rating ID(A)
TCASE (°
°°
°C)
Figure 14: Current De-rating (Note F)
1
10
100
1000
10000
0.00001 0.001 0.1 10 1000
Power (W)
Pulse Width (s)
Figure 15: Single Pulse Power Rating Junction-to-
Ambient (Note H)
TA=25°C
RθJA=55°C/W
1.0
10.0
100.0
1000.0
1 10 100 1000
IAR (A) Peak Avalanche Current
Time in avalanche, tA(µ
µµ
µs)
Figure 12: Single Pulse Avalanche capability
(Note C)
TA=25°C
TA=150°C
TA=100°C
TA=125°C
Rev 0: February 2011 www.aosmd.com Page 5 of 6
AON6240
-
+
VDC
Ig
Vds
DUT
-
+
VDC
Vgs
Vgs
10V
Qg
Qgs Qgd
Charge
Gate Charge Test Circuit & Waveform
-
+
VDC
DUT Vdd
Vgs
Vds
Vgs
RL
Rg
Vgs
Vds
10%
90%
Resistive Switching Test Circuit & Waveforms
t t
r
d(on)
t
on
t
d(off)
t
f
t
off
Id
+
L
Vgs
Vds
BV
Unclamped Inductive Switching (UIS) Test Circuit & Waveforms
Vds
DSS
2
E = 1/2 LI
AR
AR
-
+
VDC
Ig
Vds
DUT
-
+
VDC
Vgs
Vgs
10V
Qg
Qgs Qgd
Charge
Gate Charge Test Circuit & Waveform
-
+
VDC
DUT Vdd
Vgs
Vds
Vgs
RL
Rg
Vgs
Vds
10%
90%
Resistive Switching Test Circuit & Waveforms
t t
r
d(on)
t
on
t
d(off)
t
f
t
off
Vdd
Vgs
Id
Vgs
Rg
DUT
-
+
VDC
L
Vgs
Vds
Id
Vgs
BV
I
Unclamped Inductive Switching (UIS) Test Circuit & Waveforms
Ig
Vgs
-
+
VDC
DUT
L
Vds
Vgs
Vds
Isd
Isd
Diode Recovery Test Circuit & Waveforms
Vds -
Vds +
I
F
AR
DSS
2
E = 1/2 LI
dI/dt
I
RM
rr
Vdd
Vdd
Q = - Idt
AR
AR
t
rr
Rev 0: February 2011 www.aosmd.com Page 6 of 6