SSP-21116 - Data Device Corporation

Data Device Cor poration

105 Wilbur Place

Bohemia, New York 11716

631-567-5600 Fax: 631-567-7358

www.ddc-web.com

FOR MORE INFORMATION CONTACT:

Technical Suppor t:

1-800-DDC-5757 ext. 7382

FEATURES

•True I2T Protection

•Isolated Control Circuitry

•Status Outputs

•Instant Trip Protection

•Leakage Clamp

•Low Power Dissipation

•Solid-State Reliability

DESCRIPTION

The SSP-21116 Series of 270 Volt, dc, Solid-State Power Controllers

(SSPC’s) replace electromagnetic circuit breakers and solid-state

rela ys rated at 10 and 15 amperes.These SSPC’ s off er status outputs

and permit exter nal input logic control so that they may be remotely

located near to the load.There are two models in the series, differ ing

only in rated current, so that fault and I2T trip characteristics can be

selected to protect wiring and loads.

Using Power MOSFET switches, these Power Controllers offer low

"on" resistance, low voltage drop, high "off" impedance, and low

power dissipation. Built with Power MOSFET’s and custom mono-

lithics and using thick film hybrid technology, they off er small siz e , lo w

power and high reliability.

Built-In-Test (BIT) has been provided to monitor, in real time, the sta-

tus of the internal circuitr y as well as circuitry external to the SSPC.

This BIT monitors MOSFET failure and control circuit failure.

The SSP-21116 Series will operate over the full militar y temperature

range from -55°C to +125°C with no thermal derating (see ordering

information).

APPLICATIONS

Designed to replace circuit breakers in land, air and space vehicles,

these Solid-State Power Controllers provide status outputs for light

and heavy overloads as well as minimum load current.

SSP-21116

270 VDC SOLID-STATE POWER

CONTROLLERS

Make sure the next

Card you purchase

has...

All trademarks are the proper ty of their respective owners.

Data Device Cor poration

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FIGURE 1. SSP-21116 BLOCK DIAGRAM

VCC1 VCC2

MOSFET

DRIVER,

SHORT

CIRCUIT

CONTROL,

VEE1

VBIAS SUPPLY

INPUT

STATUS

CIRCUIT,

AND

ISOLATED

CONTROL

CIRCUIT

STATUS1

STATUS2

VBIAS SUPPLY

COMMON

LATCHES

INTERNAL

POWER

SUPPLIES

SENSE

POWER IN

POWER OUT

SLEW

CONTROL

HIGH SIDE

SWITCH CONFIG. LOW SIDE

SWITCH CONFIG.

+270 Vdc +270 Vdc

LOAD

SYSTEM

GND

POWER IN

POWER OUT

SLEW

CONTROL

CMD

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+150°CJunction Temperature

-1000 to +1000VdcPin-to-case -0.5 to +7.0VdcV Bias voltage (see note 4)

Vdc

VALUE

UNIT

PARAMETER

TABLE 1. ABSOLUTE MAXIMUM RATINGS

PARAMETER UNIT VALUE

Vdc

+60.0 to +300.0

0 to V Bias

-300 to +300

V Bias voltage (see note 4) Vdc +4.5 to +5.5

TABLE 2. RECOMMENDED OPERATING CONDITIONS

Power Input To Power Ground

Control Input To Signal Ground

Power Ground To Signal Ground

450 continuous

500 Volts, 50ms transient

-0.5 to +7.0

-1000 to +1000

Power Input To Power Ground

Control Input To Signal Ground

Power Ground To Signal Ground

TABLE 3. SSP-21116 SPECIFICATIONS

(SEE NOTES 1 AND 2)

PARAMETER CONDITIONS UNIT VALUE

CONTROL CIRCUIT

Logic Type TTL/CMOS

compatible

V Bias Supply Current VCC = 4.5 to 5.5Vdc mA 25 typ

Control Turn-On V oltage V2.0 to 5.5

Control Turn-Off V oltage V-0.5 to 0.8

Control Input Current control voltage = 5.0V µA50 max

Control Input Current control voltage = 2.4V µA50 max

Control Input Current control voltage = 0.8V µA-50 min

Status Output Voltage VCC= 4.5V, IOL= 2.5mA V0.4 max

Status Output Voltage VCC= 4.5V, IOH= -1.0mA V2.4 min

Status Truth Table see TABLE 5

POWER CIRCUIT

Power Out Voltage with

Switch OFF Power In = 60 - 300V

No Load V30 max

Max. Continuous Current See Table 4

“On” Resistance See Table 4

Power Dissipation See Table 4

Power Out Leakage

Current to Power Ground Power In = 60 - 300V

(see note 2 ) mA/A 0.1 max

Max Load Capacitance

for Start-Up Power In = 60 - 300V

(see note 2 ) µF/A 4 typ

Signal to Neutral Ground

Isolation at 100Vdc pF 1000 typ

Output Capacitance see note 2 pF/A 300 typ

Trip Reset Time ms 30 min

Rupture Capacity Unlimited AUnlimited

TABLE 3. SSP-21116 SPECIFICATIONS (CONT.)

(SEE NOTES 1 AND 2)

PARAMETER

POWER CIRCUIT

(CONTINUED)

CONDITIONS UNIT VALUE

Output-to Input Parasitic

Diode, Forward Voltage

at Continuous Current

Power Out Voltage >

Power In Voltage V1.8 max

Isolation Resistance,

Any Pin to Case Pin-to-Case Voltage =

100Vdc MΩ50 min

Isolation Resistance

Power Ground to

Signal Ground

Power Ground to Signal

Ground Voltage =

500Vdc MΩ50 min

Voltage Drop across pins 6&7, 9&10 Vdc see note 3

Trip Characteristics see FIGURE 2

Response Time see FIGURE 3

TEMPERATURE RANGE

Operating (Baseplate)

Storage °C

°C -55 to +85

-55 to +125

THERMAL RESISTANCE

Case to Sink (θCS)

Case to Ambient (θCA)°C/W

°C/W 0.4

Temperature Rise,

Junction-to-Case Rated Load °C 10

PHYSICAL

CHARACTERISTICS

Size

Weight see FIGURE 4 g115

Note: Power Ground = Neutral; Bias Supply Common = Signal Ground

TABLES 1-3 notes:

1. -55°C ≤Case Temperature ≤125°C.

2. “A” is Amps of Rated SSPC Current.

3. For 2A, 5A, and 10A units the value is 1V max; for 115A unit the value is 1.5V

max.

4. An external 0.1µf ceramic capacitor from V Bias to the +5V return ground is

recommended.

TABLE 4. POWER DISSIPATION

PART NUMBER I-MAX*(AMPS) “ON” RESISTANCE

(OHMS)**

POWER

DISSIPATION

(WATTS)**

SSP-21116-015-X

SSP-21116-010-X 15

10 0.085

0.085 19.3

8.7

* I-MAX is the maximum continuous current.

** Specified for -55°C to +105°C; increases 0.6%/°C between +105°C and

+125°C.

Note: Other Amp ratings are available, consult factory.

+300°CLead Temperature (soldering)

Power In to Power Ground V0 to 300

Output-to Input Parasitic

Diode, Continuous

Current Per Amp Of

Rated Current

Power Out Voltage >

Power In Voltage A1.0 typ

Output-to Input Parasitic

Diode, Pulsed Current

Per Amp Of Rated

Current

Power Out Voltage >

Power In Voltage Pulse

Width ≤ 100µSA4.0 typ

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FUNCTIONAL DESCRIPTION

The SSP-21116 series of Solid-State P ower Controllers incorpo-

rate the wire protection feature of electromechanical circuit

breakers and the reliability of solid-state relays.In addition to the

solid-state rela y's input logic compatibility, the SSP-21116 series

provides logic compatible status outputs.

A TTL/CMOS compatible input provides external control of the

power switch's “ON/OFF” state. A logic high on this control input

turns the power to the load “on”. A logic low will turn the power

switch off, which removes power from the load.

In the event of an overload, the SSP-21116 series will trip, just

like a circuit breaker, and automatically remove power from the

load. In order to tur n back on, the control input must be brought

to a logic low, and then returned to a logic high state.

As in a circuit breaker, the SSPC's time to trip depends on the

current level.Slight overloads will cause longer trip times. Heavy

overloads will cause shorter trip times. The fault ("Instant Trip")

and I2T trip cur ve, FIGURE 2, shows the trip time as a function

of current for a single trip or repetitive trips with at least 10 sec-

onds between trip and turn on. Attempts to repeatedly turn on

into an overload will result in the thermal memory shortening

each trip time. This "memor y" protects the wire, load and Solid-

State Power Controller.

The status lines are TTL/CMOS compatible outputs which reflect

the state of the SSPC, the load and the Built-In-Test (BIT) cir-

cuits. The status permits an external subsystem to monitor and

ultimately control the SSPC. TABLE 5 defines the status lines'

states which indicate the various states of the SSPC. Further

explanation of the status lines appears in the applications infor-

mation section.

The SSP-21116 series SSPC's are characterized by their current

rating and maximum "on" resistance listed in TABLE 4. These

parameters are established by the number of Power FET's

placed in parallel within the SSPC.

The trip function is implemented by two separate circuits, a tr ue

I2T trip comparator and a short circuit fault comparator.They are

independent of each other but work together to protect the sys-

tem.

If the load current is less than 110% of rated current, the SSPC

will ne ver trip. If the load current is greater than 145%, the SSPC

will always tr ip.

F or load currents less than 800%, the trip time can be found from

FIGURE 2 by drawing a horizontal line on FIGURE 2 at the cur-

rent le v el of interest.The SSPC will alwa ys trip at a time between

the two curves.This is tr ue I2T tripping.

When the SSPC trips in accordance with the I2T characteristics,

the fall time is 200 µs, maximum.

For load currents greater than 1200%, the SSPC will turn off in

less than 25 µs. Between 800% and 1200%, the SSPC will turn

off in a time less than the "max. trip limit" shown in FIGURE 2

and may turn off in less than 25 µs. When the SSPC turns off

under these fault conditions, the fall time is less than 25 µs.

10,000

1,200

1,000

800

600

400

200

010

1.0

0.10.010.001

µs

145%

TIME - SECONDS

LOAD CURRENT % I - MAX

NEVER TRIP

MIN. TRIP LIMIT

INSTANT

TRIP

ALWAYS TRIP

MAX. TRIP LIMIT

15 AMP I T

10 AMP AND BELOW I T

110%

FIGURE 2.TRIP CHARACTERISTICS

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While the SSPC will always tur n off in less than 25 µs when the

load current is greater than 1200%, the actual current may

“spike” to a value higher than 1200% due to circuit delays. The

MOSFET's inherently self limit the maximum current, depending

on the number of MOSFET's and their rating.

During turn on and turn off the rise and fall time of the output v olt-

age is controlled to be less than 200 µs.This value is a compro-

mise between faster response time with a greater amount of RFI

and EMI generated, and slower response time with less RFI and

EMI but g reater po wer dissipated in the SSPC during transitions .

Since the Power MOSFET switches are not saturated during

transitions the switching power dissipation is much greater than

the static dissipation, and longer transitions result in a larger

temperature rise. If the SSPC is rapidly turned on and off, the

high average dissipation could result in a significant temperature

rise in the SSPC. For this reason do not tur n the SSPC off and

on more rapidly than 30 msec. This will limit the maximum tem-

perature of the switches to a safe level.

The SSP-21116 has been designed to derive its internal power

requirements from the bias supply input (+5 Vdc).

APPLICATIONS INFORMATION

SELECTION

The selection of a proper sized SSPC is essential for protection

of the wire and load. This selection should be based on the

steady state and transient overload currents.

The shape of the trip cur ve (I2T) is selected as optimum to pro-

tect the system wiring. The power dissipated in the wire is the

wire resistance times the load current squared, and the temper-

ature of the wire is determined by the length of time that this

power is being dissipated.This makes the wire temperature pro-

por tional to the current squared times the on time. Since the trip

curve follows this same characteristic the SSPC can accurately

predict the wire temperature rise as a result of overloads and

remove load current before the wiring is damaged from ov ertem-

perature. Of course, the wire I2T product should be greater than

the SSPC I2T product for the SSPC to protect the wire.

PRECAUTIONS

When a short circuit causes turn off of the SSPC, precautions

have to be taken to limit the transient voltages generated by the

wire inductance. The magnitude of this voltage is L*di/dt where

CONTROL INPUT

LOAD CURRENT

TRIP POINT

STATUS 2

STATUS 1

T1 T2 T3 T4 T5 T6 T7 T8 T9 T10 T11 T12 T13

SOLID-STATE POWER CONTROLLER TIMING AT 28 Vdc.

TIME DESCRIPTION MAXIMUM UNIT NOTES

T1-T2 TURN-ON DELAY 350 µs

T2-T3 CURRENT RISE TIME 200 µs

T1-T4 STATUS 1 & STATUS 2 TURN-ON DELAY 7.5 ms

T4-T5 STATUS 1 & STATUS 2 RISE AND FALL TIME 350 ns

T6-T7 TURN-OFF DELAY 350 µs

T7-T8 CURRENT FALL TIME 200 µs

T6-T9 STATUS 1 & STATUS 2 TURN-OFF DELAY 5.0 ms

T10-T11 TRIP TIME AFTER TURN-ON SEE FIG. 2 s

T11-T12 CURRENT FALL TIME AFTER TRIP 200 µsLOAD CURRENT < 800%

T11-T12 CURRENT FALL TIME AFTER TRIP 25 µsLOAD CURRENT > 1200%

T11-T13 TRIP TURN-OFF STATUS 1 DELAY 5.0 ms

FIGURE 3. SOLID-STATE POWER CONTROLLER TIMING

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POWER ON RESET

When the 5 V bias power is first applied, the SSPC will be off

regardless of the CONTROL CMD input. If the CONTROL CMD

input is a logic low, the SSPC is turned on by bringing the CON-

TROL CMD to a logic high. If the CONTROL CMD input is at a

logic high when power is applied, the SSPC may be turned on by

cycling the CONTROL CMD input to a logic low and then to a

logic high. The system controller can be programmed to do this

cycling of the CONTROL CMD input.Subsequent loss of the bias

supply power causes the SSPC to turn off. Re-application of the

bias supply power again causes a power on reset (refer to

optional Power on reset.) Loss of power to the POWER IN ter-

minals does not turn off the SSPC and reapplication of this

power does not cause a power on reset.

STATUS CODES

This section contains a fuller explanation of the conditions and

meaning of the status codes shown in TABLE 5. Each paragraph

number corresponds to the STATE in TABLE 5.

The first four conditions show the control input has commanded

the SSPC to be off.

1) The SSPC has failed or shorted to ground. STATUS 1

indicates the load is drawing current but the SSPC should

be off.

2) The SSPC has failed. STATUS 1 indicates the load is

drawing current; STATUS 2 indicates the Power MOSFET

switch is on; the SSPC should be off.

3) Normal off condition. STATUS 1 indicates the load is not

drawing current; STATUS 2 indicates the Power MOSFET

switch is off.

"L" is the wire inductance in Henries and "di/dt" is the rate of

change of output current. If the SSPC tur ns off in 10 msec from

a 150 amp over load (1000% for 15 amp unit) with a wire induc-

tance of only 33 mH it would generate a spike of 500 volts.This

exceeds the voltage rating of the MOSFET's. In order to provide

protection from these transients, transient voltage

suppressors should be used between the SSPC Slew Control

and the Power In and between the SSPC Slew Control and

Power Out terminals. The rating of the transient voltage sup-

pressors should be selected so that at the maximum expected

short circuit current, the transient voltage suppressor voltage

drop would not exceed the SSPC voltage rating, and the power

to be dissipated can be safely absorbed without transient sup-

pressor failure.

While circuit inductance can cause high voltage transients dur-

ing turn off, lack of circuit inductance can cause current tran-

sients prior to tur n off. If the output of the SSPC is shor ted and

there is no circuit inductance, the current from the source can

rise instantaneously to a high value.The SSPC will limit the cur-

rent to about 30 times its rating (3,000%). Circuit inductance will

limit the rate of rise of this current. The SSPC can take 25 µs to

turn off. The current will always overshoot the 1200% maximum

level of the SSPC due to this 25 µs delay. If the current rises

slowly due to circuit inductance, the overshoot will be negligible;

if the current rises quickly, the overshoot will be more significant.

In any case, the current spike will be less than 25 µs.

In most real applications, there will always be significant circuit

inductance. The problem to guard against is voltage transients,

not current transients.

When testing individual SSPC's, be careful to simulate actual

system conditions.

TABLE 5. STATUS CODES

STATE OUTPUT STATUS 1

(SEE NOTE 2) OUTPUT STATUS 2

(SEE NOTE 3) POWER CONTROLLER AND LOAD STATUS

1 L L L

2 L L H

3 L H L Load “off”; showing normal “off” condition.

4 L H H SSPC failure or STATUS 2 shor ted to bias supply.

5 H L L SSPC failure or short to ground on STATUS 2 line.

6 H L H Load is “ON”, showing normal “on” condition.

7 H H L Load is “OFF”, showing “trip” (see note 1).

8 H H H Normal power out with load <5% of rated SSPC current.

Notes:

1) Any trip condition per Figure 2.

2) STATUS 1 indicates a logic LOW when the load is > 15% of the rated SSPC current.

3) STATUS 2 indicates a logic HIGH when the Power MOSFET switch is on.

INPUT

CONTROL CMD

SSPC failure or short to ground.

Load “on”; showing SSPC failure.

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4) The SSPC has failed or STATUS 2 has shorted to the bias

supply. STATUS 1 indicates the load is not drawing cur-

rent; STATUS 2 indicates the Power MOSFET is on; the

SSPC should be off.

The next four conditions show the control input has commanded

the SSPC to be on.

5) The SSPC has failed or there is a short to ground on the

STATUS 2 output. STATUS 1 indicates the load is drawing

current but STATUS 2 indicates the Power MOSFET

switch is off.

6) Normal on condition. STATUS 1 indicates the load is

drawing current and STATUS 2 indicates the Power MOS-

FET switch is on.

7) Tripped condition. STATUS 1 indicates the load is not

drawing current and STATUS 2 indicates the Power MOS-

FET switch is off.The SSPC can be turned back on by

cycling the input control to a logic low and then back to a

logic high. If the excessive load has not been removed,

the SSPC will trip again.

8) No load current. STATUS 1 indicates the load is not draw-

ing current; STATUS 2 indicates the Power MOSFET

switch is on.

LOADS

The SSP-21116 series can be used with any type of load: any

combination of inductive, resistive, and capacitive. In addition,

they can be used with dc motors and lamps.

Inductive loads require protecting the SSPC against v oltage tran-

sients. See the section on Precautions above.

Capacitive loads require comparing the load inrush current to the

trip curve of FIGURE 2. The inrush current must be below the

minimum trip cur ve to avoid tripping on the inrush current.

Capacitive loads can present a discharge problem. The SSPC's

use Power MOSFET's as the switching element.The MOSFET's

contain a parasitic diode which will be forward biased if the

SSPC power output terminal is more positive than the power

input terminal. If the 270 Vdc source is turned off while a charge

is held on the capacitive load, this diode will turn on and dis-

charge the load through the generator. The SSPC can carry a

reverse current equal to its forward current rating; however, the

dissipation with reverse current is up to four times the forward

current dissipation for the same current. The user must ensure

that the maximum case temperature is not exceeded.

Incandescent lamps must be treated like capacitive loads for

inrush current. Since they do not store charge, they do not pre-

sent a discharge problem.

DC motors also must be treated like capacitive loads for inrush

current.If they contin ue rotating when pow er is remov ed, reverse

current is a possibility due to back EMF.Voltage transients must

also be considered when using dc motors as loads on SSPC's.

HEATSINKING

The SSP-21116 series are designed so that the junction tem-

perature can never exceed its maximum rating if the case tem-

perature is held to 125°C or less. Heatsinking is recommended

to keep the case temperature to 125°C when operating at high

ambient temperatures. The SSPC's may be operated at room

temperature without a heat sink.The maximum ambient temper-

ature, TA, for operation without a heat sink is 125 - Pdx θCA

(where Pd is the power dissipation from TABLE 4 and θCA is the

thermal resistance from case-to-ambient from TABLE 3).

The same expression is used for finding the maximum ambient

temperature with a heat sink except θCA is now the sum of the

thermal resistance from case-to-sink and from sink-to-ambient.

NO OFFSET VOLTAGE

The Power MOSFET used in the DDC SSPC's have no inherent

voltage offset. The voltage drop across the Power MOSFET is

CONTROL

LOW SSPC failure, or STATUS 1 and STATUS 2 shorted to ground, or No Bias

SYSTEM STATUS

SSPC failure or STATUS 1 shor ted to ground

SSPC failure or STATUS 2 shorted to ground

Load “OFF”, Normal Condition

LOW

STATUS 1

LOW

LOW LOW

STATUS 2

SSPC failure or STATUS 2 shorted to ground

Load “ON”, Normal Condition

Load is “OFF”, Tr ipped

LOW

STATUS 1 indicates a logic LOW if > 15% of the rated current flowing.

STATUS 2 indicates a logic LOW if the SSPC is tripped due to overcurrent.

LOW LOW

LOWHIGH HIGH

HIGH

HIGH Load is “‘ON”, Load < 0.5% Rated Current

TABLE 6. OPTIONAL STATUS TRUTH TABLE

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FIGURE 4. MECHANICAL OUTLINE FOR 10 - 15 AMP DIP PACKAGING

0.105

(2.67)

1.54

(39.12)

2.000 (MAX)

(50.8)

3.000 (MAX)

(76.20)

0.23

(5.84)

161

2.54

(64.52)

BOTTOM VIEW

SIDE VIEW

DIMENSIONS ARE IN INCHES (mm)

0.325 MAX

(8.26)

0.065 TYP

(1.65)

0.240 ±0.010 TYP

(6.10 ±0.25)

0.030

(0.76)

0.26

(6.60)

0.125 DIA

(4 HOLES)

(3.18)

1.48

(37.59)

0.45

(11.43)

PIN 1 DENOTED

BY CONTRASTING

COLORED BEAD

7 EQ. SP @

0.300 = 2.100

(7.62 = 5.33)

0.300 TYP

(7.62)

0.040 ±0.002

16 REQD

(1.02 ±0.05)

Note: See TABLE 7 for pinouts.

solely dependent on the current flowing through the device and

its "ON" resistance.

Bipolar transistors, on the other hand, have an inherent dc offset

voltage to which is added a voltage drop proportional to the

devices' "ON" resistance and the current flowing through it. It is

this inherent offset voltage that is missing from the power MOS-

FET.The Power MOSFET in many applications, leads to a lower

voltage drop and power dissipation as an SSPC switch. In addi-

tion the Power MOSFET's driver logic requirements are much

simpler, especially when multiple MOSFET's are used, as in the

SSPC product.

NO SECONDARY BREAKDOWN, AND PARALLELING

SSPC'S

A bipolar transistor has a set of current v oltage limits that f orm an

envelope that cannot be exceeded; this is known as the safe

operating area of the device. If this envelope is exceeded local

hot spots will occur .These hot spots conduct currents more read-

ily then adjacent cool areas and tend to become hotter .This ther-

mal runaway, or

secondary breakdown

, leads to the ultimate

destruction of the device.

The Power MOSFET's have the opposite characteristics from

that of thermal runaway in bipolar devices. A local hot spot will

steer current away from itself as its resistance in this area goes

up. This results in even current sharing throughout the entire

device, thereby eliminating hot spots.The inherent advantage of

not having secondary breakdown is that the entire MOSFET has

to e xceed its temperature limitations before damage results.This

characteristic makes the Power MOSFET more rugged when

used for power switching then bipolar devices.

TABLE 7. PINOUTS FOR FIGURE 4.

PIN FUNCTION PIN FUNCTION

POWER OUT

SLEW CONTROL

POWER IN

BIAS SUPPLY COMMON

BIAS SUPPLY INPUT

STATUS 1

STATUS 2

CONTROL COMMAND

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Due to the current sharing aspects of the power MOSFET, they

can be placed in parallel and share the load equally. DDC has a

standard 28 Vdc 80 AMP power module which uses this tech-

nique.

ISOLATION OF CONTROL AND STATUS

The SSPC was designed with isolation between the load power

and the five volt control logic input and the status outputs.This is

necessary to pre v ent noise caused b y transients or po wer spik es

on the power line from adversely affecting the operation of the

SSPC. Therefore the case, POWER IN and the Control Circuit

are all electrically isolated. FIGURE 1 shows this isolation as the

"ISOLATED CONTROL CIRCUIT"; also notice the separation of

the power (Slew Control) ground and signal (V bias supply com-

mon) ground.

The electrical isolation is supported by an internal power oscilla-

tor that electrically isolates separate inter nal power supplies that

will power the internal analog and digital monolithics.This isola-

tion prevents load or logic ground loops from affecting the prop-

er operation of the SSPC. The isolation also insures that a fault

of the switch (MOSFET) could never propagate back into the

SSPC logic or cause damage to the logic side.

OPTIONS

The following characteristics can be factor y modified on special

orders:

• I2T TRIP CURVE: K-factor adjustments

• OUTPUT RISE AND FALL TIMES: Tur n-Off and Tur n-On time

can be factor y modified (e.g., capacitive loads)

• CURRENT RANGE

• POWER-ON RESET: Other (V Bias) options are available

• LEAKAGE CLAMP: can be deleted

• CUSTOM PACKAGING: DIP, Flat Pack, or Smaller 2-5 Amp

package

• OPTIONAL STATUS TRUTH TABLE (See Table 6)

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NOTES:

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ORDERING INFORMATION

SSP-21116-XXX-X

Reliability Grade:

B = Hybrids screened to MIL-PRF-38534

but without QCI testing

BLANK = Standard DDC Procedures

Current in Amps

10 = 10 Amps

15 = 15 Amps

Temperature Range:

0 = -55°C to +125°C

J-03/03-0 PRINTED IN THE U.S.A.

The information in this data sheet is believed to be accurate; however, no responsibility is

assumed by Data Device Cor poration for its use, and no license or rights are

granted by implication or otherwise in connection therewith.

Specifications are subject to change without notice.

105 Wilbur Place, Bohemia, New Yor k, U.S.A. 11716-2482

For Technical Suppor t - 1-800-DDC-5757 ext. 7382

Headquarters, N.Y., U.S.A. - Tel: (631) 567-5600, Fax: (631) 567-7358

Southeast, U.S.A. - Tel: (703) 450-7900, Fax: (703) 450-6610

West Coast, U.S.A. - Tel: (714) 895-9777, Fax: (714) 895-4988

United Kingdom - Tel: +44-(0)1635-811140, Fax: +44-(0)1635-32264

Ireland - Tel: +353-21-341065, Fax: +353-21-341568

France - Tel: +33-(0)1-41-16-3424, Fax: +33-(0)1-41-16-3425

Germany - Tel: +49-(0)8141-349-087, Fax: +49-(0)8141-349-089

Japan - Tel: +81-(0)3-3814-7688, Fax: +81-(0)3-3814-7689

W orld Wide W eb - http://www.ddc-web.com

DATA DEVICE CORPORATION

REGISTERED TO ISO 9001

FILE NO. A5976

The information in this data sheet is believed to be accurate; however, no responsibility is

assumed by Data Device Cor poration for its use, and no license or rights are

granted by implication or otherwise in connection therewith.

Specifications are subject to change without notice.

Please visit our web site at www.ddc-web.com for the latest infor mation.