September 2013 Doc ID 022514 Rev 2 1/40
1
VND5E050MCJ-E
VND5E050MCK-E
Double-channel high-side driver with analog current sense
for automotive applications
Features
■General
– Inrush current active management by
power limitation
– Very low standby current
– 3.0 V CMOS compatible inputs
– Optimized electromagnetic emissions
– Very low electromagnetic susceptibility
– Compliance with European directive
2002/95/EC
– Very low current sense leakage
■Diagnostic functions
– Proportional load current sense
– High-precision current sense for wide
currents range
– Current sense disable
– Overload and short to ground (power
limitation) indication
– Thermal shutdown indication
■Protections
– Undervoltage shutdown
– Overvoltage clamp
– Load current limitation
– Self limiting of fast thermal transients
– Protection against loss of ground and loss
of VCC
– Overtemperature shutdown with auto
restart (thermal shutdown)
– Reverse battery protected
– Electrostatic discharge protection
Applications
■All types of resistive, inductive and capacitive
loads
■Suitable as LED driver
Description
The VND5E050MCJ-E and VND5E050MCK-E
are double channel high-side drivers
manufactured using ST proprietary VIPower®
M0-5 technology and housed in PowerSSO-12
and PowerSSO-24 packages. The devices are
designed to drive 12 V automotive grounded
loads, and to provide protection and diagnostics.
They also implement a 3 V and 5 V CMOS-
compatible interface for the use with any
microcontroller.
The devices integrate advanced protective
functions such as load current limitation, inrush
and overload active management by power
limitation, overtemperature shut-off with
auto-restart and overvoltage active clamp. A
dedicated analog current sense pin is associated
with every output channel providing enhanced
diagnostic functions including fast detection of
overload and short-circuit to ground through
power limitation indication and overtemperature
indication.
The current sensing and diagnostic feedback of
the whole device can be disabled by pulling the
CS_DIS pin high to share the external sense
resistor with similar devices.
Max transient supply voltage VCC 41 V
Operating voltage range VCC 4.5 V to 28 V
Max on-state resistance (per ch.) RON 50 m
Current limitation (typ) ILIMH 27 A
Off-state supply current IS2 µA(1)
1. Typical value with all loads connected.
PowerSSO-24
PowerSSO-12
www.st.com
Contents VND5E050MCJ-E, VND5E050MCK-E
2/40 Doc ID 022514 Rev 2
Contents
1 Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.4 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
2.5 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
3 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
3.1 GND protection network against reverse battery . . . . . . . . . . . . . . . . . . . 22
3.1.1 Solution 1: resistor in the ground line (RGND only) . . . . . . . . . . . . . . . . 22
3.1.2 Solution 2: diode (DGND) in the ground line . . . . . . . . . . . . . . . . . . . . . 23
3.2 Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
3.3 MCU I/Os protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
3.4 Current sense and diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
3.5 Maximum demagnetization energy (VCC = 13.5 V) . . . . . . . . . . . . . . . . . 25
4 Package and PCB thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
4.1 PowerSSO-12 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
4.2 PowerSSO-24 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
5 Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
5.1 ECOPACK® . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
5.2 PowerSSO-12 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
5.3 PowerSSO-24 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
5.4 PowerSSO-12 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
5.5 PowerSSO-24 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
6 Order codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
7 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
VND5E050MCJ-E, VND5E050MCK-E List of tables
Doc ID 022514 Rev 2 3/40
List of tables
Table 1. Pin function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Table 2. Suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 6
Table 3. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Table 4. Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 5. Power section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 6. Switching (VCC = 13 V, Tj = 25 °C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 7. Logic inputs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 8. Protections and diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 9. Current sense (8 V < VCC < 18 V). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Table 10. Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Table 11. Electrical transient requirements (part 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Table 12. Electrical transient requirements (part 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Table 13. Electrical transient requirements (part 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Table 14. Thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Table 15. Thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Table 16. PowerSSO-12 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Table 17. PowerSSO-24 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Table 18. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
Table 19. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
List of figures VND5E050MCJ-E, VND5E050MCK-E
4/40 Doc ID 022514 Rev 2
List of figures
Figure 1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 2. Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Figure 3. Current and voltage conventions(1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Figure 4. Current sense delay characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 5. Switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 6. Delay response time between rising edge of output current and rising edge of current
sense (CS enabled) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 7. Output voltage drop limitation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 8. IOUT/ISENSE vs IOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 9. Maximum current sense ratio drift vs load current(1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 10. Normal operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 11. Overload or short to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 12. Intermittent overload . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 13. TJ evolution in overload or short to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 14. OFF-state output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 15. High-level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 16. Input voltage clamp. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 17. Low-level input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 18. High-level input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 19. Hysteresis input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 20. ON-state resistance vs Tcase. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 21. ON-state resistance vs VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 22. Undervoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 23. Turn-on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 24. ILIMH vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 25. Turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 26. High-level CS_DIS voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 27. CS_DIS voltage clamp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 28. Low-level CS_DIS voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 29. Application schematic(1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 30. Current sense and diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Figure 31. Maximum turn-off current versus inductance (for each channel) . . . . . . . . . . . . . . . . . . . . 25
Figure 32. PowerSSO-12 PC board. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Figure 33. Rthj-amb vs PCB copper area in open box free air condition (one channel on). . . . . . . . . 26
Figure 34. PowerSSO-12 thermal impedance junction ambient single pulse (one channel on) . . . . . 27
Figure 35. Thermal fitting model of a double-channel HSD in PowerSSO-12 . . . . . . . . . . . . . . . . . . . 27
Figure 36. PowerSSO-24 PC board. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Figure 37. Rthj-amb vs PCB copper area in open box free air condition (one channel on). . . . . . . . . 29
Figure 38. PowerSSO-24 thermal impedance junction ambient single pulse (one channel on) . . . . . 30
Figure 39. Thermal fitting model of a double-channel HSD in PowerSSO-24 . . . . . . . . . . . . . . . . . . . 30
Figure 40. PowerSSO-12 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Figure 41. PowerSSO-24 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Figure 42. PowerSSO-12 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
Figure 43. PowerSSO-12 tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
Figure 44. PowerSS0-24 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
Figure 45. PowerSSO-24 tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
VND5E050MCJ-E, VND5E050MCK-E Block diagram and pin description
Doc ID 022514 Rev 2 5/40
1 Block diagram and pin description
Figure 1. Block diagram
Table 1. Pin function
Name Function
VCC Battery connection.
OUT1,2 Power output.
GND Ground connection. Must be reverse battery protected by an external diode/resistor
network.
IN1,2
Voltage controlled input pin with hysteresis, CMOS compatible. Controls output
switch state.
CS1,2 Analog current sense pin, delivers a current proportional to the load current.
CS_DIS Active high CMOS compatible pin, to disable the current sense pin.
VCC
CH 1
Control & Diagnostic 1
LOGIC
DRIVER
VON
Limitation
Current
Limitation
Power
Clamp
Over
temp.
Undervoltage
VSENSEH
Current
Sense
CH 2
OVERLOAD PROTECTION
(ACTIVE POWER LIMITATION)
IN1
IN2
CS1
CS2
CS_
DIS
GND
OUT2
OUT1
Signal Clamp
CONTROL & DIAGNOSTIC
Channels 2
Block diagram and pin description VND5E050MCJ-E, VND5E050MCK-E
6/40 Doc ID 022514 Rev 2
Figure 2. Configuration diagram (top view)
Table 2. Suggested connections for unused and not connected pins
Connection / pin Current sense N.C. Output Input CS_DIS
Floating Not allowed X X X X
To ground Through 1 K
resistor X Not allowed Through 10 K
resistor
Through 10 K
resistor
PowerSSO-12
TAB = V
cc
V
cc
OUT2
OUT1
OUT1
V
cc
OUT2
12
11
10
9
8
7
1
2
3
4
5
6
CS_DIS
GND
IN1
CS1
IN2
CS2
N.C.
INPUT1
GND
V
CC
N.C.
INPUT2
CS_DIS.
V
CC
CURRENT SENSE1
N.C.
N.C.
CURRENT SENSE2
OUTPUT2
OUTPUT2
OUTPUT2
OUTPUT2
OUTPUT2
OUTPUT2
OUTPUT1
OUTPUT1
OUTPUT1
OUTPUT1
OUTPUT1
OUTPUT1
PowerSSO-24
TAB = V
CC
VND5E050MCJ-E, VND5E050MCK-E Electrical specifications
Doc ID 022514 Rev 2 7/40
2 Electrical specifications
Figure 3. Current and voltage conventions(1)
1. VFn = VOUTn - VCC during reverse battery condition.
2.1 Absolute maximum ratings
Stressing the device above the rating listed in Table 3: Absolute maximum ratings may
cause permanent damage to the device. These are stress ratings only and operation of the
device at these or any other conditions above those indicated in the operating sections of
this specification is not implied. Exposure to the conditions in table below for extended
periods may affect device reliability.
I
S
I
GND
V
CC
V
CC
V
SENSE2
OUT1
I
OUT1
CS1
I
SENSE1
IN1
I
IN1
V
IN2
V
OUT2
GND
CS_DIS
I
CSD
V
CSD
IN2
I
IN2
V
IN1
OUT2
I
OUT2
CS2
I
SENSE2
V
SENSE1
V
OUT1
V
Fn
Table 3. Absolute maximum ratings
Symbol Parameter Value Unit
VCC DC supply voltage 41 V
-VCC Reverse DC supply voltage 0.3 V
-IGND DC reverse ground pin current 200 mA
IOUT DC output current Internally limited A
-IOUT Reverse DC output current 20 A
IIN DC input current -1 to 10 mA
ICSD DC current sense disable input current -1 to 10 mA
-ICSENSE DC reverse CS pin current 200 mA
VCSENSE Current sense maximum voltage VCC - 41 to +VCC V
Electrical specifications VND5E050MCJ-E, VND5E050MCK-E
8/40 Doc ID 022514 Rev 2
2.2 Thermal data
EMAX
Maximum switching energy (single pulse)
(L = 3 mH, RL = 0, Vbat = 13.5 V, Tjstart = 150 °C,
IOUT = IlimL(Typ.))
104 mJ
VESD
Electrostatic discharge
(human body model: R = 1.5 K C = 100 pF)
–IN
–CS
–CS_DIS
–OUT
–V
CC
4000
2000
4000
5000
5000
V
V
V
V
V
VESD Charge device model (CDM-AEC-Q100-011) 750 V
TjJunction operating temperature -40 to 150 °C
Tstg Storage temperature -55 to 150 °C
Table 3. Absolute maximum ratings (continued)
Symbol Parameter Value Unit
Table 4. Thermal data
Symbol Parameter
Max. value
Unit
PowerSSO-12 PowerSSO-24
Rthj-case
Thermal resistance junction-case
(with one channel on) 2.7 2.7 °C/W
Rthj-amb Thermal resistance junction-ambient See Figure 33 See Figure 37 °C/W
VND5E050MCJ-E, VND5E050MCK-E Electrical specifications
Doc ID 022514 Rev 2 9/40
2.3 Electrical characteristics
Values specified in this section are for 8 V < VCC < 28 V, -40 °C < Tj < 150 °C, unless
otherwise stated.
Table 5. Power section
Symbol Parameter Test conditions Min. Typ. Max. Unit
VCC Operating supply voltage 4.5 13 28 V
VUSD Undervoltage shutdown 3.5 4.5 V
VUSDhyst
Undervoltage shutdown
hysteresis 0.5 V
RON ON-state resistance(1)
IOUT = 2 A, Tj = 25 °C 50
m
IOUT = 2 A, Tj = 150 °C 100
IOUT = 2 A, VCC = 5 V,
Tj = 25 °C 65
Vclamp(2) Clamp voltage IS = 20 mA 41 46 52 V
ISSupply current
OFF-state: VCC = 13 V,
Tj = 25 °C,
VIN = VOUT = VSENSE = VCSD = 0 V
2(3) 5(3) µA
ON-state: VCC = 13 V,
VIN = 5 V, IOUT = 0 A 36mA
IL(off1)(2) OFF-state output current
(1)
VIN = VOUT = 0 V, VCC = 13 V,
Tj = 25 °C 00.013
µA
VIN = VOUT = 0 V, VCC = 13 V,
Tj = 125 °C 05
VF
Output-V
CC
diode voltage
(1)
-IOUT = 4 A, Tj = 150 °C 0.7 V
1. For each channel.
2. Special characteristic according to ISO/TS 16949.
3. PowerMOS leakage included.
Table 6. Switching (VCC =13 V, T
j=25 °C)
Symbol Parameter Test conditions Min. Typ. Max. Unit
td(on) Turn-on delay time RL = 6.5
(see Figure 5)—20—µs
td(off) Turn-off delay time RL = 6.5
(see Figure 5)—45—µs
dVOUT/dt(on) Turn-on voltage slope RL = 6.5 —
See
Figure 23 —Vµs
dVOUT/dt(off) Turn-off voltage slope RL = 6.5 —
See
Figure 25 —Vµs
Electrical specifications VND5E050MCJ-E, VND5E050MCK-E
10/40 Doc ID 022514 Rev 2
WON
Switching energy
losses during twon
RL = 6.5
(see Figure 5)—0.15—mJ
WOFF
Switching energy
losses during twoff
RL = 6.5
(see Figure 5)—0.3—mJ
Table 7. Logic inputs
Symbol Parameter Test conditions Min. Typ. Max. Unit
VIL Low-level input voltage 0.9 V
IIL Low-level input current VIN = 0.9 V 1 µA
VIH High-level input voltage 2.1 V
IIH High-level input current VIN = 2.1 V 10 µA
VI(hyst) Hysteresis input voltage 0.25 V
VICL Input voltage clamp IIN = 1 mA 5.5 7 V
IIN = -1 mA -0.7
VCSDL
Low-level CS_DIS
voltage 0.9 V
ICSDL
Low-level CS_DIS
current VCSD = 0.9 V 1 µA
VCSDH
High-level CS_DIS
voltage 2.1 V
ICSDH
High-level CS_DIS
current VCSD = 2.1 V 10 µA
VCSD(hyst)
CS_DIS hysteresis
voltage 0.25 V
VCSCL CS_DIS voltage clamps ICSD = 1 mA 5.5 7 V
ICSD = -1 mA -0.7
Table 8. Protections and diagnostics (1)
Symbol Parameter Test conditions Min. Typ. Max. Unit
IlimH DC short circuit current VCC = 13 V 19 27 38 A
5 V < VCC < 28 V 38 A
IlimL
Short circuit current
during thermal cycling
VCC = 13 V,
TR < Tj < TTSD
7A
TTSD(2) Shutdown temperature 150 175 200 °C
TRReset temperature TRS + 1 TRS + 5 °C
TRS Thermal reset of status 135 °C
THYST
Thermal hysteresis
(T
TSD
- T
R
)
7°C
Table 6. Switching (VCC =13 V, T
j= 25 °C) (continued)
Symbol Parameter Test conditions Min. Typ. Max. Unit
VND5E050MCJ-E, VND5E050MCK-E Electrical specifications
Doc ID 022514 Rev 2 11/40
VDEMAG(2) Turn-off output voltage
clamp
IOUT = 2 A, VIN = 0,
L = 6 mH VCC - 41 VCC - 46 VCC - 52 V
VON
Output voltage drop
limitation
IOUT = 0.1 A,
Tj = -40 °C to +150 °C
(see Figure 7)
25 mV
1. To ensure long term reliability under heavy overload or short circuit conditions, protection and related
diagnostic signals must be used together with a proper software strategy. If the device is subjected to
abnormal conditions, this software must limit the duration and number of activation cycles.
2. Special characteristic according to ISO/TS 16949.
Table 9. Current sense (8 V < VCC < 18 V)
Symbol Parameter Test conditions Min. Typ. Max. Unit
K0IOUT/ISENSE
IOUT = 0.05 A, VSENSE = 0.5 V,
VCSD = 0 V, Tj = -40 °C to 150 °C 1440 2250 3630
K1IOUT/ISENSE
IOUT = 1 A, VSENSE = 4 V, VCSD = 0 V,
Tj = -40 °C to 150 °C
Tj= 25°C...150°C
1740
1750
2070
2070
2820
2562
dK1/K1(1) Current sense ratio
drift
IOUT = 1 A, VSENSE = 4 V, VCSD = 0 V,
Tj = -40 °C to 150 °C -15 15 %
K2IOUT/ISENSE
IOUT = 2 A, VSENSE = 4 V, VCSD = 0 V,
Tj = -40 °C to 150 °C
Tj = 25 °C to 150 °C
1900
1899
2000
2000
2395
2282
dK2/K2(1) Current sense ratio
drift
IOUT = 2 A; VSENSE = 4 V, VCSD = 0 V,
Tj = -40 °C to 150 °C -9 9 %
K3IOUT/ISENSE
IOUT = 4 A, VSENSE = 4 V, VCSD = 0 V,
Tj = -40 °C to 150 °C
Tj = 25 °C to 150 °C
1969
1950
1990
1990
2210
2153
dK3/K3(1) Current sense ratio
drift
IOUT = 4 A, VSENSE = 4 V, VCSD = 0 V,
Tj = -40 °C to 150 °C -6 6 %
ISENSE0(2) Analog sense
leakage current
IOUT = 0 A, VSENSE = 0 V, VCSD = 5 V,
VIN = 0 V, Tj = -40 °C to 150 °C 01
µA
IOUT = 0 A, VSENSE = 0 V, VCSD = 0 V,
VIN = 5 V, Tj = -40 °C to 150 °C 02
IOUT = 2 A, VSENSE = 0 V, VCSD = 5 V,
VIN = 5 V, Tj = -40 °C to 150 °C 01
IOL
Open load on-state
current detection
threshold
VIN = 5 V, 8 V < VCC < 18 V
ISENSE = 5 µA 420mA
VSENSE
Max analog sense
output voltage IOUT = 4 A, VCSD = 0 V 5 V
Table 8. Protections and diagnostics (1) (continued)
Symbol Parameter Test conditions Min. Typ. Max. Unit
Electrical specifications VND5E050MCJ-E, VND5E050MCK-E
12/40 Doc ID 022514 Rev 2
Figure 4. Current sense delay characteristics
VSENSEH
Analog sense output
voltage in fault
condition(3)
VCC = 13 V, RSENSE = 3.9 K8V
ISENSEH
Analog sense output
current in fault
condition(3)
VCC = 13 V, VSENSE = 5 V 9 mA
tDSENSE1H
Delay response time
from falling edge of
CS_DIS pin
VSENSE < 4 V, 0.5 A < IOUT < 4 A
ISENSE = 90% of ISENSE max
(see Figure 4)
40 100 µs
tDSENSE1L
Delay response time
from rising edge of
CS_DIS pin
VSENSE < 4 V, 0.5 A < IOUT < 4 A
ISENSE = 10% of ISENSE max
(see Figure 4)
520µs
tDSENSE2H
Delay response time
from rising edge of
INPUT pin
VSENSE < 4 V, 0.5 A < IOUT < 4 A
ISENSE = 90% of ISENSE max
(see Figure 4)
80 250 µs
tDSEN
SE
2H
Delay response time
between rising edge
of output current and
rising edge of current
sense
VSENSE <4 V,
ISENSE = 90% of ISENSEMAX,
IOUT = 90% of IOUTMAX
IOUTMAX = 2 A (see Figure 6)
40 µs
tDSENSE2L
Delay response time
from falling edge of
INPUT pin
VSENSE < 4 V, 0.5 A < IOUT < 4 A
ISENSE = 10% of ISENSE max
(see Figure 4)
80 250 µs
1. Parameter guaranteed by design; it is not tested.
2. Special characteristic according to ISO/TS 16949.
3. Fault condition includes: power limitation and overtemperature.
Table 9. Current sense (8 V < VCC < 18 V) (continued)
Symbol Parameter Test conditions Min. Typ. Max. Unit
SENSE CURRENT
INPUT
LOAD CURRENT
CS_DIS
tDSENSE2H tDSENSE2L
tDSENSE1L tDSENSE1H
VND5E050MCJ-E, VND5E050MCK-E Electrical specifications
Doc ID 022514 Rev 2 13/40
Figure 5. Switching characteristics
Figure 6. Delay response time between rising edge of output current and rising
edge of current sense (CS enabled)
V
OUT
dV
OUT
/dt
(on)
t
r
80%
10% t
f
dV
OUT
/dt
(off)
t
d(off)
t
d(on)
INPUT
t
t
90%
t
Won
t
Woff
V
IN
I
OUT
I
SENSE
I
OUTMAX
I
SENSEMAX
90% I
SENSEMAX
90% I
OUTMAX
t
DSENSE2H
t
t
t
Electrical specifications VND5E050MCJ-E, VND5E050MCK-E
14/40 Doc ID 022514 Rev 2
Figure 7. Output voltage drop limitation
Figure 8. IOUT/ISENSE vs IOUT
V
on
I
out
V
cc
-V
out
T
j
=150
o
CT
j
=25
o
C
T
j
=-40
o
C
V
on
/R
on(T)
1200
1400
1600
1800
2000
2200
2400
2600
2800
3000
11,522,533,54
I
OUT
(A)
I
out
/ I
sense
A
B
C
D
E
A: Max, Tj = -40 °C to 150 °C
B: Max, Tj = 25 °C to 150 °C
C: Typical, Tj = -40 °C to 150 °C
D: Min, Tj = 25 °C to 150 °C)
E: Min, Tj = -40 °C to 150 °C)
VND5E050MCJ-E, VND5E050MCK-E Electrical specifications
Doc ID 022514 Rev 2 15/40
Figure 9. Maximum current sense ratio drift vs load current(1)
1. Parameter guaranteed by design; it is not tested.
Table 10. Truth table
Conditions Input Output Sense (VCSD = 0 V)(1)
1. If the VCSD is high, the SENSE output is at a high-impedance, its potential depends on leakage currents
and external circuit.
Normal operation L
H
L
H
0
Nominal
Overtemperature L
H
L
L
0
VSENSEH
Undervoltage L
H
L
L
0
0
Overload
H
H
X
(no power limitation)
Cycling
(power limitation)
Nominal
VSENSEH
Short circuit to GND
(power limitation)
L
H
L
L
0
VSENSEH
Negative output voltage
clamp LL0
-20
-15
-10
-5
0
5
10
15
20
1234
IOUT (A)
dk/k(%)
A
B
A: Max, Tj = -40 °C to 150 °C B: Min, Tj = 25 °C to 150 °C
Electrical specifications VND5E050MCJ-E, VND5E050MCK-E
16/40 Doc ID 022514 Rev 2
Table 11. Electrical transient requirements (part 1)
ISO 7637-2:
2004(E)
Test pulse
Test levels(1)
1. The above test levels must be considered referred to VCC = 13.5 V except for pulse 5b.
Number of
pulses or
test times
Burst cycle/pulse
repetition time Delays and
Impedance
III IV Min. Max.
1 -75 V -100 V 5000 pulses 0.5 s 5 s 2 ms, 10
2a +37 V +50 V 5000 pulses 0.2 s 5 s 50 µs, 2
3a -100 V -150 V 1 h 90 ms 100 ms 0.1µs, 50
3b +75 V +100 V 1 h 90 ms 100 ms 0.1µs, 50
4 -6 V -7 V 1 pulse 100 ms, 0.01
5b(2)
2. Valid in case of external load dump clamp: 40 V maximum referred to ground.
+65 V +87 V 1 pulse 400 ms, 2
Table 12. Electrical transient requirements (part 2)
ISO 7637-2:
2004(E)
Test pulse
Test level results
III IV
1C C
2a C C
3a C C
3b C C
4C C
5b(1)
1. Valid in case of external load dump clamp: 40 V maximum referred to ground.
CC
Table 13. Electrical transient requirements (part 3)
Class Contents
C All functions of the device are performed as designed after exposure to disturbance.
EOne or more functions of the device are not performed as designed after exposure to
disturbance and cannot be returned to proper operation without replacing the device.
VND5E050MCJ-E, VND5E050MCK-E Electrical specifications
Doc ID 022514 Rev 2 17/40
2.4 Waveforms
Figure 10. Normal operation
Figure 11. Overload or short to GND
IOUT
VSENSE
VCS_DIS
INPUT
Nominal load Nominal load
Normal operation
Power Limitation
ILimH >
ILimL >
IOUT
VSENSE
VCS_DIS
INPUT
Thermal cycling
Overload or Short to GND
Electrical specifications VND5E050MCJ-E, VND5E050MCK-E
18/40 Doc ID 022514 Rev 2
Figure 12. Intermittent overload
Figure 13. TJ evolution in overload or short to GND
TTSD
TR
TJ evolution in
Overload or Short to GND
ILimH >
< ILimL
TJ_START
THYST
Power Limitation
Self-limitation of fast thermal transients
INPUT
IOUT
TJ
VND5E050MCJ-E, VND5E050MCK-E Electrical specifications
Doc ID 022514 Rev 2 19/40
2.5 Electrical characteristics curves
Figure 14. OFF-state output current Figure 15. High-level input current
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
0
50
100
150
200
250
300
350
400
450
500
550
Iloff (nA)
Off State
Vcc=13V
Vin=Vout=0V
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
0
0,5
1
1,5
2
2,5
3
3,5
4
4,5
5
Iih (µA)
Vin=2.1V
Figure 16. Input voltage clamp Figure 17. Low-level input voltage
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
5
5,2
5,4
5,6
5,8
6
6,2
6,4
6,6
6,8
7
Vicl (V)
lin=1mA
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
0
0,2
0,4
0,6
0,8
1
1,2
1,4
1,6
1,8
2
Vil (V)
Figure 18. High-level input voltage Figure 19. Hysteresis input voltage
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
0
0,5
1
1,5
2
2,5
3
3,5
4
Vih (V)
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
0
0,1
0,2
0,3
0,4
0,5
0,6
0,7
0,8
0,9
1
Vihyst (V)
Electrical specifications VND5E050MCJ-E, VND5E050MCK-E
20/40 Doc ID 022514 Rev 2
Figure 20. ON-state resistance vs Tcase Figure 21. ON-state resistance vs VCC
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
0
50
100
150
200
250
300
Ron (mOhm)
Iout= 2A
Vcc=13V
0 5 10 15 20 25 30 35 40
Vcc (V)
0
20
40
60
80
100
Ron (mOhm)
Tc=-40°C
Tc=25°C
Tc=125°C
Tc=150°C
Figure 22. Undervoltage shutdown Figure 23. Turn-on voltage slope
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
0
2
4
6
8
10
12
14
16
Vusd (V)
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
0
100
200
300
400
500
600
700
800
900
1000
(dVout/dt )On (V/ms)
Vcc=13V
RI=6.5 Ohm
Figure 24. ILIMH vs Tcase Figure 25. Turn-off voltage slope
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
10
15
20
25
30
35
40
Ilimh (A)
Vcc=13V
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
0
50
100
150
200
250
300
350
400
450
500
550
600
(dVout/dt )Off (V/ms)
Vcc=13V
RI= 6.5 Ohm
VND5E050MCJ-E, VND5E050MCK-E Electrical specifications
Doc ID 022514 Rev 2 21/40
Figure 26. High-level CS_DIS voltage Figure 27. CS_DIS voltage clamp
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
0
0,5
1
1,5
2
2,5
3
3,5
4
Vcsdh (V)
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
0
1
2
3
4
5
6
7
8
9
10
Vcsdcl(V)
Icsd = 1 mA
Figure 28. Low-level CS_DIS voltage
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
0
0,5
1
1,5
2
2,5
3
Vcsdl (V)
Application information VND5E050MCJ-E, VND5E050MCK-E
22/40 Doc ID 022514 Rev 2
3 Application information
Figure 29. Application schematic(1)
1. Channel 2 has the same internal circuit as channel 1.
3.1 GND protection network against reverse battery
This section provides two solutions for implementing a ground protection network against
reverse battery.
3.1.1 Solution 1: resistor in the ground line (RGND only)
This can be used with any type of load.
The following is an indication of how to resize the RGND resistor.
1. RGND 600 mV / (IS(on)max)
2. RGND VCC) / (-IGND)
where -IGND is the DC reverse ground pin current and can be found in the absolute
maximum rating section of the device datasheet.
Power dissipation in RGND (when VCC < 0: during reverse battery situations) is:
Equation 1
PD = (-VCC)2 / RGND
V
CC
GND
OUTPUT
D
GND
R
GND
D
ld
CU
+5V
V
GND
CS_DIS
INPUT
R
prot
R
prot
CURRENT SENSE
R
SENSE
R
prot
C
EXT
VND5E050MCJ-E, VND5E050MCK-E Application information
Doc ID 022514 Rev 2 23/40
This resistor can be shared amongst several different HSDs. Please note that the value of
this resistor should be calculated with formula (1) where IS(on)max becomes the sum of the
maximum on-state currents of the different devices.
Please note that if the microprocessor ground is not shared by the device ground then the
RGND produces a shift (IS(on)max * RGND) in the input thresholds and the status output
values. This shift varies depending on how many devices are on in case of several high-side
drivers sharing the same RGND.
If the calculated power dissipation leads to a large resistor or several devices have to share
the same resistor then ST suggests to utilize Solution 2 (see Section 3.1.2).
3.1.2 Solution 2: diode (DGND) in the ground line
A resistor (RGND = 1 kshould be inserted in parallel to DGND if the device drives an
inductive load.
This small signal diode can be safely shared amongst several different HSDs. Also in this
case, the presence of the ground network produces a shift (600 mV) in the input threshold
and in the status output values if the microprocessor ground is not common to the device
ground. This shift not varies if more than one HSD share the same diode/resistor network.
3.2 Load dump protection
Dld is necessary (voltage transient suppressor) if the load dump peak voltage exceeds the
VCC maximum DC rating. The same applies if the device is subject to transients on the VCC
line that are greater than the ones shown in the ISO 7637-2: 2004(E) table.
3.3 MCU I/Os protection
If a ground protection network is used and negative transients are present on the VCC line,
the control pins are pulled negative.
ST suggests to insert a resistor (Rprot) in line to prevent the microcontroller I/O pins from
latching-up.
The value of these resistors is a compromise between the leakage current of microcontroller
and the current required by the HSD I/Os (Input levels compatibility) with the latch-up limit of
microcontroller I/Os:
Equation 2
-VCCpeak / Ilatchup Rprot (VOHC - VIH - VGND) / IIHmax
Calculation example:
For VCCpeak = - 100 V, Ilatchup 20 mA and VOHµC 4.5 V
5 k Rprot 180 k
Recommended values: Rprot =10 k, CEXT = 10 nF.
Application information VND5E050MCJ-E, VND5E050MCK-E
24/40 Doc ID 022514 Rev 2
3.4 Current sense and diagnostic
The current sense pin performs a double function (see Figure 30: Current sense and
diagnostic):
●Current mirror of the load current in normal operation, delivering a current
proportional to the load current according to a known ratio KX.
The current ISENSE can be easily converted to a voltage VSENSE by means of an
external resistor RSENSE. Linearity between IOUT and VSENSE is ensured up to 5 V
minimum (see parameter VSENSE in Table 9: Current sense (8 V < VCC < 18 V)). The
current sense accuracy depends on the output current (refer to current sense electrical
characteristics Table 9: Current sense (8 V < VCC < 18 V)).
●Diagnostic flag in fault conditions, delivering a fixed voltage VSENSEH up to a
maximum current ISENSEH in case of the following fault conditions (refer to Table 10:
Truth table):
– Power limitation activation
–Overtemperature
A logic level high on CS_DIS pin sets at the same time all the current sense pins of the
device in a high-impedance state, thus disabling the current monitoring and diagnostic
detection. This feature allows multiplexing of the microcontroller analog inputs by sharing of
sense resistance and ADC line among different devices.
Figure 30. Current sense and diagnostic
Main MOSn
41V
OUTn
RSENSE
RPROT
To uC ADC
Pwr_Lim
VSENSE
Overtemperature
CURRENT
SENSEn
IOUT/KX
ISENSEH
VBAT
VSENSEH
Load
VCC
GND
CS_DIS
VND5E050MCJ-E, VND5E050MCK-E Application information
Doc ID 022514 Rev 2 25/40
3.5 Maximum demagnetization energy (VCC = 13.5 V)
Figure 31. Maximum turn-off current versus inductance (for each channel)
1. Values are generated with RL = 0 In case of repetitive pulses, Tjstart (at the beginning of each
demagnetization) of every pulse must not exceed the temperature specified above for curves A and B.
1
10
100
0,1 1 10 100L (mH)
I (A)
C: Tjstart = 125 °C repetitive pulse
A: Tjstart = 150 °C single pulse
B: Tjstart = 100 °C repetitive pulse
Demagnetization Demagnetization Demagnetization
t
VIN, IL
A
B
C
Package and PCB thermal data VND5E050MCJ-E, VND5E050MCK-E
26/40 Doc ID 022514 Rev 2
4 Package and PCB thermal data
4.1 PowerSSO-12 thermal data
Figure 32. PowerSSO-12 PC board
1. Layout condition of Rth and Zth measurements (PCB: double layer, thermal vias,
FR4 area = 77 mm x 86 mm, PCB thickness = 1.6 mm, Cu thickness = 70 µm (front and back side), copper
areas: from minimum pad lay-out to 8 cm2).
Figure 33. Rthj-amb vs PCB copper area in open box free air condition (one channel
on)
30
35
40
45
50
55
60
65
70
0246810
RTHj_amb(°C/ W)
PCB Cu heatsink area (cm^ 2)
VND5E050MCJ-E, VND5E050MCK-E Package and PCB thermal data
Doc ID 022514 Rev 2 27/40
Figure 34. PowerSSO-12 thermal impedance junction ambient single pulse (one
channel on)
Equation 3: pulse calculation formula
where = tP/T
Figure 35. Thermal fitting model of a double-channel HSD in PowerSSO-12
1. The fitting model is a simplified thermal tool and is valid for transient evolutions where the embedded
protections (power limitation or thermal cycling during thermal shutdown) are not triggered.
0,1
1
10
100
0,0001 0,001 0,01 0,1 1 10 100 1000
Time ( s)
ZTH (°C/ W)
Footprint
8 cm
2
2 cm
2
ZTHRTH ZTHtp 1–+=
Package and PCB thermal data VND5E050MCJ-E, VND5E050MCK-E
28/40 Doc ID 022514 Rev 2
Table 14. Thermal parameters
Area/island (cm2)Footprint28
R1=R7 (°C/W) 0.7
R2=R8 (°C/W) 2.8
R3 (°C/W) 4
R4 (°C/W) 8 8 7
R5 (°C/W) 22 15 10
R6 (°C/W) 26 20 15
C1=C7 (W.s/°C) 0.001
C2=C8 (W.s/°C) 0.0025
C3 (W.s/°C) 0.05
C4 (W.s/°C) 0.2 0.1 0.1
C5 (W.s/°C) 0.27 0.8 1
C6 (W.s/°C) 3 6 9
VND5E050MCJ-E, VND5E050MCK-E Package and PCB thermal data
Doc ID 022514 Rev 2 29/40
4.2 PowerSSO-24 thermal data
Figure 36. PowerSSO-24 PC board
1. Layout condition of Rth and Zth measurements (PCB: double layer, Thermal vias,
FR4 area = 77 mm x 86 mm, PCB thickness =1.6 mm, Cu thickness =70 µm (front and back side), Copper
areas: from minimum pad lay-out to 8 cm2).
Figure 37. Rthj-amb vs PCB copper area in open box free air condition (one channel
on)
30
35
40
45
50
55
0246810
RTHj_amb(°C/W)
PCB Cu heatsink area (cm^2)
Package and PCB thermal data VND5E050MCJ-E, VND5E050MCK-E
30/40 Doc ID 022514 Rev 2
Figure 38. PowerSSO-24 thermal impedance junction ambient single pulse (one
channel on)
Equation 4: pulse calculation formula
where = tP/T
Figure 39. Thermal fitting model of a double-channel HSD in PowerSSO-24
1. The fitting model is a simplified thermal tool and is valid for transient evolutions where the embedded
protections (power limitation or thermal cycling during thermal shutdown) are not triggered.
ZTHRTH ZTHtp 1–+=
VND5E050MCJ-E, VND5E050MCK-E Package and PCB thermal data
Doc ID 022514 Rev 2 31/40
Table 15. Thermal parameters
Area / island (cm2)Footprint 2 8
R1 = R7 (°C/W) 0.4
R2 = R8 (°C/W) 2
R3 (°C/W) 6
R4 (°C/W) 7.7
R5 (°C/W) 9 9 8
R6 (°C/W) 28 17 10
C1 = C7 (W.s/°C) 0.001
C2 = C8 (W.s/°C) 0.0022
C3 (W.s/°C) 0.025
C4 (W.s/°C) 0.75
C5 (W.s/°C) 1 4 9
C6 (W.s/°C) 2.2 5 17
Package and packing information VND5E050MCJ-E, VND5E050MCK-E
32/40 Doc ID 022514 Rev 2
5 Package and packing information
5.1 ECOPACK®
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK® is an ST trademark.
5.2 PowerSSO-12 package information
Figure 40. PowerSSO-12 package dimensions
VND5E050MCJ-E, VND5E050MCK-E Package and packing information
Doc ID 022514 Rev 2 33/40
Table 16. PowerSSO-12 mechanical data
Symbol
Millimeters
Min. Typ. Max.
A 1.25 1.62
A1 0 0.1
A2 1.10 1.65
B 0.23 0.41
C 0.19 0.25
D4.8 5.0
E3.8 4.0
e0.8
H5.8 6.2
h 0.25 0.5
L 0.4 1.27
k0° 8°
X1.9 2.5
Y3.6 4.2
ddd 0.1
Package and packing information VND5E050MCJ-E, VND5E050MCK-E
34/40 Doc ID 022514 Rev 2
5.3 PowerSSO-24 package information
Figure 41. PowerSSO-24 package dimensions
VND5E050MCJ-E, VND5E050MCK-E Package and packing information
Doc ID 022514 Rev 2 35/40
Table 17. PowerSSO-24 mechanical data
Symbol
Millimeters
Min. Typ. Max.
A 2.15 2.47
A2 2.15 2.40
a1 0 0.075
b 0.33 0.51
c 0.23 0.32
D 10.10 10.50
E7.4 7.6
e0.8
e3 8.8
G0.1
G1 0.06
H 10.1 10.5
h0.4
L 0.55 0.85
N 10deg
X4.1 4.7
Y6.5 7.1
Package and packing information VND5E050MCJ-E, VND5E050MCK-E
36/40 Doc ID 022514 Rev 2
5.4 PowerSSO-12 packing information
Figure 42. PowerSSO-12 tube shipment (no suffix)
Figure 43. PowerSSO-12 tape and reel shipment (suffix “TR”)
All dimensions are in mm.
Base q.ty 100
Bulk q.ty 2000
Tube length (± 0.5) 532
A1.85
B6.75
C (± 0.1) 0.6
A
C
B
Reel dimensions
Base q.ty 2500
Bulk q.ty 2500
A (max) 330
B (min) 1.5
C (± 0.2) 13
F 20.2
G (+ 2 / -0) 12.4
N (min) 60
T (max) 18.4
Tape dimensions
According to Electronic Industries Association
(EIA) Standard 481 rev. A, Feb. 1986
All dimensions are in mm.
Tape width W 12
Tape hole spacing P0 (± 0.1) 4
Component spacing P 8
Hole diameter D (± 0.05) 1.5
Hole diameter D1 (min) 1.5
Hole position F (± 0.1) 5.5
Compartment depth K (max) 4.5
Hole spacing P1 (± 0.1) 2
Top
cover
tape
End
Start
No componentsNo components Components
500mm min
500mm min
Empty components pockets
saled with cover tape.
User direction of feed
VND5E050MCJ-E, VND5E050MCK-E Package and packing information
Doc ID 022514 Rev 2 37/40
5.5 PowerSSO-24 packing information
Figure 44. PowerSS0-24 tube shipment (no suffix)
Figure 45. PowerSSO-24 tape and reel shipment (suffix “TR”)
All dimensions are in mm.
Base qty 49
Bulk qty 1225
Tube length (±0.5) 532
A3.5
B13.8
C (±0.1) 0.6
A
C
B
Reel dimensions
Base qty 1000
Bulk qty 1000
A (max) 330
B (min) 1.5
C (±0.2) 13
F20.2
G (+2 / -0) 24.4
N (min) 100
T (max) 30.4
Tape dimensions
According to Electronic Industries Association
(EIA) Standard 481 rev. A, Feb. 1986
All dimensions are in mm.
Tape width W 24
Tape hole spacing P0 (±0.1) 4
Component spacing P 12
Hole diameter D (±0.05) 1.55
Hole diameter D1 (min) 1.5
Hole position F (±0.1) 11.5
Compartment depth K (max) 2.85
Hole spacing P1 (±0.1) 2
Top
cover
tape
End
Start
No componentsNo components Components
500mm min 500mm min
Empty components pockets
sealed with cover tape.
User direction of feed
Order codes VND5E050MCJ-E, VND5E050MCK-E
38/40 Doc ID 022514 Rev 2
6 Order codes
Table 18. Device summary
Package
Order codes
Tube Tape and reel
PowerSSO-12 VND5E050MCJ-E VND5E050MCJTR-E
PowerSSO-24 VND5E050MCK-E VND5E050MCKTR-E
VND5E050MCJ-E, VND5E050MCK-E Revision history
Doc ID 022514 Rev 2 39/40
7 Revision history
Table 19. Document revision history
Date Revision Changes
21-Nov-2011 1 Initial release.
18-Sep-2013 2 Updated disclaimer.
VND5E050MCJ-E, VND5E050MCK-E
40/40 Doc ID 022514 Rev 2
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