TLV2470, TLV2471, TLV2472, TLV2473, TLV2474, TLV2475, TLV247xA FAMILY OF 600-A/Ch 2.8-MHz RAIL-TO-RAIL INPUT/OUTPUT HIGH-DRIVE OPERATIONAL AMPLIFIERS WITH SHUTDOWN SLOS232A - JUNE 1999 - REVISED AUGUST 1999 D D D D D D D D D TLV2470 DBV PACKAGE (TOP VIEW) CMOS Rail-To-Rail Input/Output Input Bias Current . . . 2.5 pA Low Supply Current . . . 600 A/Channel Ultra-Low Power Shutdown Mode IDD(SHDN) . . . 350 nA/ch at 3 V IDD(SHDN) . . . 1000 nA/ch at 5 V Gain-Bandwidth Product . . . 2.8 MHz High Output Drive Capability - 10 mA at 180 mV - 35 mA at 500 mV Input Offset Voltage . . . 250 V (typ) Supply Voltage Range . . . 2.7 V to 6 V Ultra-Small Packaging - 5 or 6 Pin SOT-23 (TLV2470/1) - 8 or 10 Pin MSOP (TLV2472/3) OUT 1 6 VDD+ GND 2 5 SHDN IN+ 3 4 IN - This device is in the Product Preview stage of development. Please contact your local TI sales office for availability. description The TLV247x is a family of CMOS rail-to-rail input/output operational amplifiers that establishes a new performance point for supply current versus ac performance. These devices consume just 600 A/channel while offering 2.8 MHz of gain bandwidth product. Along with increased ac performance, the amplifier provides high output drive capability, solving a major shortcoming of older micropower operational amplifiers. The TLV247x can swing to within 180 mV of each supply rail while driving a 10-mA load. For non-RRO applications, the TLV247x can supply 35 mA at 500 mV off the rail. Both the inputs and outputs swing rail-to-rail for increased dynamic range in low-voltage applications. This performance makes the TLV247x family ideal for sensor interface, portable medical equipment, and other data acquisition circuits. FAMILY PACKAGE TABLE PACKAGE TYPES NUMBER OF CHANNELS PDIP SOIC TLV2470 1 8 TLV2471 1 8 TLV2472 2 TLV2473 2 TLV2474 4 14 DEVICE SHUTDOWN UNIVERSAL EVM BOARD -- Yes UNIV-OPAMP-2 -- -- UNIV-OPAMP-1 8 -- UNIV-OPAMP-1 10 Yes UNIV-OPAMP-2 -- -- TSSOP MSOP 8 SOT-23 6 -- 8 5 -- 8 8 -- -- 14 14 -- 14 -- -- 14 -- 16 TLV2475 4 16 16 -- -- Yes -- This device is in the Product Preview stage of development. Please contact your local TI sales office for availability. A SELECTION OF SINGLE-SUPPLY OPERATIONAL AMPLIFIER PRODUCTS DEVICE VDD (V) TLV247X 2.7 - 6.0 TLV245X 2.7 - 6.0 TLV246X 2.7 - 6.0 6.4 TLV277X 2.5 - 6.0 5.1 BW (MHz) SLEW RATE (V/s) IDD (per channel) (A) RAIL-TO-RAIL 2.8 1.5 600 I/O 0.22 0.11 23 I/O 1.6 550 I/O 10.5 1000 O All specifications measured at 5 V. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Copyright 1999, Texas Instruments Incorporated This document contains information on products in more than one phase of development. The status of each device is indicated on the page(s) specifying its electrical characteristics. POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 1 TLV2470, TLV2471, TLV2472, TLV2473, TLV2474, TLV2475, TLV247xA FAMILY OF 600-A/Ch 2.8-MHz RAIL-TO-RAIL INPUT/OUTPUT HIGH-DRIVE OPERATIONAL AMPLIFIERS WITH SHUTDOWN SLOS232A - JUNE 1999 - REVISED AUGUST 1999 TLV2470 and TLV2471 AVAILABLE OPTIONS PACKAGED DEVICES TA SOT-23 SMALL OUTLINE (D) 0C to 70C - 40C to 125C CHIP FORM (Y) PLASTIC DIP (P) (DBV) SYMBOL TLV2470CD TLV2471CD TLV2470CDBV TLV2471CDBV VAUC VAVC TLV2470CP TLV2471CP TLV2470Y TLV2471Y TLV2470ID TLV2471ID TLV2470IDBV TLV2471IDBV VAUI VAVI TLV2470IP TLV2471IP -- -- -- -- -- -- TLV2470AIP TLV2471AIP -- -- TLV2470AID TLV2471AID This package is available taped and reeled. To order this packaging option, add an R suffix to the part number (e.g., TLV2470CDR). Chip forms are tested at TA = 25C only. This device is in the Product Preview stage of development. Please contact your local TI sales office for availability. TLV2472 AND TLV2473 AVAILABLE OPTIONS PACKAGED DEVICES TA 0C to 70C - 40C to 125C SMALL OUTLINE (D) (DGN) SYMBOL (DGQ) TLV2472CD TLV2473CD TLV2472CDGN -- xxTIABU -- TLV2472ID TLV2473ID TLV2472IDGN -- TLV2472AID TLV2473AID -- -- CHIP FORM (Y) SYMBOL PLASTIC DIP (N) PLASTIC DIP (P) -- TLV2473CDGQ -- xxTIABW -- TLV2473CN TLV2472CP -- TLV2472Y TLV2473Y xxTIABV -- -- TLV2473IDGQ -- xxTIABX -- TLV2473IN TLV2472IP -- -- -- -- -- -- -- -- -- -- TLV2473AIN TLV2472AIP -- -- -- MSOP MSOP This package is available taped and reeled. To order this packaging option, add an R suffix to the part number (e.g., TLV2472CDR). Chip forms are tested at TA = 25C only. xx represents the device date code. TLV2474 and TLV2475 AVAILABLE OPTIONS PACKAGED DEVICES TA 0C to 70C - 40C to 125C CHIP FORM (Y) SMALL OUTLINE (D) PLASTIC DIP (N) TSSOP (PW) TSSOP (PWP) TLV2474CD TLV2475CD TLV2474CN TLV2475CN TLV2475CPW TLV2474CPWP TLV2474Y TLV2475Y TLV2474ID TLV2475ID TLV2474IN TLV2475IN TLV2475IPW TLV2475CPWP -- -- TLV2474AID TLV2475AID TLV2474AIN TLV2475AIN TLV2475AIPW TLV2475CPWP -- -- This package is available taped and reeled. To order this packaging option, add an R suffix to the part number (e.g., TLV2474CDR). Chip forms are tested at TA = 25C only. This device is in the Product Preview stage of development. Please contact your local TI sales office for availability. 2 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 TLV2470, TLV2471, TLV2472, TLV2473, TLV2474, TLV2475, TLV247xA FAMILY OF 600-A/Ch 2.8-MHz RAIL-TO-RAIL INPUT/OUTPUT HIGH-DRIVE OPERATIONAL AMPLIFIERS WITH SHUTDOWN SLOS232A - JUNE 1999 - REVISED AUGUST 1999 TLV247x PACKAGE PINOUTS TLV2470 D OR P PACKAGE (TOP VIEW) TLV2470 DBV PACKAGE (TOP VIEW) OUT 1 6 VDD+ GND 2 5 SHDN IN+ 3 4 IN - TLV2471 D OR P PACKAGE (TOP VIEW) NC IN - IN + GND 1OUT 1IN - 1IN+ GND NC 1SHDN NC 1 8 2 7 3 6 4 5 NC IN - IN + GND 1 8 2 7 3 6 4 5 TLV2471 DBV PACKAGE (TOP VIEW) SHDN VDD+ OUT NC 1OUT 1IN - 1IN + GND 1 8 2 7 3 6 4 5 VDD+ 2OUT 2IN - 2IN+ TLV2473 D OR N PACKAGE TLV2474 D, N, OR PWP PACKAGE (TOP VIEW) (TOP VIEW) 14 2 13 3 12 4 5 6 7 11 10 9 8 1 GND 2 IN+ 3 VDD+ 2OUT 2IN - 2IN+ NC 2SHDN NC 1OUT 1IN - 1IN+ VDD+ 2IN+ 2IN - 2OUT 1 14 2 13 3 12 4 11 5 10 6 9 7 8 5 VDD+ 4 IN - TLV2473 DGQ PACKAGE (TOP VIEW) TLV2472 D, DGN, OR P PACKAGE (TOP VIEW) NC VDD+ OUT NC 1 OUT 1OUT 1IN - 1IN+ GND 1SHDN 1 2 3 4 5 10 9 8 7 6 VDD+ 2OUT 2IN - 2IN+ 2SHDN TLV2475 D, N, PW OR PWP PACKAGE (TOP VIEW) 4OUT 4IN - 4IN+ GND 3IN+ 3IN - 3OUT 1OUT 1IN - 1IN+ VDD+ 2IN+ 2IN - 2OUT 1/2SHDN 1 16 2 15 3 14 4 13 5 12 6 11 7 10 8 9 4OUT 4IN - 4IN+ GND 3IN + 3IN- 3OUT 3/4SHDN NC - No internal connection This device is in the Product Preview stage of development. Please contact your local TI sales office for availability. description (continued) Three members of the family (TLV2470/3/5) offer a shutdown terminal for conserving battery life in portable applications. During shutdown, the outputs are placed in a high-impedance state and the amplifier consumes only 350 nA/channel. The family is fully specified at 3 V and 5 V across an expanded industrial temperature range (- 40C to 125C). The singles and duals are available in the SOT23 and MSOP packages, while the quads are available in TSSOP. The TLV2470 offers an amplifier with shutdown functionality all in a 6-pin SOT23 package, making it perfect for high density power-sensitive circuits. POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 3 TLV2470, TLV2471, TLV2472, TLV2473, TLV2474, TLV2475, TLV247xA FAMILY OF 600-A/Ch 2.8-MHz RAIL-TO-RAIL INPUT/OUTPUT HIGH-DRIVE OPERATIONAL AMPLIFIERS WITH SHUTDOWN SLOS232A - JUNE 1999 - REVISED AUGUST 1999 absolute maximum ratings over operating free-air temperature range (unless otherwise noted) Supply voltage, VDD (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Differential input voltage, VID . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDD Continuous total power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table Operating free-air temperature range, TA: C suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0C to 70C I suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . - 40C to 125C Maximum junction temperature, TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150C Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . - 65C to 150C Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260C Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTE: All voltage values, except differential voltages, are with respect to VDD - . DISSIPATION RATING TABLE PACKAGE JC (C/W) JA (C/W) TA 25C POWER RATING D (8) 38.3 176 710 mW D (14) 26.9 122.3 1022 mW D (16) 25.7 114.7 1090 mW DBV (5) 55 324.1 385 mW DBV (6) 55 294.3 425 mW DGN (8) 4.7 52.7 2.37 W DGQ (10) 4.7 52.3 2.39 W N (14, 16) 32 78 1600 mW P (8) 41 104 1200 mW PW (16) 28.7 161.4 720 mW PWP (14) 2.07 30.7 4.07 W PWP (16) 2.07 29.7 4.21 W recommended operating conditions MIN MAX 2.7 6 Split supply 1.35 3 C-suffix VDD- 0 VDD+ 70 - 40 125 Single supply Supply voltage voltage, VDD Common-mode input voltage range, VICR Operating free-air free air temperature, temperature TA 4 I-suffix POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 UNIT V V C TLV2470, TLV2471, TLV2472, TLV2473, TLV2474, TLV2475, TLV247xA FAMILY OF 600-A/Ch 2.8-MHz RAIL-TO-RAIL INPUT/OUTPUT HIGH-DRIVE OPERATIONAL AMPLIFIERS WITH SHUTDOWN SLOS232A - JUNE 1999 - REVISED AUGUST 1999 electrical characteristics at specified free-air temperature, VDD = 3 V (unless otherwise noted) PARAMETER TEST CONDITIONS TLV247x VIO IIO Input offset current VDD = 1.5 1 15V VIC = 0, VO = 0, RS = 50 Input bias current TLV247xC Full range TLV247xI Full range 1.5 100 300 Full range 300 RS = 50 25C -0.2 to 3.2 Full range -0.2 to 3.2 25C 2.85 Full range 2.8 25C 2.6 Full range 2.5 VIC = 1.5 15V IOL = 10 mA Short circuit output current Short-circuit IO Output current AVD Large-signal g g differential voltage g amplification ri(d) Differential input resistance CIC Common-mode input capacitance VO(PP) = 1 V V, 0.2 Full range 20 25C 62 TLV247xC Full range 60 TLV247xI Full range 59 25C 30 Full range 20 25C 62 TLV247xC Full range 60 TLV247xI Full range 59 f = 10 kHz 25C 90 Full range 88 * DALLAS, TEXAS 75265 0.35 V 116 mA dB 25C 1012 25C 19.3 pF 2 zo Closed-loop output impedance f = 10 kHz, AV = 10 25C Full range is 0C to 70C for C suffix and - 40C to 125C for I suffix. If not specified, full range is - 40C to 125C. Depending on package dissipation rating POST OFFICE BOX 655303 0.15 mA 22 25C RL = 10 k pA 0.4 Full range VO = 0.5 V from rail pA V 2.74 0.2 25C pA 2.94 0.07 30 Sinking Sinking, Si ki Outside of rails 25C pA V Full range 25C Sourcing IOS 50 TLV247xI VIC = 1.5 15V Sourcing, S i Outside of rails 2 100 IOL = 2 2.5 5 mA Low level output voltage Low-level 50 Full range RS = 50 V V/C TLV247xC IOH = - 10 mA VOL 1600 UNIT 1800 25C IOH = - 2.5 2 5 mA High level output voltage High-level 2200 04 0.4 Common-mode input voltage g range CMRR > 52 dB VOH 250 Full range CMRR > 70 dB VICR MAX 250 25C IIB TYP 2400 25C TLV247xA VIO MIN Full range Input offset voltage Temperature coefficient of input offset voltage TA 25C 5 TLV2470, TLV2471, TLV2472, TLV2473, TLV2474, TLV2475, TLV247xA FAMILY OF 600-A/Ch 2.8-MHz RAIL-TO-RAIL INPUT/OUTPUT HIGH-DRIVE OPERATIONAL AMPLIFIERS WITH SHUTDOWN SLOS232A - JUNE 1999 - REVISED AUGUST 1999 electrical characteristics at specified free-air temperature, VDD = 3 V (unless otherwise noted) (continued) PARAMETER VIC = 0 to t 3 V, V RS = 50 CMRR kSVR Common mode rejection ratio Common-mode Supply y voltage g rejection j ratio (VDD /VIO) TA MIN TYP 25C 61 78 TLV247xC Full range 59 TLV247xI Full range 58 25C 62 TEST CONDITIONS VIC = -0.2 0.2 to 3.2 V, RS = 50 , Outside of rails TLV247xC Full range 60 TLV247xI Full range 59 VDD = 2.7 V to 6 V,, No load VIC = VDD /2,, VDD = 3 V to 5 V,, No load VIC = VDD /2,, 25C 74 Full range 66 25C 77 Full range 68 25C MAX UNIT dB 78 90 dB 92 550 750 A IDD Supply current (per channel) VO = 1 1.5 5 V, V V(ON) V(OFF) Turnon voltage level Relative to GND 25C 1.03 V Turnoff voltage level Relative to GND 25C 0.81 V Supply Su ly current in shutdown mode (TLV2470, TLV2473, TLV2475) (per channel) 25C 350 SHDN = < 1.45 V IDD(SHDN) ( ) No load TLV247xC Full range 800 Full range 1500 2000 TLV247xI Full range Full range is 0C to 70C for C suffix and - 40C to 125C for I suffix. If not specified, full range is - 40C to 125C. nA 4000 operating characteristics at specified free-air temperature, VDD = 3 V (unless otherwise noted) PARAMETER SR Slew rate at unity gain Vn Equivalent input noise voltage In THD + N t(on) t(off) m VO(PP) = 0.8 V,, RL = 10 k CL = 150 pF,, TA 25C MIN TYP 1.1 1.4 Full range 0.6 f = 100 Hz 25C 28 f = 1 kHz 25C 15 Equivalent input noise current f = 1 kHz 25C 0.405 Total harmonic distortion plus noise VO(PP) = 2 V, RL = 10 k, f = 1 kHz Amplifier turnon time Amplifier turnoff time Gain-bandwidth product ts TEST CONDITIONS Settling time Phase margin AV = 1 AV = 10 f = 10 kHz, RL = 600 V(STEP)PP = 2 V, AV = -1,, CL = 10 pF, RL = 10 k 0.1% V(STEP)PP = 2 V, AV = -1,, CL = 56 pF, RL = 10 k 0.1% RL = 10 k, CL = 1000 pF POST OFFICE BOX 655303 nV/Hz pA /Hz 0.1% 25C 5 s 25C 250 ns 25C 2.8 MHz 1.5 0.01% 3.9 s 25C 1.6 0.01% * DALLAS, TEXAS 75265 V/s 0.5% 4 25C Gain margin 25C RL = 10 k, CL = 1000 pF Full range is 0C to 70C for C suffix and - 40C to 125C for I suffix. If not specified, full range is - 40C to 125C. Depending on package dissipation rating 6 UNIT 0.02% 25C AV = 100 RL = OPEN MAX 61 15 dB TLV2470, TLV2471, TLV2472, TLV2473, TLV2474, TLV2475, TLV247xA FAMILY OF 600-A/Ch 2.8-MHz RAIL-TO-RAIL INPUT/OUTPUT HIGH-DRIVE OPERATIONAL AMPLIFIERS WITH SHUTDOWN SLOS232A - JUNE 1999 - REVISED AUGUST 1999 electrical characteristics at specified free-air temperature, VDD = 5 V (unless otherwise noted) PARAMETER TEST CONDITIONS TLV247x VIO IIO Input offset current Input bias current 1.7 100 pA 300 pA 100 TLV247xI Full range 300 RS = 50 25C -0.2 to 5.2 Full range -0.2 to 5.2 25C 4.85 RS = 50 AVD Large-signal g g differential voltage g amplification ri(d) Differential input resistance CIC Common-mode input capacitance 4.72 Full range 4.65 25C 0.178 Full range 63 TLV247xC Full range 61 TLV247xI Full range 58 25C 110 Full range 60 25C 63 TLV247xC Full range 61 TLV247xI Full range 58 * DALLAS, TEXAS 75265 0.28 V mA 35 25C 25C 92 Full range 91 120 mA dB 25C 1012 25C 18.9 pF 1.8 zo Closed-loop output impedance f = 10 kHz, AV = 10 25C Full range is 0C to 70C for C suffix and - 40C to 125C for I suffix. If not specified, full range is - 40C to 125C. Depending on package dissipation rating POST OFFICE BOX 655303 0.15 0.35 60 f = 10 kHz V 4.82 0.2 25C RL = 10 k pA 4.96 0.07 25C pA V Full range Full range VO = 0.5 V from rail VO(PP) = 3 V V, 4.8 25C 90 Sinking Output current Full range 25C Sourcing IO 50 Full range IOL = 10 mA Sinking, Si ki Outside of rails 2.5 TLV247xC VIC = 2.5 25V Short circuit output current Short-circuit pA Full range IOL = 2 2.5 5 mA IOS 50 Full range VIC = 2.5 25V Sourcing, S i Outside of rails V/C TLV247xI IOH = - 10 mA Low level output voltage Low-level V TLV247xC IOH = - 2.5 2 5 mA VOL 1600 UNIT 2000 25C Common-mode input voltage g range High level output voltage High-level 2200 04 0.4 VDD = 2.5 2 V VIC = 0, 0 VO = 0 0, RS = 50 CMRR > 52 dB VOH 250 Full range CMRR > 70 dB VICR MAX 250 25C IIB TYP 2400 25C TLV247xA VIO MIN Full range Input offset voltage Temperature coefficient of input offset voltage TA 25C 7 TLV2470, TLV2471, TLV2472, TLV2473, TLV2474, TLV2475, TLV247xA FAMILY OF 600-A/Ch 2.8-MHz RAIL-TO-RAIL INPUT/OUTPUT HIGH-DRIVE OPERATIONAL AMPLIFIERS WITH SHUTDOWN SLOS232A - JUNE 1999 - REVISED AUGUST 1999 electrical characteristics at specified free-air temperature, VDD = 5 V (unless otherwise noted) (continued) PARAMETER VIC = 0 to t 5 V, V RS = 50 CMRR kSVR Common mode rejection ratio Common-mode Supply y voltage g rejection j ratio (VDD /VIO) TA MIN TYP 25C 64 84 TLV247xC Full range 63 TLV247xI Full range 58 25C 63 TEST CONDITIONS VIC = -0.2 0.2 to 5.2 V, RS = 50 , Outside of rails TLV247xC Full range 61 TLV247xI Full range 58 VDD = 2.7 V to 6 V,, No load VIC = VDD /2,, VDD = 3 V to 5 V,, No load VIC = VDD /2,, 25C 74 Full range 66 25C 77 Full range 66 25C MAX UNIT dB 82 90 dB 92 600 900 A IDD Supply current (per channel) VO = 2 2.5 5 V, V V(ON) V(OFF) Turnon voltage level Relative to GND 25C 1.38 V Turnoff voltage level Relative to GND 25C 1.3 V Supply Su ly current in shutdown mode (TLV2470, TLV2473, TLV2475) (per channel) 25C 1000 SHDN = < 1.45 V IDD(SHDN) ( ) No load TLV247xC Full range 1000 Full range 2500 3000 TLV247xI Full range Full range is 0C to 70C for C suffix and - 40C to 125C for I suffix. If not specified, full range is - 40C to 125C. 6000 nA nA operating characteristics at specified free-air temperature, VDD = 5 V (unless otherwise noted) PARAMETER SR Slew rate at unity gain Vn Equivalent input noise voltage In THD + N t(on) t(off) m VO(PP) = 2 V,, RL = 10 k CL = 150 pF,, TA 25C MIN TYP 1.1 1.5 Full range 0.7 f = 100 Hz 25C 28 f = 1 kHz 25C 15 Equivalent input noise current f = 1 kHz 25C 0.39 Total harmonic distortion plus noise VO(PP) = 4 V, RL = 10 k, f = 1 kHz Amplifier turnon time Amplifier turnoff time Gain-bandwidth product ts TEST CONDITIONS Settling time Phase margin AV = 1 AV = 10 f = 10 kHz, RL = 600 V(STEP)PP = 2 V, AV = -1,, CL = 10 pF, RL = 10 k 0.1% V(STEP)PP = 2 V, AV = -1,, CL = 56 pF, RL = 10 k 0.1% RL = 10 k, CL = 1000 pF UNIT V/s nV/Hz pA /Hz 0.01% 25C AV = 100 RL = OPEN MAX 0.05% 0.3% 25C 5 s 25C 250 ns 25C 2.8 MHz 1.8 0.01% 3.3 s 25C 1.7 0.01% 3 25C 68 Gain margin 25C 23 dB RL = 10 k, CL = 1000 pF Full range is 0C to 70C for C suffix and - 40C to 125C for I suffix. If not specified, full range is - 40C to 125C. Disable and enable time are defined as the interval between application of logic signal to SHDN and the point at which the supply current has reached half its final value. 8 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 TLV2470, TLV2471, TLV2472, TLV2473, TLV2474, TLV2475, TLV247xA FAMILY OF 600-A/Ch 2.8-MHz RAIL-TO-RAIL INPUT/OUTPUT HIGH-DRIVE OPERATIONAL AMPLIFIERS WITH SHUTDOWN SLOS232A - JUNE 1999 - REVISED AUGUST 1999 TYPICAL CHARACTERISTICS INPUT OFFSET VOLTAGE vs COMMON-MODE INPUT VOLTAGE INPUT OFFSET VOLTAGE vs COMMON-MODE INPUT VOLTAGE 600 TA=25 C 200 0 -200 -400 -600 -800 -0.5 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 VICR - Common-Mode Input Voltage - V 400 TA=25 C 200 0 -200 -400 -600 -800 -0.5 0.5 1.5 2.5 3.5 4.5 5.5 VICR - Common-Mode Input Voltage - V INPUT BIAS AND INPUT OFFSET CURRENTS vs FREE-AIR TEMPERATURE IIB 10 0 IIO -10 -55 -35 -15 5 25 45 65 85 105 125 TA - Free-Air Temperature - C VDD=3 V 3.0 2.5 2.0 TA=125C 1.5 TA=85C 1.0 TA=25C 0.5 TA=-40C 0 3.5 3.0 1.5 TA=25C 0.5 TA=-40C 0 TA=-40C 1.0 0.5 10 20 30 40 50 IOL - Low Level Output Current - mA Figure 6 20 40 60 80 100 120 140 160 IOH - High Level Output Current - mA OUTPUT IMPEDANCE vs FREQUENCY 1000 4.5 TA=125C 4.0 TA=85C 3.5 VDD=3 & 5 V TA=25C TA=25C 3.0 TA=-40C 2.5 2.0 1.5 1.0 100 AV=100 10 AV=10 1 AV=1 0.1 0.5 VDD=5 V 0 Figure 7 TA=25C 1.5 0 Z o - Output Impedance - 4.0 1.0 TA=85C LOW LEVEL OUTPUT VOLTAGE vs LOW LEVEL OUTPUT CURRENT VOL - Low-Level Output Voltage - V 4.5 TA=85C TA=125C 2.0 10 20 30 40 50 60 IOH - High Level Output Current - mA 5.0 VDD=5 V TA=125C VDD=3 V 2.5 Figure 5 5.5 2.0 IIO 0 0 HIGH LEVEL OUTPUT VOLTAGE vs HIGH LEVEL OUTPUT CURRENT 2.5 0 3.0 Figure 4 5.0 10 LOW LEVEL OUTPUT VOLTAGE vs LOW LEVEL OUTPUT CURRENT VOL - Low-Level Output Voltage - V 20 V OH - High-Level Output Voltage - V I IB - Input Bias Current - pA I IO - Input Offset Current - pA 30 IIB 20 Figure 3 3.5 40 30 HIGH LEVEL OUTPUT VOLTAGE vs HIGH LEVEL OUTPUT CURRENT 50 VDD=5 V 40 -10 -55 -35 -15 5 25 45 65 85 105 125 TA - Free-Air Temperature - C Figure 2 Figure 1 0 VDD=3 V I IB - Input Bias Current - pA 400 50 VDD=5 V I IO - Input Offset Current - pA VDD=3 V VIO - Input Offset Voltage - V VIO - Input Offset Voltage - V 600 V OH - High-Level Output Voltage - V INPUT BIAS AND INPUT OFFSET CURRENTS vs FREE-AIR TEMPERATURE 0 20 40 60 80 100 120 140 IOL - Low Level Output Current - mA Figure 8 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 0.01 100 1k 10k 100k f - Frequency - Hz 1M 10M Figure 9 9 TLV2470, TLV2471, TLV2472, TLV2473, TLV2474, TLV2475, TLV247xA FAMILY OF 600-A/Ch 2.8-MHz RAIL-TO-RAIL INPUT/OUTPUT HIGH-DRIVE OPERATIONAL AMPLIFIERS WITH SHUTDOWN SLOS232A - JUNE 1999 - REVISED AUGUST 1999 TYPICAL CHARACTERISTICS POWER SUPPLY REJECTION RATIO vs FREQUENCY 0.7 0.6 TA=25C 0.5 TA=-40C 0.4 0.3 0.2 AV= 1 SHDN= VDD Per Channel 0.1 0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 VDD - Supply Voltage - V PSRR+ 90 80 PSRR- 70 60 50 40 30 10 6.0 100 80 VDD=3 & 5 V AV= 10 VIN= VDD/2 TA=25C 50 40 30 20 10 0 10 100 1k 10k f - Frequency - Hz 100k V O(PP) - Maximum Peak-To-Peak Output Voltage - V V n - Equivalent Input Noise Voltage - nV/ Hz EQUIVALENT NOISE VOLTAGE vs FREQUENCY 60 1k 10k 100k f - Frequency - Hz 5.0 4.5 VO(PP)=5 V 4.0 3.5 3.0 2.5 VO(PP)=3 V 2.0 1.5 1.0 0.5 0 10k 100k f - Frequency - Hz 1M VDD=5 V 90 VIC=2.5 V 80 70 60 50 100 VDD=3 V VIC=1.5 V 1k 0 -45 40 -90 20 -135 0 -180 -20 -225 10k 100k 1M Frequency - Hz 10M 10k 100k f - Frequency - Hz -270 100M 10M MAXIMUM PEAK-TO-PEAK OUTPUT VOLTAGE vs FREQUENCY 5.5 THD+N 2.0% RL=600 TA=25C 5.0 4.5 4.0 VO(PP)=5 V 3.5 3.0 2.5 2.0 VO(PP)=3 V 1.5 1.0 0.5 0 10k 100k f - Frequency - Hz DIFFERENTIAL VOLTAGE GAIN AND PHASE vs FREQUENCY 45 VDD=2.5 RL=600 CL=0 TA=25C 80 60 0 -45 40 -90 20 -135 0 -180 -20 -225 -40 100 1k 1M 10k 100k Frequency - Hz Figure 17 POST OFFICE BOX 655303 1M Figure 15 Figure 16 10 100 100 Phase - AVD - Differential Voltage Gain - dB THD+N 2.0% RL=10 k TA=25C 45 VDD=1.5 RL=600 CL=0 TA=25C 1k 110 Figure 14 100 60 120 Figure 12 5.5 DIFFERENTIAL VOLTAGE GAIN AND PHASE vs FREQUENCY 80 10M MAXIMUM PEAK-TO-PEAK OUTPUT VOLTAGE vs FREQUENCY Figure 13 -40 100 1M 130 Figure 11 Figure 10 70 VDD=3 & 5 V RF=5 k RI=50 TA=25C V O(PP) - Maximum Peak-To-Peak Output Voltage - V TA=85C 0.8 100 * DALLAS, TEXAS 75265 10M -270 100M Phase - TA=125C AVD - Differential Voltage Gain - dB I DD - Supply Current - mA 0.9 PSRR - Power Supply Rejection Raio - dB 1.0 COMMON-MODE REJECTION RATIO vs FREQUENCY CMRR - Common-Mode Rejection Ratio - dB SUPPLY CURRENT vs SUPPLY VOLTAGE 1M TLV2470, TLV2471, TLV2472, TLV2473, TLV2474, TLV2475, TLV247xA FAMILY OF 600-A/Ch 2.8-MHz RAIL-TO-RAIL INPUT/OUTPUT HIGH-DRIVE OPERATIONAL AMPLIFIERS WITH SHUTDOWN SLOS232A - JUNE 1999 - REVISED AUGUST 1999 TYPICAL CHARACTERISTICS PHASE MARGIN vs LOAD CAPACITANCE PHASE MARGIN vs LOAD CAPACITANCE 90 60 Rnull=50 80 Rnull=100 50 Rnull=20 40 30 20 10 0 VDD=5V RL=10 k TA=25C See Figure 42 90 VDD=3V RL=10 k TA=25C Rnull=50 5 Rnull=0 70 Gain Margin - dB 70 100 VDD=3 V RL=10 k TA=25C See Figure 42 m - Phase Margin - m - Phase Margin - 80 GAIN MARGIN vs LOAD CAPACITANCE Rnull=100 60 50 40 30 10 15 Rnull=20 Rnull=20 20 25 Rnull=0 0 100 10 1k 10k CL - Load Capacitance - pF Rnull=50 Rnull=0 0 100 100k 1k 10k CL - Load Capacitance - pF Figure 18 30 100 100k 1k 10k CI - Load Capacitance - pF Figure 19 GAIN MARGIN vs LOAD CAPACITANCE 0 4.0 5 3.5 SLEW RATE vs SUPPLY VOLTAGE 2.0 Rnull=20 20 Rnull=50 Rnull=100 VDD=5V RL=10 k TA=25C 30 3.0 RL=600 2.5 2.0 1.5 CL=11 pF f=10 kHz TA=25C 1.0 1k 10k CI - Load Capacitance - pF 1.2 1.0 0.8 0.6 0 2.5 Figure 21 3.0 3.5 4.0 4.5 5.0 5.5 VDD - Supply Voltage - V 2.5 6.0 1.75 1.75 SR+ SR- 1.00 0.75 0.25 6.0 SLEW RATE vs FREE-AIR TEMPERATURE 2.00 0.50 3.5 4.0 4.5 5.0 5.5 VDD - Supply Voltage - V Figure 23 2.00 1.25 3.0 Figure 22 SLEW RATE vs FREE-AIR TEMPERATURE 1.50 VO(PP)=1.5 V AV=-1 RL=10 k CL=150 pF 0.2 0.5 100k SR+ 1.4 0 35 100 SR- 1.6 0.4 SR - Slew Rate - V/s 25 SR - Slew Rate - V/s Gain Margin - dB 15 RL=10 k SR - Slew Rate - V/s Gain-Bandwidth Product - MHz 1.8 Rnull=0 100k Figure 20 GAIN BANDWIDTH PRODUCT vs SUPPLY VOLTAGE 10 Rnull=100 20 VDD=3 V RL=10 k CL=150 pF AV=-1 SR+ 1.25 1.00 0.75 0.50 0.25 0 -55 -35 -15 5 25 45 65 85 105 125 TA - Free-Air Temperature - C SR- 1.50 VDD=5 V RL=10 k CL=150 pF AV=-1 0 -55 -35 -15 5 25 45 65 85 105 125 TA - Free-Air Temperature - C Figure 24 Figure 25 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 11 TLV2470, TLV2471, TLV2472, TLV2473, TLV2474, TLV2475, TLV247xA FAMILY OF 600-A/Ch 2.8-MHz RAIL-TO-RAIL INPUT/OUTPUT HIGH-DRIVE OPERATIONAL AMPLIFIERS WITH SHUTDOWN SLOS232A - JUNE 1999 - REVISED AUGUST 1999 TYPICAL CHARACTERISTICS VDD = 3V & 5V AV = 1 RL= 600 VI(PP)=2V All Channels -20 Crosstalk - dB -40 -60 -80 -100 -120 -140 -160 10 100 10 k 1k f - Frequency - Hz 100 k 1 AV = 100 AV = 10 0.1 AV = 1 0.01 VDD = 3 V RL = 10 k V0 = 2 VPP TA = 25C 0.001 10 TOTAL HARMONIC DISTORTION PLUS NOISE vs FREQUENCY THD+N-Total Harmonic Distortion + Noise 0 TOTAL HARMONIC DISTORTION PLUS NOISE vs FREQUENCY THD+N-Total Harmonic Distortion + Noise CROSSTALK vs FREQUENCY 100 1k 10k 1 AV = 100 0.1 AV = 10 AV = 1 0.01 VDD = 5 V RL = 10 k V0 = 4 VPP TA = 25C 0.001 10 100k 100 f - Frequency - Hz Figure 26 Figure 27 LARGE SIGNAL FOLLOWER PULSE RESPONSE vs TIME LARGE SIGNAL FOLLOWER PULSE RESPONSE vs TIME VI (50 mV/DIV) VDD = 3 V RL = 10 k CL = 8 pF f = 85 kHz TA = 25C 3 4 5 6 t - Time - s 7 8 9 10 VO (1 V/DIV) VDD = 5 V RL = 10 k CL = 8 pF f = 85 kHz TA = 25C 0 1 2 3 Figure 29 VDD = 3 V RL = 10 k CL = 8 pF f = 1 MHz TA = 25C V O - Output Voltage V O - Output Voltage V O - Output Voltage VO (1 V/DIV) 2 VO (50 mV/DIV) 4 5 6 t - Time - s 7 8 9 0 10 100 200 300 t - Time - s Figure 30 SMALL SIGNAL FOLLOWER PULSE RESPONSE vs TIME SHUTDOWN (ON AND OFF) PULSE RESPONSE vs TIME SHUTDOWN (ON AND OFF) PULSE RESPONSE vs TIME 400 500 RL = 600 RL = 10 k VO (500 mV/DIV) VDD = 3 V CL = 8 pF TA = 25C 0 2 RL = 600 V O - Output Voltage V O - Output Voltage V O - Output Voltage Figure 32 12 VSHDN (2 V/DIV) VO (50 mV/DIV) 200 300 t - Time - s 500 VSHDN (2 V/DIV) VDD = 5 V RL = 10 k CL = 8 pF f = 1 MHz TA = 25C 100 400 Figure 31 VI (50 mV/DIV) 0 100k SMALL SIGNAL FOLLOWER PULSE RESPONSE vs TIME VI (2 V/DIV) 1 10k Figure 28 VI (2 V/DIV) 0 1k f - Frequency - Hz RL = 10 k VO (1 V/DIV) VDD = 5 V CL = 8 pF TA = 25C 4 6 8 t - Time - s 10 12 14 16 Figure 33 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 0 2 4 6 8 10 t - Time - s Figure 34 12 14 16 18 TLV2470, TLV2471, TLV2472, TLV2473, TLV2474, TLV2475, TLV247xA FAMILY OF 600-A/Ch 2.8-MHz RAIL-TO-RAIL INPUT/OUTPUT HIGH-DRIVE OPERATIONAL AMPLIFIERS WITH SHUTDOWN SLOS232A - JUNE 1999 - REVISED AUGUST 1999 TYPICAL CHARACTERISTICS SHUTDOWN FORWARD ISOLATION vs FREQUENCY I DD(SHDN) - Shutdown Supply Current - A 120 120 100 Shutdown Forward Isolation - dB VDD = 3 & 5 V CL=0 pF AV = 1 VI(PP)=0.1, 1.5, 3 V 80 RL=600 60 RL=10 k 40 20 VDD = 3 & 5 V RL=10 k CL=0 pF AV = 1 VIN=0.1, 1.5, 3 Vp-p 100 80 RL=600 60 RL=10 k 40 20 0 0 100 1k 10k 100k f - Frequency - Hz 1M 100 10M 1k Figure 35 10k 100k f - Frequency - Hz 1M 2.0 1.8 1.6 1.4 TA=125 1.2 TA=85 1.0 TA=25 0.8 TA=-40 0.6 0.4 Shutdown On RL=OPEN VI=VDD/2 0.2 0 2.5 10M 3.0 3.5 4.0 4.5 5.0 5.5 VDD - Supply Voltage - V Figure 36 6.0 Figure 37 SHUTDOWN SUPPLY CURRENT vs FREE-AIR TEMPERATURE I DD - Shutdown Supply Current - A 1.6 SD MODE Channel 1 & 2 AV = 1 RL= OPEN VIN=VDD/2 1.4 1.2 1.0 VDD=5 V 0.8 0.6 0.4 VDD=3 V 0.2 0 -55 -35 -15 5 25 45 65 85 105 125 TA - Free-Air Temperature - C Figure 38 SHUTDOWN PULSE CURRENT vs TIME 4 2 3 1.75 2 1.5 1 1.25 0 IDD RL=10 k 1 -1 0.75 -2 0.5 -3 IDD RL=600 -4 0.25 -5 VDD = 3 V CL=8 pF TA=25C 0 -0.25 -6 -0.5 0 4 8 12 16 20 t - Time - s 24 I DD - Supply Current - mA Shutdown Pulse Shutdown Pulse - V 2 1.75 6 4 Shutdown Pulse 1.5 2 1.25 0 1 IDD RL=10 k -2 0.75 -4 IDD RL=600 0.5 -6 0.25 -7 -0.25 -8 -0.5 -10 -12 0 28 30 -8 VDD = 5 V CL=8 pF TA=25C 0 Shutdown Pulse - V SHUTDOWN PULSE CURRENT vs TIME I DD - Supply Current - mA Shutdown Forward Isolation - dB SHUTDOWN SUPPLY CURRENT vs SUPPLY VOLTAGE SHUTDOWN REVERSE ISOLATION vs FREQUENCY 4 8 12 16 t - Time - s 20 24 28 30 Figure 40 Figure 39 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 13 TLV2470, TLV2471, TLV2472, TLV2473, TLV2474, TLV2475, TLV247xA FAMILY OF 600-A/Ch 2.8-MHz RAIL-TO-RAIL INPUT/OUTPUT HIGH-DRIVE OPERATIONAL AMPLIFIERS WITH SHUTDOWN SLOS232A - JUNE 1999 - REVISED AUGUST 1999 PARAMETER MEASUREMENT INFORMATION Rnull _ + RL CL Figure 41 APPLICATION INFORMATION driving a capacitive load When the amplifier is configured in this manner, capacitive loading directly on the output will decrease the device's phase margin leading to high frequency ringing or oscillations. Therefore, for capacitive loads of greater than 10 pF, it is recommended that a resistor be placed in series (RNULL) with the output of the amplifier, as shown in Figure 42. A minimum value of 20 should work well for most applications. RF RG Input _ RNULL Output TLV247x + CLOAD Figure 42. Driving a Capacitive Load 14 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 TLV2470, TLV2471, TLV2472, TLV2473, TLV2474, TLV2475, TLV247xA FAMILY OF 600-A/Ch 2.8-MHz RAIL-TO-RAIL INPUT/OUTPUT HIGH-DRIVE OPERATIONAL AMPLIFIERS WITH SHUTDOWN SLOS232A - JUNE 1999 - REVISED AUGUST 1999 APPLICATION INFORMATION offset voltage The output offset voltage, (VOO) is the sum of the input offset voltage (VIO) and both input bias currents (IIB) times the corresponding gains. The following schematic and formula can be used to calculate the output offset voltage: RF IIB- RG + - VI VO + RS IIB+ V OO + VIO 1 ) R R F G " IIB) RS 1 ) R R F G " IIB- RF Figure 43. Output Offset Voltage Model general configurations When receiving low-level signals, limiting the bandwidth of the incoming signals into the system is often required. The simplest way to accomplish this is to place an RC filter at the noninverting terminal of the amplifer (see Figure 44). RG RF - VI VO + R1 V O V I C1 + 1 ) RRF G 1 f -3dB 1 + 2pR1C1 ) sR1C1 1 Figure 44. Single-Pole Low-Pass Filter If even more attenuation is needed, a multiple pole filter is required. The Sallen-Key filter can be used for this task. For best results, the amplifier should have a bandwidth that is 8 to 10 times the filter frequency bandwidth. Failure to do this can result in phase shift of the amplifier. POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 15 TLV2470, TLV2471, TLV2472, TLV2473, TLV2474, TLV2475, TLV247xA FAMILY OF 600-A/Ch 2.8-MHz RAIL-TO-RAIL INPUT/OUTPUT HIGH-DRIVE OPERATIONAL AMPLIFIERS WITH SHUTDOWN SLOS232A - JUNE 1999 - REVISED AUGUST 1999 APPLICATION INFORMATION general configurations (continued) C1 + _ VI R1 R1 = R2 = R C1 = C2 = C Q = Peaking Factor (Butterworth Q = 0.707) R2 f C2 RG RF -3dB RG = + 2p1RC ( RF 1 2- Q ) Figure 45. 2-Pole Low-Pass Sallen-Key Filter shutdown function Three members of the TLV247x family (TLV2470/3/5) have a shutdown terminal for conserving battery life in portable applications. When the shutdown terminal is tied low, the supply current is reduced to 350 nA/channel, the amplifier is disabled, and the outputs are placed in a high impedance mode. To enable the amplifier, the shutdown terminal can either be left floating or pulled high. When the shutdown terminal is left floating, care should be taken to ensure that parasitic leakage current at the shutdown terminal does not inadvertently place the operational amplifier into shutdown. The shutdown terminal threshold is always referenced to VDD/2. Therefore, when operating the device with split supply voltages (e.g. 2.5 V), the shutdown terminal needs to be pulled to VDD- (not GND) to disable the operational amplifier. The amplifier's output with a shutdown pulse is shown in Figures 33 and 34. The amplifier is powered with a single 5-V supply and configured as a noninverting configuration with a gain of 5. The amplifier turnon and turnoff times are measured from the 50% point of the shutdown pulse to the 50% point of the output waveform. The times for the single, dual, and quad are listed in the data tables. Figures 35 and 36 show the amplifier's forward and reverse isolation in shutdown. The operational amplifier is powered by 1.35-V supplies and configured as a voltage follower (AV = 1). The isolation performance is plotted across frequency using 0.1-VPP, 1.5-VPP, and 2.5-VPP input signals. During normal operation, the amplifier would not be able to handle a 2.5-VPP input signal with a supply voltage of 1.35 V since it exceeds the common-mode input voltage range (VICR). However, this curve illustrates that the amplifier remains in shutdown even under a worst case scenario. 16 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 TLV2470, TLV2471, TLV2472, TLV2473, TLV2474, TLV2475, TLV247xA FAMILY OF 600-A/Ch 2.8-MHz RAIL-TO-RAIL INPUT/OUTPUT HIGH-DRIVE OPERATIONAL AMPLIFIERS WITH SHUTDOWN SLOS232A - JUNE 1999 - REVISED AUGUST 1999 APPLICATION INFORMATION circuit layout considerations To achieve the levels of high performance of the TLV247x, follow proper printed-circuit board design techniques. A general set of guidelines is given in the following. D D D D D Ground planes - It is highly recommended that a ground plane be used on the board to provide all components with a low inductive ground connection. However, in the areas of the amplifier inputs and output, the ground plane can be removed to minimize the stray capacitance. Proper power supply decoupling - Use a 6.8-F tantalum capacitor in parallel with a 0.1-F ceramic capacitor on each supply terminal. It may be possible to share the tantalum among several amplifiers depending on the application, but a 0.1-F ceramic capacitor should always be used on the supply terminal of every amplifier. In addition, the 0.1-F capacitor should be placed as close as possible to the supply terminal. As this distance increases, the inductance in the connecting trace makes the capacitor less effective. The designer should strive for distances of less than 0.1 inches between the device power terminals and the ceramic capacitors. Sockets - Sockets can be used but are not recommended. The additional lead inductance in the socket pins will often lead to stability problems. Surface-mount packages soldered directly to the printed-circuit board is the best implementation. Short trace runs/compact part placements - Optimum high performance is achieved when stray series inductance has been minimized. To realize this, the circuit layout should be made as compact as possible, thereby minimizing the length of all trace runs. Particular attention should be paid to the inverting input of the amplifier. Its length should be kept as short as possible. This will help to minimize stray capacitance at the input of the amplifier. Surface-mount passive components - Using surface-mount passive components is recommended for high performance amplifier circuits for several reasons. First, because of the extremely low lead inductance of surface-mount components, the problem with stray series inductance is greatly reduced. Second, the small size of surface-mount components naturally leads to a more compact layout thereby minimizing both stray inductance and capacitance. If leaded components are used, it is recommended that the lead lengths be kept as short as possible. POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 17 TLV2470, TLV2471, TLV2472, TLV2473, TLV2474, TLV2475, TLV247xA FAMILY OF 600-A/Ch 2.8-MHz RAIL-TO-RAIL INPUT/OUTPUT HIGH-DRIVE OPERATIONAL AMPLIFIERS WITH SHUTDOWN SLOS232A - JUNE 1999 - REVISED AUGUST 1999 APPLICATION INFORMATION general PowerPAD design considerations The TLV247x is available in a thermally-enhanced PowerPAD family of packages. These packages are constructed using a downset leadframe upon which the die is mounted [see Figure 46(a) and Figure 46(b)]. This arrangement results in the lead frame being exposed as a thermal pad on the underside of the package [see Figure 46(c)]. Because this thermal pad has direct thermal contact with the die, excellent thermal performance can be achieved by providing a good thermal path away from the thermal pad. The PowerPAD package allows for both assembly and thermal management in one manufacturing operation. During the surface-mount solder operation (when the leads are being soldered), the thermal pad can also be soldered to a copper area underneath the package. Through the use of thermal paths within this copper area, heat can be conducted away from the package into either a ground plane or other heat dissipating device. The PowerPAD package represents a breakthrough in combining the small area and ease of assembly of surface mount with the, heretofore, awkward mechanical methods of heatsinking. DIE Side View (a) Thermal Pad DIE End View (b) Bottom View (c) NOTE A: The thermal pad is electrically isolated from all terminals in the package. Figure 46. Views of Thermally Enhanced DGN Package Although there are many ways to properly heatsink the PowerPAD package, the following steps illustrate the recommended approach. Thermal Pad Area Quad Single or Dual 68 mils x 70 mils) with 5 vias (Via diameter = 13 mils Figure 47. PowerPAD PCB Etch and Via Pattern PowerPAD is a trademark of Texas Instruments Incorporated. 18 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 78 mils x 94 mils) with 9 vias (Via diameter = 13 mils) TLV2470, TLV2471, TLV2472, TLV2473, TLV2474, TLV2475, TLV247xA FAMILY OF 600-A/Ch 2.8-MHz RAIL-TO-RAIL INPUT/OUTPUT HIGH-DRIVE OPERATIONAL AMPLIFIERS WITH SHUTDOWN SLOS232A - JUNE 1999 - REVISED AUGUST 1999 APPLICATION INFORMATION general PowerPAD design considerations (continued) 1. Prepare the PCB with a top side etch pattern as shown in Figure 47. There should be etch for the leads as well as etch for the thermal pad. 2. Place five holes (dual) or nine holes (quad) in the area of the thermal pad. These holes should be 13 mils in diameter. Keep them small so that solder wicking through the holes is not a problem during reflow. 3. Additional vias may be placed anywhere along the thermal plane outside of the thermal pad area. This helps dissipate the heat generated by the TLV247x IC. These additional vias may be larger than the 13-mil diameter vias directly under the thermal pad. They can be larger because they are not in the thermal pad area to be soldered so that wicking is not a problem. 4. Connect all holes to the internal ground plane. 5. When connecting these holes to the ground plane, do not use the typical web or spoke via connection methodology. Web connections have a high thermal resistance connection that is useful for slowing the heat transfer during soldering operations. This makes the soldering of vias that have plane connections easier. In this application, however, low thermal resistance is desired for the most efficient heat transfer. Therefore, the holes under the TLV247x PowerPAD package should make their connection to the internal ground plane with a complete connection around the entire circumference of the plated-through hole. 6. The top-side solder mask should leave the terminals of the package and the thermal pad area with its five holes (dual) or nine holes (quad) exposed. The bottom-side solder mask should cover the five or nine holes of the thermal pad area. This prevents solder from being pulled away from the thermal pad area during the reflow process. 7. Apply solder paste to the exposed thermal pad area and all of the IC terminals. 8. With these preparatory steps in place, the TLV247x IC is simply placed in position and run through the solder reflow operation as any standard surface-mount component. This results in a part that is properly installed. For a given JA, the maximum power dissipation is shown in Figure 48 and is calculated by the following formula: P Where: + D T -T MAX A q JA PD = Maximum power dissipation of TLV247x IC (watts) TMAX = Absolute maximum junction temperature (150C) TA = Free-ambient air temperature (C) JA = JC + CA JC = Thermal coefficient from junction to case CA = Thermal coefficient from case to ambient air (C/W) POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 19 TLV2470, TLV2471, TLV2472, TLV2473, TLV2474, TLV2475, TLV247xA FAMILY OF 600-A/Ch 2.8-MHz RAIL-TO-RAIL INPUT/OUTPUT HIGH-DRIVE OPERATIONAL AMPLIFIERS WITH SHUTDOWN SLOS232A - JUNE 1999 - REVISED AUGUST 1999 APPLICATION INFORMATION general PowerPAD design considerations (continued) MAXIMUM POWER DISSIPATION vs FREE-AIR TEMPERATURE Maximum Power Dissipation - W 7 6 5 4 3 2 PWP Package Low-K Test PCB JA = 29.7C/W DGN Package Low-K Test PCB JA = 52.3C/W TJ = 150C SOT-23 Package Low-K Test PCB JA = 324C/W PDIP Package Low-K Test PCB JA = 104C/W SOIC Package Low-K Test PCB JA = 176C/W 1 0 -55 -40 -25 -10 5 20 35 50 65 80 95 110 125 TA - Free-Air Temperature - C NOTE A: Results are with no air flow and using JEDEC Standard Low-K test PCB. Figure 48. Maximum Power Dissipation vs Free-Air Temperature The next consideration is the package constraints. The two sources of heat within an amplifier are quiescent power and output power. The designer should never forget about the quiescent heat generated within the device, especially muti-amplifier devices. Because these devices have linear output stages (Class A-B), most of the heat dissipation is at low output voltages with high output currents. Figure 49 to Figure 54 show this effect, along with the quiescent heat, with an ambient air temperature of 70C and 125C. When using VDD = 3 V, there is generally not a heat problem with an ambient air temperature of 70C. But, when using VDD = 5 V, the packages are severely limited in the amount of heat it can dissipate. The other key factor when looking at these graphs is how the devices are mounted on the PCB. The PowerPAD devices are extremely useful for heat dissipation. But, the device should always be soldered to a copper plane to fully use the heat dissipation properties of the PowerPAD. The SOIC package, on the other hand, is highly dependent on how it is mounted on the PCB. As more trace and copper area is placed around the device, JA decreases and the heat dissipation capability increases. The currents and voltages shown in these graphs are for the total package. For the dual or quad amplifier packages, the sum of the RMS output currents and voltages should be used to choose the proper package. 20 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 TLV2470, TLV2471, TLV2472, TLV2473, TLV2474, TLV2475, TLV247xA FAMILY OF 600-A/Ch 2.8-MHz RAIL-TO-RAIL INPUT/OUTPUT HIGH-DRIVE OPERATIONAL AMPLIFIERS WITH SHUTDOWN SLOS232A - JUNE 1999 - REVISED AUGUST 1999 APPLICATION INFORMATION general PowerPAD design considerations (continued) TLV2470, TLV2471 MAXIMUM RMS OUTPUT CURRENT vs RMS OUTPUT VOLTAGE DUE TO THERMAL LIMITS 180 Maximum Output Current Limit Line 160 | IO | - Maximum RMS Output Current - mA | IO | - Maximum RMS Output Current - mA 180 140 Packages With JA 110C/W at TA = 125C or JA 355C/W at TA = 70C C 120 100 B A 80 60 Safe Operating Area 40 VCC = 1.5 V TJ = 150C TA = 125C 20 0 0 TLV2470, TLV2471 MAXIMUM RMS OUTPUT CURRENT vs RMS OUTPUT VOLTAGE DUE TO THERMAL LIMITS Maximum Output Current Limit Line 160 140 G B 100 A 80 Packages With JA 210C/W at TA = 70C 60 40 VCC = 2.5 V TJ = 150C TA = 125C 20 0 1.5 0.25 0.5 0.75 1 1.25 | VO | - RMS Output Voltage - V 0 C 120 Packages With JA 55C/W at TA = 125C or JA 178C/W at TA = 70C D 100 80 60 40 VCC = 1.5 V TJ = 150C TA = 125C 20 0 0 Safe Operating Area TLV2472, TLV2473 MAXIMUM RMS OUTPUT CURRENT vs RMS OUTPUT VOLTAGE DUE TO THERMAL LIMITS 180 | IO | - Maximum RMS Output Current - mA | IO | - Maximum RMS Output Current - mA G 2.5 Figure 50 TLV2472, TLV2473 MAXIMUM RMS OUTPUT CURRENT vs RMS OUTPUT VOLTAGE DUE TO THERMAL LIMITS 180 Maximum Output Current Limit Line 160 H Safe Operating Area 0.5 1 1.5 2 | VO | - RMS Output Voltage - V Figure 49 140 C 120 Maximum Output Current Limit Line 160 140 F 120 G 100 H D 80 C 60 40 VCC = 2.5 V TJ = 150C TA = 125C 20 0 0.25 0.5 0.75 1 1.25 | VO | - RMS Output Voltage - V 1.5 0 Packages With JA 105C/W at TA = 70C Safe Operating Area 0.5 1 1.5 2 | VO | - RMS Output Voltage - V 2.5 Figure 52 Figure 51 A - SOT23(5); B - SOT23 (6); C - SOIC (8); D - SOIC (14); E - SOIC (16); F - MSOP PP (8); G - PDIP (8); H - PDIP (14); I - PDIP (16); J - TSSOP PP (14/16) POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 21 TLV2470, TLV2471, TLV2472, TLV2473, TLV2474, TLV2475, TLV247xA FAMILY OF 600-A/Ch 2.8-MHz RAIL-TO-RAIL INPUT/OUTPUT HIGH-DRIVE OPERATIONAL AMPLIFIERS WITH SHUTDOWN SLOS232A - JUNE 1999 - REVISED AUGUST 1999 APPLICATION INFORMATION general PowerPAD design considerations (continued) TLV2474, TLV2475 MAXIMUM RMS OUTPUT CURRENT vs RMS OUTPUT VOLTAGE DUE TO THERMAL LIMITS 180 Maximum Output Current Limit Line 160 140 | IO | - Maximum RMS Output Current - mA | IO | - Maximum RMS Output Current - mA 180 J 120 H and I 100 E Packages With JA 88C/W D at TA = 70C 80 60 40 VCC = 1.5 V TJ = 150C TA = 125C 20 0 0 TLV2474, TLV2475 MAXIMUM RMS OUTPUT CURRENT vs RMS OUTPUT VOLTAGE DUE TO THERMAL LIMITS Safe Operating Area Maximum Output Current Limit Line 160 140 J 120 100 H and I 80 VCC = 2.5 V TJ = 150C TA = 125C 60 1.5 D 40 20 Safe Operating Area 0 0.25 0.5 0.75 1 1.25 | VO | - RMS Output Voltage - V E 0 Figure 53 Packages With JA 52C/W at TA = 70C 0.5 1 1.5 2 | VO | - RMS Output Voltage - V 2.5 Figure 54 A - SOT23(5); B - SOT23 (6); C - SOIC (8); D - SOIC (14); E - SOIC (16); F - MSOP PP (8); G - PDIP (8); H - PDIP (14); I - PDIP (16); J - TSSOP PP (14/16) 22 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 TLV2470, TLV2471, TLV2472, TLV2473, TLV2474, TLV2475, TLV247xA FAMILY OF 600-A/Ch 2.8-MHz RAIL-TO-RAIL INPUT/OUTPUT HIGH-DRIVE OPERATIONAL AMPLIFIERS WITH SHUTDOWN SLOS232A - JUNE 1999 - REVISED AUGUST 1999 APPLICATION INFORMATION macromodel information Macromodel information provided was derived using Microsim Parts , the model generation software used with Microsim PSpice . The Boyle macromodel (see Note 1) and subcircuit in Figure 2 are generated using the TLV247x typical electrical and operating characteristics at TA = 25C. Using this information, output simulations of the following key parameters can be generated to a tolerance of 20% (in most cases): D D D D D D Maximum positive output voltage swing Maximum negative output voltage swing Slew rate Quiescent power dissipation Input bias current Open-loop voltage amplification D D D D D D Unity-gain frequency Common-mode rejection ratio Phase margin DC output resistance AC output resistance Short-circuit output current limit NOTE 1: G. R. Boyle, B. M. Cohn, D. O. Pederson, and J. E. Solomon, "Macromodeling of Integrated Circuit Operational Amplifiers," IEEE Journal of Solid-State Circuits, SC-9, 353 (1974). PSpice and Parts are trademarks of MicroSim Corporation. POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 23 TLV2470, TLV2471, TLV2472, TLV2473, TLV2474, TLV2475, TLV247xA FAMILY OF 600-A/Ch 2.8-MHz RAIL-TO-RAIL INPUT/OUTPUT HIGH-DRIVE OPERATIONAL AMPLIFIERS WITH SHUTDOWN SLOS232A - JUNE 1999 - REVISED AUGUST 1999 APPLICATION INFORMATION 99 3 VDD + 9 RSS + 10 J1 DP VC J2 IN + 11 RD1 VAD DC 12 C1 R2 - 53 HLIM - C2 6 - + + GCM GA - RD2 - RO1 DE 5 + VE * AMP_TLV2470-X operational amplifier "macromodel" subcircuit * created using Parts release 8.0 on 10/12/98 at 11:06 * Parts is a MicroSim product. * * connections: non-inverting input * | inverting input * | | positive power supply * | | | negative power supply * | | | | output * || | | | .subckt AMP_TLV2470-X 1 2 3 4 5 * c1 11 12 1.1094E-12 c2 6 7 5.5000E-12 css 10 99 556.53E-15 dc 5 53 dy de 54 5 dy dlp 90 91 dx dln 92 90 dx dp 4 3 dx egnd 99 0 poly(2) (3,0) (4,0) 0 .5 .5 fb 7 99 poly(5) vb vc ve vlp vln 0 + 39.614E6 -1E3 1E3 40E6 -40E6 ga 6 0 11 12 79.828E-6 gcm 0 6 10 99 32.483E-9 * Schematics Subcircuit * .subckt TLV2470_ver1 Vout Vdd GND V+ V- SD * S_S2 $N_0001 GND SD GND S2 RS_S2 SD GND 1G .MODEL S2 VSWITCH Roff=1e6 Ron=1.0 Voff=0.0 + Von=1.0 S_S1 $N_0002 VDD SD GND S1 RS_S1 SD GND 1G .MODEL S1 VSWITCH Roff=1e6 Ron=1.0 Voff=0.0 + Von=1.0 S_S3 Vout $N_0003 SD GND S3 RS_S3 SD GND 1G .MODEL S3 VSWITCH Roff=1e6 Ron=1.0 Voff=0.0 + Von=1.0 X_SUB_U1 V+ V- $N_0002 $N_003 + AMP_TLV2470-X .ENDS TLV2470_ver1 OUT iss 10 hlim 90 ioff 0 j1 11 j2 12 r2 6 rd1 3 rd2 3 ro1 8 ro2 7 rp 3 rss 10 vb 9 vc 3 ve 54 vlim 7 vlp 91 vln 0 .model dx .model dy .model jx1 + Vto=-1) .model jx2 + Vto=-1) .ends 4 dc 10.714E-6 0 vlim 1K 6 dc 75E-9 2 10 jx1 1 10 jx2 9 100.00E3 11 12.527E3 12 12.527E3 5 10 99 10 4 3.8023E3 99 18.667E6 0 dc 0 53 dc .842 4 dc .842 8 dc 0 0 dc 110 92 dc 110 D(Is=800.00E-18) D(Is=800.00E-18 Rs=1m Cjo=10p) NJF(Is=1.0825E-12 Beta=594.78E-06 NPN(Is=1.0825E-12 Beta=594.78E-06 * Schematics Subcircuit * .subckt TLV2471_ver1 V+ V- Vout Vdd GND * X_SUB_U1 V+ V- GND Vout AMP_TLV2470-X .ENDS TLV2471_ver1 Figure 55. Boyle Macromodel and Subcircuit 24 - VLN VLIM 8 54 4 - 7 60 + - + DLP 91 + VLP 90 RO2 VB IN - VDD - 92 FB - + ISS RP 2 1 DLN EGND + POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 TLV2470, TLV2471, TLV2472, TLV2473, TLV2474, TLV2475, TLV247xA FAMILY OF 600-A/Ch 2.8-MHz RAIL-TO-RAIL INPUT/OUTPUT HIGH-DRIVE OPERATIONAL AMPLIFIERS WITH SHUTDOWN SLOS232A - JUNE 1999 - REVISED AUGUST 1999 MECHANICAL DATA D (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE 14 PIN SHOWN 0.050 (1,27) 0.020 (0,51) 0.014 (0,35) 14 0.010 (0,25) M 8 0.008 (0,20) NOM 0.244 (6,20) 0.228 (5,80) 0.157 (4,00) 0.150 (3,81) Gage Plane 0.010 (0,25) 1 7 0- 8 A 0.044 (1,12) 0.016 (0,40) Seating Plane 0.069 (1,75) MAX 0.010 (0,25) 0.004 (0,10) PINS ** 0.004 (0,10) 8 14 16 A MAX 0.197 (5,00) 0.344 (8,75) 0.394 (10,00) A MIN 0.189 (4,80) 0.337 (8,55) 0.386 (9,80) DIM 4040047 / D 10/96 NOTES: A. All linear dimensions are in inches (millimeters). B. This drawing is subject to change without notice. C. Body dimensions do not include mold flash or protrusion, not to exceed 0.006 (0,15). POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 25 TLV2470, TLV2471, TLV2472, TLV2473, TLV2474, TLV2475, TLV247xA FAMILY OF 600-A/Ch 2.8-MHz RAIL-TO-RAIL INPUT/OUTPUT HIGH-DRIVE OPERATIONAL AMPLIFIERS WITH SHUTDOWN SLOS232A - JUNE 1999 - REVISED AUGUST 1999 MECHANICAL INFORMATION DBV (R-PDSO-G5) PLASTIC SMALL-OUTLINE PACKAGE 0,40 0,20 0,95 5 0,25 M 4 1,80 1,50 0,15 NOM 3,00 2,50 3 1 Gage Plane 3,10 2,70 0,25 0- 8 0,55 0,35 Seating Plane 1,30 1,00 0,10 0,05 MIN 4073253-4/B 10/97 NOTES: A. All linear dimensions are in millimeters. B. This drawing is subject to change without notice. C. Body dimensions include mold flash or protrusion. 26 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 TLV2470, TLV2471, TLV2472, TLV2473, TLV2474, TLV2475, TLV247xA FAMILY OF 600-A/Ch 2.8-MHz RAIL-TO-RAIL INPUT/OUTPUT HIGH-DRIVE OPERATIONAL AMPLIFIERS WITH SHUTDOWN SLOS232A - JUNE 1999 - REVISED AUGUST 1999 MECHANICAL INFORMATION DBV (R-PDSO-G6) PLASTIC SMALL-OUTLINE PACKAGE 0,40 0,20 0,95 6 0,25 M 4 1,80 1,50 0,15 NOM 3,00 2,50 3 1 Gage Plane 3,10 2,70 0,25 0- 8 Seating Plane 1,30 1,00 0,10 0,05 MIN 4073253-5/B 10/97 NOTES: A. All linear dimensions are in millimeters. B. This drawing is subject to change without notice. C. Body dimensions include mold flash or protrusion. POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 27 TLV2470, TLV2471, TLV2472, TLV2473, TLV2474, TLV2475, TLV247xA FAMILY OF 600-A/Ch 2.8-MHz RAIL-TO-RAIL INPUT/OUTPUT HIGH-DRIVE OPERATIONAL AMPLIFIERS WITH SHUTDOWN SLOS232A - JUNE 1999 - REVISED AUGUST 1999 MECHANICAL INFORMATION DGN (S-PDSO-G8) PowerPAD PLASTIC SMALL-OUTLINE PACKAGE 0,38 0,25 0,65 8 0,25 M 5 Thermal Pad (See Note D) 0,15 NOM 3,05 2,95 4,98 4,78 Gage Plane 0,25 1 0- 6 4 3,05 2,95 0,69 0,41 Seating Plane 1,07 MAX 0,15 0,05 0,10 4073271/A 04/98 NOTES: A. B. C. D. All linear dimensions are in millimeters. This drawing is subject to change without notice. Body dimensions include mold flash or protrusions. The package thermal performance may be enhanced by attaching an external heat sink to the thermal pad. This pad is electrically and thermally connected to the backside of the die and possibly selected leads. The dimension of the thermal pad is 68 mils (height as illustrated) x 70 mils (width as illustrated) (maximum). The pad is centered on the bottom of the package. E. Falls within JEDEC MO-187 PowerPAD is a trademark of Texas Instruments Incorporated. 28 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 TLV2470, TLV2471, TLV2472, TLV2473, TLV2474, TLV2475, TLV247xA FAMILY OF 600-A/Ch 2.8-MHz RAIL-TO-RAIL INPUT/OUTPUT HIGH-DRIVE OPERATIONAL AMPLIFIERS WITH SHUTDOWN SLOS232A - JUNE 1999 - REVISED AUGUST 1999 MECHANICAL INFORMATION DGQ (S-PDSO-G10) PowerPAD PLASTIC SMALL-OUTLINE PACKAGE 0,27 0,17 0,50 10 0,25 M 6 Thermal Pad (See Note D) 0,15 NOM 4,98 4,78 3,05 2,95 Gage Plane 0,25 1 0- 6 5 3,05 2,95 0,69 0,41 Seating Plane 1,07 MAX 0,15 0,05 0,10 4073273/A 04/98 NOTES: A. B. C. D. All linear dimensions are in millimeters. This drawing is subject to change without notice. Body dimensions do not include mold flash or protrusion. The package thermal performance may be enhanced by bonding the thermal pad to an external thermal plane. This pad is electrically and thermally connected to the backside of the die and possibly selected leads. The dimension of the thermal pad is 68 mils (height as illustrated) x 70 mils (width as illustrated) (maximum). The pad is centered on the bottom of the package. PowerPAD is a trademark of Texas Instruments Incorporated. POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 29 TLV2470, TLV2471, TLV2472, TLV2473, TLV2474, TLV2475, TLV247xA FAMILY OF 600-A/Ch 2.8-MHz RAIL-TO-RAIL INPUT/OUTPUT HIGH-DRIVE OPERATIONAL AMPLIFIERS WITH SHUTDOWN SLOS232A - JUNE 1999 - REVISED AUGUST 1999 MECHANICAL INFORMATION N (R-PDIP-T**) PLASTIC DUAL-IN-LINE PACKAGE 16 PIN SHOWN PINS ** 14 16 18 20 A MAX 0.775 (19,69) 0.775 (19,69) 0.920 (23.37) 0.975 (24,77) A MIN 0.745 (18,92) 0.745 (18,92) 0.850 (21.59) 0.940 (23,88) DIM A 16 9 0.260 (6,60) 0.240 (6,10) 1 8 0.070 (1,78) MAX 0.035 (0,89) MAX 0.310 (7,87) 0.290 (7,37) 0.020 (0,51) MIN 0.200 (5,08) MAX Seating Plane 0.125 (3,18) MIN 0.100 (2,54) 0.021 (0,53) 0.015 (0,38) 0.010 (0,25) M 0- 15 0.010 (0,25) NOM 14/18 PIN ONLY 4040049/C 08/95 NOTES: A. All linear dimensions are in inches (millimeters). B. This drawing is subject to change without notice. C. Falls within JEDEC MS-001 (20 pin package is shorter then MS-001.) 30 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 TLV2470, TLV2471, TLV2472, TLV2473, TLV2474, TLV2475, TLV247xA FAMILY OF 600-A/Ch 2.8-MHz RAIL-TO-RAIL INPUT/OUTPUT HIGH-DRIVE OPERATIONAL AMPLIFIERS WITH SHUTDOWN SLOS232A - JUNE 1999 - REVISED AUGUST 1999 MECHANICAL INFORMATION P (R-PDIP-T8) PLASTIC DUAL-IN-LINE PACKAGE 0.400 (10,60) 0.355 (9,02) 8 5 0.260 (6,60) 0.240 (6,10) 1 4 0.070 (1,78) MAX 0.310 (7,87) 0.290 (7,37) 0.020 (0,51) MIN 0.200 (5,08) MAX Seating Plane 0.125 (3,18) MIN 0.100 (2,54) 0.021 (0,53) 0.015 (0,38) 0- 15 0.010 (0,25) M 0.010 (0,25) NOM 4040082 / B 03/95 NOTES: A. All linear dimensions are in inches (millimeters). B. This drawing is subject to change without notice. C. Falls within JEDEC MS-001 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 31 TLV2470, TLV2471, TLV2472, TLV2473, TLV2474, TLV2475, TLV247xA FAMILY OF 600-A/Ch 2.8-MHz RAIL-TO-RAIL INPUT/OUTPUT HIGH-DRIVE OPERATIONAL AMPLIFIERS WITH SHUTDOWN SLOS232A - JUNE 1999 - REVISED AUGUST 1999 MECHANICAL INFORMATION PWP (R-PDSO-G**) PowerPAD PLASTIC SMALL-OUTLINE 20 PINS SHOWN 0,30 0,19 0,65 20 0,10 M 11 Thermal Pad (See Note D) 4,50 4,30 0,15 NOM 6,60 6,20 Gage Plane 1 10 0,25 A 0- 8 0,75 0,50 Seating Plane 0,15 0,05 1,20 MAX PINS ** 0,10 14 16 20 24 28 A MAX 5,10 5,10 6,60 7,90 9,80 A MIN 4,90 4,90 6,40 7,70 9,60 DIM 4073225/F 10/98 NOTES: A. B. C. D. All linear dimensions are in millimeters. This drawing is subject to change without notice. Body dimensions do not include mold flash or protrusions. The package thermal performance may be enhanced by bonding the thermal pad to an external thermal plane. This pad is electrically and thermally connected to the backside of the die and possibly selected leads. The dimension of the thermal pad is 78 mils (height as illustrated) x 94 mils (width as illustrated) (maximum). The pad is centered on the bottom of the package. E. Falls within JEDEC MO-153 32 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 IMPORTANT NOTICE Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those pertaining to warranty, patent infringement, and limitation of liability. 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