IRF9540NSTRLPBF - International Rectifier

IRF9540NSPbF

IRF9540NLPbF

HEXFET® Power MOSFET

PD - 96030

VDSS = -100V

RDS(on) = 117mΩ

ID = -23A

lAdvanced Process Technology

lUltra Low On-Resistance

l150°C Operating Temperature

lFast Switching

lRepetitive Avalanche Allowed up to Tjmax

lSome Parameters are Different from

IRF9540NS/L

lP-Channel

lLead-Free

09/30/05

www.irf.com 1

D2Pak

IRF9540NSPbF

TO-262

IRF9540NLPbF

GDS

Gate Drain Source

Description

Features of this design are a 150°C junction

operating temperature, fast switching speed and

improved repetitive avalanche rating . These fea-

tures combine to make this design an extremely

efficient and reliable device for use in a wide

variety of other applications.

Absolute Maximum Ratings

Parameter Units

ID @ TC = 25°C Continuous Drain Current, VGS @ -10V A

ID @ TC = 100°C Continuous Drain Current, VGS @ -10V

IDM Pulsed Drain Current

PD @TA = 25°C Maximum Power Dissipation W

PD @TC = 25°C Maximum Power Dissipation

Linear Derating Factor W/°C

VGS Gate-to-Source Voltage V

EAS Single Pulse Avalanche Energy

IAR Avalanche Current

EAR Repetitive Avalanche Energy

dv/dt Peak Diode Recovery dv/dt

V/ns

TJ Operating Junction and °C

TSTG Storage Temperature Range

Soldering Temperature, for 10 seconds

Thermal Resistance

Parameter Typ. Max. Units

RθJC Junction-to-Case ––– 1.1 °C/W

RθJA Junction-to-Ambient (PCB Mount, steady state)

––– 40

110

0.9

± 20

-14

300 (1.6mm from case )

-55 to + 150

-13

Max.

-23

-14

-92

3.1

IRF9540NS/LPbF

2www.irf.com

Notes:

 Repetitive rating; pulse width limited by

max. junction temperature. ( See fig. 11)

 Starting TJ = 25°C, L = 0.88mH

RG = 25Ω, IAS = -14A. (See Figure 12)

ISD ≤ -14A, di/dt ≤ -620A/µs, VDD ≤ V(BR)DSS,

TJ ≤ 150°C.

 Pulse width ≤ 300µs; duty cycle ≤ 2%.

 When mounted on 1" square PCB (FR-4or G-10

Material). For recommended footprint and soldering

techniques refer to application note #AN-994.

Electrical Characteristics @ TJ = 25°C (unless otherwise specified)

Parameter Min. Typ. Max. Units

V(BR)DSS Drain-to-Source Breakdown Voltage -100 ––– ––– V

∆ΒVDSS/∆TJ Breakdown Voltage Temp. Coefficient ––– -0.11 ––– V/°C

RDS(on) Static Drain-to-Source On-Resistance ––– ––– 117 mΩ

VGS(th) Gate Threshold Voltage -2.0 ––– -4.0 V

gfs Forward Transconductance 5.6 ––– ––– S

IDSS Drain-to-Source Leakage Current ––– ––– -50 µA

––– ––– -250

IGSS Gate-to-Source Forward Leakage ––– ––– 100 nA

Gate-to-Source Reverse Leakage ––– ––– -100

QgTotal Gate Charge ––– 73 110 nC

Qgs Gate-to-Source Charge ––– 13 20

Qgd Gate-to-Drain ("Miller") Charge ––– 38 57

td(on) Turn-On Delay Time ––– 13 ––– ns

trRise Time ––– 64 –––

td(off) Turn-Off Delay Time ––– 40 –––

tfFall Time ––– 45 –––

LDInternal Drain Inductance ––– 4.5 ––– nH Between lead,

6mm (0.25in.)

LSInternal Source Inductance ––– 7.5 ––– from package

and center of die contact

Ciss Input Capacitance ––– 1450 ––– pF

Coss Output Capacitance ––– 430 –––

Crss Reverse Transfer Capacitance ––– 230 –––

Source-Drain Ratings and Characteristics

Parameter Min. Typ. Max. Units

ISContinuous Source Current ––– ––– -23

(Body Diode) A

ISM Pulsed Source Current ––– ––– -92

(Body Diode)

c

VSD Diode Forward Voltage ––– ––– -1.6 V

trr Reverse Recovery Time ––– 140 210 ns

Qrr Reverse Recovery Charge ––– 890 1340 nC

ton Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)

VDS = VGS, ID = -250µA

VDS = -100V, VGS = 0V

VDS = -80V, VGS = 0V, TJ = 125°C

Conditions

VGS = 0V, ID = -250µA

Reference to 25°C, ID = -1mA

VGS = -10V, ID = -14A

TJ = 25°C, IF = -14A, VDD = -25V

di/dt = -100A/µs

TJ = 25°C, IS = -14A, VGS = 0V

showing the

integral reverse

p-n junction diode.

VGS = -10V

MOSFET symbol

VGS = 0V

VDS = -25V

Conditions

ƒ = 1.0MHz, See Fig. 5

RG = 5.1Ω

ID = -14A

VDS = -50V, ID = -14A

VDD = -50V

ID = -14A

VGS = -20V

VGS = 20V

VDS = -80V

VGS = -10V

IRF9540NS/LPbF

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Fig 4. Normalized On-Resistance

vs. Temperature

Fig 2. Typical Output CharacteristicsFig 1. Typical Output Characteristics

Fig 3. Typical Transfer Characteristics

0.1 110 100

-VDS, Drain-to-Source Voltage (V)

0.1

100

1000

-ID, Drain-to-Source Current (A)

VGS

TOP -15V

-10V

-8.0V

-7.0V

-6.0V

-5.5V

-5.0V

BOTTOM -4.5V

≤60µs PULSE WIDTH

Tj = 25°C

-4.5V

246810 12 14

-VGS, Gate-to-Source Voltage (V)

0.1

100

-ID, Drain-to-Source Current

(A)

TJ = 25°C

TJ = 150°C

VDS = -50V

≤60µs PULSE WIDTH

0.1 110 100

-VDS, Drain-to-Source Voltage (V)

0.1

100

1000

-ID, Drain-to-Source Current (A)

VGS

TOP -15V

-10V

-8.0V

-7.0V

-6.0V

-5.5V

-5.0V

BOTTOM -4.5V

≤60µs PULSE WIDTH

Tj = 150°C

-4.5V

-60 -40 -20 020 40 60 80 100 120 140 160

TJ , Junction Temperature (°C)

0.5

1.0

1.5

2.0

RDS(on) , Drain-to-Source On Resistance

(Normalized)

ID = -14A

VGS = -10V

IRF9540NS/LPbF

4www.irf.com

Fig 8. Maximum Safe Operating Area

Fig 6. Typical Gate Charge vs.

Gate-to-Source Voltage

Fig 5. Typical Capacitance vs.

Drain-to-Source Voltage

Fig 7. Typical Source-Drain Diode

Forward Voltage

110 100

-VDS, Drain-to-Source Voltage (V)

100

1000

10000

C, Capacitance(pF)

VGS = 0V, f = 1 MHZ

Ciss = Cgs + Cgd, Cds SHORTED

Crss = Cgd

Coss = Cds + Cgd

Coss

Crss

Ciss

0 20406080100120

QG, Total Gate Charge (nC)

-VGS, Gate-to-Source Voltage (V)

VDS= -80V

VDS= -50V

VDS= -20V

ID= -14A

0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0

-VSD, Source-to-Drain Voltage (V)

0.1

100

-ISD, Reverse Drain Current (A)

TJ = 25°C

TJ = 150°C

VGS = 0V

1 10 100 1000

-VDS , Drain-toSource Voltage (V)

0.1

100

1000

-ID, Drain-to-Source Current (A)

Tc = 25°C

Tj = 150°C

Single Pulse

1msec

10msec

OPERATION IN THIS AREA

LIMITED BY RDS(on)

100µsec

IRF9540NS/LPbF

www.irf.com 5

1E-006 1E-005 0.0001 0.001 0.01 0.1

t1 , Rectangular Pulse Duration (sec)

0.001

0.01

0.1

Thermal Response ( Z

thJC )

0.20

0.10

D = 0.50

0.02

0.01

0.05

SINGLE PULSE

( THERMAL RESPONSE )

Notes:

1. Duty Factor D = t1/t2

2. Peak Tj = P dm x Zthjc + Tc

Fig 10a. Switching Time Test Circuit

Fig 10b. Switching Time Waveforms

Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case

Fig 9. Maximum Drain Current vs.

Case Temperature

VDS

-10V

Pulse Width ≤ 1 µs

Duty Factor ≤ 0.1 %

VGS

VDD

D.U.T.

90%

10%

d(on)

d(off)

25 50 75 100 125 150

TC , Case Temperature (°C)

-ID, Drain Current (A)

Ri (°C/W) τi (sec)

0.1737838 0.0000610

0.4335992 0.0019590

0.4921007 0.0260060

Ci= τi/Ri

IRF9540NS/LPbF

6www.irf.com

Fig 14b. Gate Charge Test Circuit

Fig 14a. Basic Gate Charge Waveform

Fig 13. Maximum Avalanche Energy

vs. Drain Current

QGS QGD

Charge

-10V

D.U.T. VDS

-3mA

VGS

.3µF

50KΩ

.2µF

12V

Current Regulator

Same Type as D.U.T.

Current Sampling Resistors

Fig 12b. Unclamped Inductive Waveforms

Fig 12a. Unclamped Inductive Test Circuit

(

)

DSS

0.01

Ω

D.U.T

DRIVER

15V

-20V

25 50 75 100 125 150

Starting TJ , Junction Temperature (°C)

100

150

200

250

300

350

EAS , Single Pulse Avalanche Energy (mJ)

TOP -6.7A

-9.6A

BOTTOM -14A

IRF9540NS/LPbF

www.irf.com 7

Peak Diode Recovery dv/dt Test Circuit

P.W. Period

di/dt

Diode Recovery

dv/dt

Ripple ≤5%

Body Diode Forward Drop

Re-Applied

Voltage

Reverse

Recovery

Current

Body Diode Forward

Current

=10V

Driver Gate Drive

D.U.T. I

Waveform

D.U.T. V

Waveform

Inductor Curent

D = P. W .

Period







VDD

• dv/dt controlled by RG

• ISD controlled by Duty Factor "D"

• D.U.T. - Device Under Test

D.U.T*Circuit Layout Considerations

• Low Stray Inductance

• Ground Plane

• Low Leakage Inductance

Current Transformer



* Reverse Polarity of D.U.T for P-Channel

[ ]

*** VGS = 5.0V for Logic Level and 3V Drive Devices

[ ] ***

Fig 15. For P-Channel HEXFETS

VGS

IRF9540NS/LPbF

8www.irf.com

D2Pak Part Marking Information

D2Pak Package Outline

Dimensions are shown in millimeters (inches)

DAT E CODE

YEAR 0 = 2000

WE E K 02

A = ASSEMBLY SITE CODE

RECTIFIER

INTERNATIONAL PART NUMBER

P = DE S I GNAT E S L E AD - F R E E

PRODUCT (OPTIONAL)

F530S

IN THE ASSEMBLY LINE "L"

AS SEMBLED ON WW 02, 2000

THIS IS AN IRF530S WITH

LOT CODE 8024 INTERNATIONAL

LOGO

RECTIFIER

LOT CODE

ASSEMBLY YE AR 0 = 2000

PART NUMBER

DAT E CODE

LINE L

WEEK 02

F530S

LOGO

ASSEMBLY

LOT CODE

IRF9540NS/LPbF

www.irf.com 9

TO-262 Part Marking Information

TO-262 Package Outline

Dimensions are shown in millimeters (inches)

ASSEMBLY

LOT CODE

RECT IFIER

INTERNATIONAL

AS S E MBLED ON WW 19, 1997

Note: "P" in as s embly line

pos i ti on i ndi cates "L ead- F r ee"

IN THE ASSEMBLY LINE "C" LOGO

T HIS IS AN IRL3103L

LOT CODE 1789

EXAMPLE:

LINE C

DAT E CODE

WEEK 19

YEAR 7 = 1997

PART NUMBER

LOGO

LOT CODE

ASSEMBLY

INT ERNAT IONAL

RECTIFIER

PRODUCT (OPTIONAL)

P = DESIGNAT ES LEAD-FREE

A = ASSEMBLY SITE CODE

WEEK 19

YEAR 7 = 1997

DAT E CODE

IRF9540NS/LPbF

10 www.irf.com

Data and specifications subject to change without notice.

This product has been designed and qualified for the Industrial market.

Qualification Standards can be found on IR’s Web site.

D2Pak Tape & Reel Information

Dimensions are shown in millimeters (inches)

TRR

FEED DIRECTION

1.85 (.073)

1.65 (.065)

1.60 (.063)

1.50 (.059)

4.10 (.161)

3.90 (.153)

TRL

FEED DIRECTION

10.90 (.429)

10.70 (.421)

16.10 (.634)

15.90 (.626)

1.75 (.069)

1.25 (.049)

11.60 (.457)

11.40 (.449) 15.42 (.609)

15.22 (.601)

4.72 (.136)

4.52 (.178)

24.30 (.957)

23.90 (.941)

0.368 (.0145)

0.342 (.0135)

1.60 (.063)

1.50 (.059)

13.50 (.532)

12.80 (.504)

330.00

(14.173)

MAX.

27.40 (1.079)

23.90 (.941)

60.00 (2.362)

MIN.

30.40 (1.197)

MAX.

26.40 (1.039)

24.40 (.961)

NOTES :

1. COMFORMS TO EIA-418.

2. CONTROLLING DIMENSION: MILLIMETER.

3. DIMENSION MEASURED @ HUB.

4. INCLUDES FLANGE DISTORTION @ OUTER EDGE.

IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105

TAC Fax: (310) 252-7903

Visit us at www.irf.com for sales contact information. 09/05

Note: For the most current drawings please refer to the IR website at:

http://www.irf.com/package/