NCV4276ADT50RKG - ON SEMICONDUCTOR

June, 2011 − Rev. 24

1Publication Order Number:

NCV4276/D

NCV4276, NCV4276A

400 mA Low-Drop Voltage

Regulator

The NCV4276 is a 400 mA output current integrated low dropout

regulator family designed for use in harsh automotive environments.

It includes wide operating temperature and input voltage ranges. The

device is offered with fixed output voltage options of 1.8 V and 2.5 V

with 4% output voltage accuracy while the 3.3 V, 5.0 V, and

adjustable voltage versions are available either in 2% or 4% output

voltage accuracy. It has a high peak input voltage tolerance and

reverse input voltage protection. It also provides overcurrent

protection, overtemperature protection and inhibit for control of the

state of the output voltage. The NCV4276 family is available in

DPAK and D2PAK surface mount packages. The output is stable over

a wide output capacitance and ESR range.

Features

•2.5 V and 1.8 V ±4% Output Voltage

•3.3 V, 5.0 V, and Adjustable Voltage Version (from 2.5 V to 20 V)

±4% or ±2% Output Voltage

•400 mA Output Current

•500 mV (max) Dropout Voltage (5.0 V Output)

•Inhibit Input

•Very Low Current Consumption

•Fault Protection

♦+45 V Peak Transient Voltage

♦−42 V Reverse Voltage

♦Short Circuit

♦Thermal Overload

•NCV Prefix for Automotive and Other Applications Requiring Site

and Control Changes

•These are Pb−Free Devices

D2PAK

5−PIN

DS SUFFIX

CASE 936A

DPAK

5−PIN

DT SUFFIX

CASE 175AA

See detailed ordering and shipping information in the ordering

information section on page 23 of this data sheet.

ORDERING INFORMATION

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See general marking information in the device marking

section on page 22 of this data sheet.

DEVICE MARKING INFORMATION

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−

INH

GND

Current Limit and

Saturation Sense

Bandgap

Reference

Thermal

Shutdown

Figure 1. 4276 Block Diagram

Error

Amplifier

−

INH

GND

Current Limit and

Saturation Sense

Bandgap

Reference

Thermal

Shutdown

Figure 2. 4276 Adjustable Block Diagram

Error

Amplifier

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PIN FUNCTION DESCRIPTION

Pin No. Symbol Description

1 I Input; Battery Supply Input Voltage.

2 INH Inhibit; Set low−to inhibit.

3 GND Ground; Pin 3 internally connected to heatsink.

4NC / VA Not connected for fixed voltage version / Voltage Adjust Input for adjustable voltage version; use an external

voltage divider to set the output voltage

5 Q Output: Bypass with a capacitor to GND. See Figures 3 to 8 and Regulator Stability Considerations section.

MAXIMUM RATINGS*

Rating Symbol Min Max Unit

Input Voltage VI−42 45 V

Input Peak Transient Voltage VI−45 V

Inhibit INH Voltage VINH −42 45 V

Voltage Adjust Input VA VVA −0.3 10 V

Output Voltage VQ−1.0 40 V

Ground Current Iq−100 mA

Input Voltage Operating Range VIVQ + 0.5 V or 4.5 V

(Note 1)

40 V

ESD Susceptibility (Human Body Model)

(Machine Model)

(Charged Device Model)

−

4.5

250

1.25

−

Junction Temperature TJ−40 150 °C

Storage Temperature Tstg −50 150 °C

Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the

Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect

device reliability.

*During the voltage range which exceeds the maximum tested voltage of I, operation is assured, but not specified. Wider limits may apply. Thermal

dissipation must be observed closely.

LEAD TEMPERATURE SOLDERING REFLOW (Note 2)

Lead Temperature Soldering

Reflow (SMD styles only), Leaded, 60−150 s above 183, 30 s max at peak

Reflow (SMD styles only), Lead Free, 60−150 s above 217, 40 s max at peak

Wave Solder (through hole styles only), 12 sec max

TSLD

−

240

265

310

°C

THERMAL CHARACTERISTICS

Characteristic Test Conditions (Typical Value) Unit

DPAK 5−PIN PACKAGE

Min Pad Board (Note 3) 1, Pad Board (Note 4)

Junction−to−Tab (psi−JLx, yJLx) 4.2 4.7 C/W

Junction−to−Ambient (RqJA, qJA) 100.9 46.8 C/W

D2PAK 5−PIN PACKAGE

0.4 sq. in. Spreader Board (Note 5) 1.2 sq. in. Spreader Board (Note 6)

Junction−to−Tab (psi−JLx, yJLx) 3.8 4.0 C/W

Junction−to−Ambient (RqJA, qJA) 74.8 41.6 C/W

1. Minimum VI = 4.5 V or (VQ + 0.5 V), whichever is higher.

2. Per IPC / JEDEC J−STD−020C.

3. 1 oz. copper, 0.26 inch2 (168 mm2) copper area, 0.062″ thick FR4.

4. 1 oz. copper, 1.14 inch2 (736 mm2) copper area, 0.062″ thick FR4.

5. 1 oz. copper, 0.373 inch2 (241 mm2) copper area, 0.062″ thick FR4.

6. 1 oz. copper, 1.222 inch2 (788 mm2) copper area, 0.062″ thick FR4.

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ELECTRICAL CHARACTERISTICS (VI = 13.5 V; −40°C < TJ < 150°C; unless otherwise noted.)

Characteristic Symbol Test Conditions

NCV4276 NCV4276A

Unit

Min Typ Max Min Typ Max

OUTPUT

Output Voltage, 5.0 V Version VQ5.0 mA < IQ < 400 mA,

6.0 V < VI < 28 V

4.8 5.0 5.2 4.9 5.0 5.1 V

Output Voltage, 5.0 V Version VQ5.0 mA < IQ < 200 mA,

6.0 V < VI < 40 V

4.8 5.0 5.2 4.9 5.0 5.1 V

Output Voltage, 3.3 V Version VQ5.0 mA < IQ < 400 mA,

4.5 V < VI < 28 V

3.168 3.3 3.432 3.234 3.3 3.366 V

Output Voltage, 3.3 V Version VQ5.0 mA < IQ < 200 mA,

4.5 V < VI < 40 V

3.168 3.3 3.432 3.234 3.3 3.366 V

Output Voltage, 2.5 V Version VQ5.0 mA < IQ < 400 mA,

4.5 V < VI < 28 V

2.4 2.5 2.6 −−−V

Output Voltage, 2.5 V Version VQ5.0 mA < IQ < 200 mA,

4.5 V < VI < 40 V

2.4 2.5 2.6 −−−V

Output Voltage, 1.8 V Version VQ5.0 mA < IQ < 400 mA,

4.5 V < VI < 28 V

1.728 1.8 1.872 −−−V

Output Voltage, 1.8 V Version VQ5.0 mA < IQ < 200 mA,

4.5 V < VI < 40 V

1.728 1.8 1.872 −−−V

Output Voltage, Adjustable

Version

AVQ5.0 mA < IQ < 400 mA

VQ+1 < VI < 40 V

VI > 4.5 V

−4% −+4% −2% −+2% V

Output Current Limitation IQVQ = 90% VQTYP (VQTYP

= 2.5 V for ADJ version)

400 700 1100 400 700 1100 mA

Quiescent Current (Sleep Mode)

Iq = II − IQ

IqVINH = 0 V − − 10 − − 10 mA

Quiescent Current, Iq = II − IQIqIQ = 1.0 mA −130 220 −130 200 mA

Quiescent Current, Iq = II − IQIqIQ = 250 mA −10 15 −10 15 mA

Quiescent Current, Iq = II − IQIqIQ = 400 mA −25 35 −25 35 mA

Dropout Voltage,

5.0 V Version

3.3 V Version

2.5 V Version

1.8 V Version

Adjustable Version

VDR IQ = 250 mA,

VDR = VI − VQ

VI = 5.0 V

VI = 4.5 V

VI > 4.5 V

−

250

−

250

500

1.332

2.1

2.772

500

−

250

−

500

Dropout Voltage (5.0 V Version) VDR IQ = 250 mA (Note 7) −−−−250 500 mV

Load Regulation DVQ,LO IQ = 5.0 mA to 400 mA −10 35 −3.0 20 mV

Line Regulation DVQDVI = 12 V to 32 V,

IQ = 5.0 mA

−2.5 25 −4.0 15 mV

Power Supply Ripple Rejection PSRR fr = 100 Hz, Vr = 0.5 VPP −60 − − 70 −dB

Temperature Output Voltage Drift dVQ/dT − − 0.5 − − 0.5 −mV/K

INHIBIT

Inhibit Voltage, Output High VINH VQ w VQMIN −2.8 3.5 −2.3 2.8 V

Inhibit Voltage, Output Low (Off) VINH VQ v 0.1 V 0.5 1.7 −1.8 2.2 −V

Input Current IINH VINH = 5.0 V 5.0 10 20 5.0 10 20 mA

THERMAL SHUTDOWN

Thermal Shutdown Temperature* TSD IQ = 5.0 mA 150 −210 150 −210 °C

*Guaranteed by design, not tested in production.

7. Measured when the output voltage VQ has dropped 100 mV from the nominal valued obtained at V = 13.5 V.

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5.5 − 45 V

Input CI1

1.0 mF

CI2

100 nF

III

INH

GND

22 mF

Output

Figure 3. Applications Circuit; Fixed Voltage Version

NCV4276

IINH

Input CI1

1.0 mF

CI2

100 nF

III

INH

GND

22 mF

Output

Figure 4. Applications Circuit; Adjustable Voltage Version

NCV4276

NCV4276A

IINH

VQ = [(R1 + R2) * Vref] / R2

Cb*

Cb* − Required if usage of low ESR output capacitor CQ is demand, see Regulator Stability Considerations section

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TYPICAL PERFORMANCE CHARACTERISTICS

0.01

0.1

100

0 150 250 35050 100 200 300 400

ESR (W)

CQ = 22 mF for these

Output Voltages

Stable Region

OUTPUT CURRENT (mA)

Unstable Region

6 V

2.5 V

12 V

Figure 5. Output Stability with Output Capacitor

ESR, 5.0 V, 3.3 V, 2.5 V and 1.8 V Regulator

0.01

0.1

OUTPUT CURRENT (mA)

ESR (W)

CQ = 22 mF for all

Fixed Output Voltages

Stable Region

0 150 250 35050

Maximum ESR

for CQ = 22 mF

100 200 300 400

Figure 6. Output Stability with Output Capacitor

ESR, 5.0 V and 3.3 V Regulator

ESR (W)

Figure 7. Output Stability with Output Capacitor

ESR, 2.5 V and 1.8 V Regulator

Figure 8. Output Stability with Output Capacitor

ESR, Adjustable Regulator

Unstable Region

0.01

0.1

OUTPUT CURRENT (mA)

CQ = 10 mF for 3.3 V and

5 V Fixed Output Voltages

Stable Region

0 150 250 35050

Maximum ESR

for CQ = 10 mF

100 200 300 400

Unstable Region

0.01

0.1

OUTPUT CURRENT (mA)

ESR (W)

Stable Region

0 150 250 35050

Maximum ESR

for CQ = 10 mF

100 200 300 400

Unstable Region

CQ = 10 mF for 1.8 V and

2.5 V Fixed Output Voltages

Minimum ESR

for CQ = 10 mF

Unstable Region Unstable Region

Cb capacitor not connected

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TYPICAL PERFORMANCE CHARACTERISTICS − 4276 Version

4.8

4.9

5.0

5.1

5.2

−40 0 40 80 120 160

VI = 13.5 V

RL = 1000 W

1.60

1.65

1.70

1.75

1.80

1.85

1.90

1.95

2.00

−40 0 40 80 120 160

VI = 13.5 V

RL = 1 kW

3.15

3.20

3.25

3.30

3.35

3.40

3.45

−40 0 40 120 160

Figure 9. Output Voltage vs. Junction

Temperature, 5.0 V Version

Figure 10. Output Voltage vs. Junction

Temperature, 1.8 V Version

Figure 11. Output Voltage vs. Junction

Temperature, 2.5 V Version

Figure 12. Output Voltage vs. Junction

Temperature, 3.3 V Version

01020304050

TJ = 25°C

RL = 20 W

1.0

2.0

3.0

5.0

6.0

7.0

8.0

9.0

01020304050

TJ = 25°C

RL = 20 W

2.30

2.35

2.40

2.45

2.50

2.55

2.60

2.65

2.70

−40 0 40 80 120 160

VI = 13.5 V

RL = 1 kWVI = 13.5 V

RL = 1 kW

4.0

TJ, JUNCTION TEMPERATURE (°C)

VQ, OUTPUT VOLTAGE (V)

VI, INPUT VOLTAGE (V)

Iq, CURRENT CONSUMPTION (mA)

Figure 13. Current Consumption vs.

Input Voltage, 5.0 V Version

Figure 14. Current Consumption vs.

Input Voltage, 1.8 V Version

VI, INPUT VOLTAGE (V)

Iq, CURRENT CONSUMPTION (mA)

TJ, JUNCTION TEMPERATURE (°C)

VQ, OUTPUT VOLTAGE (V)

TJ, JUNCTION TEMPERATURE (°C)

VQ, OUTPUT VOLTAGE (V)

TJ, JUNCTION TEMPERATURE (°C)

VQ, OUTPUT VOLTAGE (V)

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TYPICAL PERFORMANCE CHARACTERISTICS − 4276 Version

1.0

5.0

6.0

020304050

VI, INPUT VOLTAGE (V)

Iq, CURRENT CONSUMPTION (mA)

5.0

0 10203040 60

VI, INPUT VOLTAGE (V)

TJ = 25°C

RL = 20 W

−8

−6

−4

−2

−50 −25 0 25 50

VI, INPUT VOLTAGE (V)

II, INPUT CURRENT (mA)

TJ = 25°C

RL = 6.8 kW

Figure 15. Current Consumption vs. Input

Voltage, 2.5 V Version

Figure 16. Current Consumption vs. Input

Voltage, 3.3 V Version

Figure 17. High Voltage Behavior

100

200

300

400

500

600

700

800

0 1020304050

IQ, OUTPUT CURRENT (mA)

TJ = 25°C

VQ = 0 V

100

200

300

400

500

600

0 50 100 150 200 250 300 350 400

VDR, DROPOUT VOLTAGE (mV)

IQ, OUTPUT CURRENT (mA)

TJ = 25°C

TJ = 125°C

Figure 18. Dropout Voltage vs.

Output Current, 5.0 V Version

Figure 19. Maximum Output Current vs.

Input Voltage

2.0

3.0

4.0

8.0

9.0

7.0

TJ = 25°C

RL = 20 W

0 100 200 300 400 500 600

TJ = 25°C

VI = 13.5 V

Figure 20. Current Consumption vs.

Output Current (High Load)

Iq, CURRENT CONSUMPTION (mA)

VI, INPUT VOLTAGE (V) IQ, OUTPUT CURRENT (mA)

Iq, CURRENT CONSUMPTION (mA)

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TYPICAL PERFORMANCE CHARACTERISTICS − 4276 Version

0.2

0.4

0.6

0.8

1.0

1.2

1.4

1.6

0 102030405060

TJ = 25°C

VI = 13.5 V

Figure 21. Current Consumption vs.

Output Current (Low Load)

0.5

1.0

1.5

2.5

3.5

4.0

0 1.0 2.0 3.0 4.0 5.0 6.0

VI, INPUT VOLTAGE (V)

VQ, OUTPUT VOLTAGE (V)

TJ = 25°C

RL = 20 W

Figure 22. Output Voltage vs. Input Voltage,

1.8 V Version

0.5

1.0

2.5

3.5

4.0

5.0

0 1.0 2.0 3.0 4.0 5.0 6.0

VI, INPUT VOLTAGE (V)

VQ, OUTPUT VOLTAGE (V)

TJ = 25°C

RL = 20 W

Figure 23. Output Voltage vs. Input Voltage,

2.5 V Version

2.0

3.0

1.5

2.0

3.0

4.5

1.0

2.0

3.0

4.0

5.0

6.0

0 1.0 2.0 3.0 4.0 5.0 6.0

VI, INPUT VOLTAGE (V)

VQ, OUTPUT VOLTAGE (V)

TJ = 25°C

RL = 20 W

Figure 24. Output Voltage vs. Input Voltage,

3.3 V Version

0246810

VI, INPUT VOLTAGE (V)

VQ, OUTPUT VOLTAGE (V)

TJ = 25°C

RL = 20 W

Figure 25. Output Voltage vs. Input Voltage,

5.0 V Version

−10

−8.0

−6.0

−4.0

−2.0

2.0

4.0

6.0

−50 −25 0 25 50

VI, INPUT VOLTAGE (V)

II, INPUT CURRENT (mA)

TJ = 25°C

RL = 6.8 kW

Figure 26. Input Current vs. Input Voltage,

5.0 V Version

IQ, OUTPUT CURRENT (mA)

Iq, CURRENT CONSUMPTION (mA)

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TYPICAL PERFORMANCE CHARACTERISTICS − 4276 Version

−7.0

−6.0

−5.0

−4.0

−3.0

−2.0

−1.0

1.0

−50 −25 0 25 50

VI, INPUT VOLTAGE (V)

II, INPUT CURRENT (mA)

TJ = 25°C

RL = 6.8 kW

Figure 27. Input Current vs. Input Voltage,

1.8 V Version

−7.0

−6.0

−5.0

−4.0

−3.0

−2.0

−1.0

1.0

−50 −25 0 25 50

VI, INPUT VOLTAGE (V)

II, INPUT CURRENT (mA)

TJ = 25°C

RL = 6.8 kW

Figure 28. Input Current vs. Input Voltage,

2.5 V Version

−10

−8.0

−6.0

−4.0

−2.0

2.0

4.0

6.0

−50 −25 0 25 50

VI, INPUT VOLTAGE (V)

II, INPUT CURRENT (mA)

TJ = 25°C

RL = 6.8 kW

Figure 29. Input Current vs. Input Voltage,

3.3 V Version

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TYPICAL PERFORMANCE CHARACTERISTICS − 4276A Version

TJ, JUNCTION TEMPERATURE (°C)

VI, INPUT VOLTAGE (V)

16012080400−40

4.8

4.9

5.0

5.1

5.2

108.06.04.02.00

1.0

2.0

3.0

4.0

5.0

6.0

VQ, OUTPUT VOLTAGE (V)

VI = 13.5 V

RL = 1 kW

VQ, OUTPUT VOLTAGE (V)

RL = 20 W

TJ = 25°C

VI, INPUT VOLTAGE (V)

50403020100

Iq, CURRENT CONSUMPTION (mA)

TJ = 25°C

RL = 20 W

Figure 30. Output Voltage vs.

Junction Temperature, 5.0 V Version

TJ, JUNCTION TEMPERATURE (°C)

VI, INPUT VOLTAGE (V)

16012080400−40

3.15

3.25

3.30

3.40

3.45

50403020100

1.0

2.0

3.0

4.0

5.0

VQ, OUTPUT VOLTAGE (V)

VI = 13.5 V

RL = 1 kW

Iq, CURRENT CONSUMPTION (mA)

RL = 20 W

TJ = 25°C

VI, INPUT VOLTAGE (V)

6.04.03.02.01.00

2.0

3.0

5.0

6.0

VQ, OUTPUT VOLTAGE (V)

TJ = 25°C

RL = 20 W

Figure 31. Output Voltage vs.

Junction Temperature, 3.3 V Version

Figure 32. Current Consumption vs.

Input Voltage, 5.0 V Version

Figure 33. Current Consumption vs. Input

Voltage, 3.3 V Version

3.35

3.20

4.0

1.0

5.0

6.0

7.0

8.0

9.0

Figure 34. Low Voltage Behavior, 3.3 V VersionFigure 35. Low Voltage Behavior, 5.0 V Version

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TYPICAL PERFORMANCE CHARACTERISTICS − 4276A Version

IQ, OUTPUT CURRENT (mA)

4003002001000

100

200

300

400

500

600

VDR, DROP VOLTAGE (mV)

TJ = 125°C

TJ = 25°C

VI, INPUT VOLTAGE (V)

50250−25−50

−10

−8.0

−6.0

−2.0

2.0

6.0

II, INPUT CURRENT (mA)

RL = 6.8 kW

TJ = 25°C

−4.0

4.0

VI, INPUT VOLTAGE (V)

50403020100

200

400

600

800

IQ, OUTPUT CURRENT (mA)

TJ = 25°C

VQ = 0 V

Figure 36. Input Current vs. Input Voltage,

5.0 V Version

IQ, OUTPUT CURRENT (mA)

6005004003002001000

IQ, OUTPUT CURRENT (mA)

6050403020100

0.2

0.4

0.6

0.8

1.2

1.4

1.6

Iq, CURRENT CONSUMPTION (mA)

VI = 13.5 V

TJ = 25°C 1.0

Iq, CURRENT CONSUMPTION (mA)

VI = 13.5 V

VI, INPUT VOLTAGE (V)

50250−25−50

−10

−8.0

−6.0

−2.0

2.0

II, INPUT CURRENT (mA)

RL = 6.8 kW

TJ = 25°C

−4.0

Figure 37. Input Current vs. Input Voltage,

3.3 V Version

Figure 38. Dropout Voltage vs.

Output Current

Figure 39. Maximum Output Current vs.

Input Voltage

Figure 40. Current Consumption vs.

Output Current (High Load)

Figure 41. Current Consumption vs.

Output Current (Low Load)

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TYPICAL PERFORMANCE CHARACTERISTICS − Adjustable Version

2.45

2.46

2.47

2.51

2.55

−40 0 40 80 120 160

TJ, JUNCTION TEMPERATURE (°C)

VQ, OUTPUT VOLTAGE (V)

VI = 13.5 V, RL = 1 kW

0.5

1.5

2.5

3.5

0246 810

VI, INPUT VOLTAGE (V)

VQ, OUTPUT VOLTAGE (V)

TJ = 25°C

RL = 20 W

Figure 42. Output Voltage vs. Junction

Temperature, Adjustable Version

2.48

2.49

2.50

2.52

2.53

2.54

0.5

1.0

1.5

2.0

3.0

5.0

0 1020304050

VI, INPUT VOLTAGE (V)

TJ = 25°C

RL = 20 W

Figure 43. Current Consumption vs. Input

Voltage, Adjustable Version

3.5

4.0

2.5

4.5

−18

−16

−14

−8

−6

−4

−50 −25 0 25

VI, INPUT VOLTAGE (V)

II, INPUT CURRENT (mA)

TJ = 25°C

RL = 6.8 kW

−12

−10

−2

Figure 44. Low Voltage Behavior,

Adjustable Version

Figure 45. High Voltage Behavior,

Adjustable Version

Iq, CURRENT CONSUMPTION (mA)

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TYPICAL PERFORMANCE CHARACTERISTICS − Adjustable Version

0.2

0.4

1.6

0 10203040 60

IQ, OUTPUT CURRENT (mA)

TJ = 25°C

100

200

300

400

500

600

0 50 100 150 350 400

IQ, OUTPUT CURRENT (mA)

VDR, DROPOUT VOLTAGE (mV)

TJ = 25°C

VI = 13.5 V

Figure 46. Dropout Voltage vs. Output Current,

Regulator Set at 5.0 V, Adjustable Version

0.6

0.8

1.0

1.2

1.4

200 250 300

TJ = 125°C

100

200

300

400

500

800

0 1020304050

VI, INPUT VOLTAGE (V)

IQ, OUTPUT CURRENT (mA)

TJ = 25°C

VQ = 0 V

Figure 47. Maximum Output Current vs.

Input Voltage, Adjustable Version

600

700

0 100 200 300 400

IQ, OUTPUT CURRENT (mA)

Iq, CURRENT CONSUMPTION (mA)

TJ = 25°C

VI = 13.5 V

Figure 48. Current Consumption vs.

Output Current (High Load), Adjustable Version

500 600

Figure 49. Current Consumption vs. Output

Current (Low Load), Adjustable Version

Iq, CURRENT CONSUMPTION (mA)

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Circuit Description

The NCV4276 is an integrated low dropout regulator that

provides a regulated voltage at 400 mA to the output. It is

enabled with an input to the inhibit pin. The regulator

voltage is provided by a PNP pass transistor controlled by

an error amplifier with a bandgap reference, which gives it

the lowest possible dropout voltage. The output current

capability is 400 mA, and the base drive quiescent current

is controlled to prevent oversaturation when the input

voltage is low or when the output is overloaded. The

regulator is protected by both current limit and thermal

shutdown. Thermal shutdown occurs above 150°C to

protect the IC during overloads and extreme ambient

temperatures.

Regulator

The error amplifier compares the reference voltage to a

sample of the output voltage (VQ) and drives the base of a

PNP series pass transistor via a buffer. The reference is a

bandgap design to give it a temperature−stable output.

Saturation control of the PNP is a function of the load

current and input voltage. Oversaturation of the output

power device is prevented, and quiescent current in the

ground pin is minimized. See Figure 4, Test Circuit, for

circuit element nomenclature illustration.

Regulator Stability Considerations

The input capacitors (CI1 and CI2) are necessary to

stabilize the input impedance to avoid voltage line

influences. Using a resistor of approximately 1.0 W in

series with CI2 can stop potential oscillations caused by

stray inductance and capacitance.

The output capacitor helps determine three main

characteristics of a linear regulator: startup delay, load

transient response and loop stability. The capacitor value

and type should be based on cost, availability, size and

temperature constraints. The aluminum electrolytic

capacitor is the least expensive solution, but, if the circuit

operates at low temperatures (−25°C to −40°C), both the

value and ESR of the capacitor will vary considerably. The

capacitor manufacturer’s data sheet usually provides this

information.

The value for the output capacitor CQ, shown in Figure 3,

should work for most applications; see also Figures 5 to 8

for output stability at various load and Output Capacitor

ESR conditions. Stable region of ESR in Figures 5 to 8

shows ESR values at which the LDO output voltage does

not have any permanent oscillations at any dynamic

changes of output load current. Marginal ESR is the value

at which the output voltage waving is fully damped during

four periods after the load change and no oscillation is

further observable.

ESR characteristics were measured with ceramic

capacitors and additional series resistors to emulate ESR.

Low duty cycle pulse load current technique has been used

to maintain junction temperature close to ambient

temperature.

Minimum ESR for CQ = 22 mF is native ESR of ceramic

capacitor with which the fixed output voltage devices are

performing stable. Murata ceramic capacitors were used,

GRM32ER71C226KE18 (22 mF, 16 V, X7R, 1210),

GRM31CR71C106KAC7 (10 mF, 16 V, X7R, 1206).

Calculating Bypass Capacitor

If usage of low ESR ceramic capacitors is demand in case

of Adjustable Regulator, connect the bypass capacitor Cb

between Voltage Adjust pin and Q pin according to

Applications circuit at Figure 4.

Parallel combination of bypass capacitor Cb with the

feedback resistor R1 contributes in the device transfer

function as an additional zero and affects the device loop

stability, therefore its value must be optimized. Attention

to the Output Capacitor value and its ESR must be paid. See

also Stability in High Speed Linear LDO Regulators

Application Note, AND8037/D for more information.

Optimal value of bypass capacitor is given by following

expression

Cb+1

2 p fz R1@(F)

where

R1 = the upper feedback resistor

fz = the frequency of the zero added into the device

transfer function by R1 and Cb external components.

Set the R1 resistor according to output voltage

requirement. Chose the fz with regard on the output

capacitance CQ, refer to the table below.

CQ (mF) 10 22 47 100

fz Range (kHz) 20 - 50 14 - 35 10 - 20 7 – 14

Ceramic capacitors and its part numbers listed bellow

have been used as low ESR output capacitors CQ from the

table above to define the frequency ranges of additional

zero required for stability.

GRM31CR71C106KAC7 (10 mF, 16 V, X7R, 1206)

GRM32ER71C226KE18 (22 mF, 16 V, X7R, 1210)

GRM32ER61C476ME15 (47 mF, 16 V, X5R, 1210)

GRM32ER60J107ME20 (100 mF, 6.3 V, X5R, 1210)

Inhibit Input

The inhibit pin is used to turn the regulator on or off. By

holding the pin down to a voltage less than 0.5 V (or 1.8 V

for NCV4276A parts), the output of the regulator will be

turned off. During startup transient the regulator is off at

input voltage slew rates faster than 30 V/ms. When the

voltage on the Inhibit pin is greater than 3.5 V (or 2.8 V for

NCV4276A parts), the output of the regulator will be

enabled to power its output to the regulated output voltage.

The inhibit pin may be connected directly to the input pin

to give constant enable to the output regulator.

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Setting the Output Voltage (Adjustable Version)

The output voltage range of the adjustable version can be

set between 2.5 V and 20 V. This is accomplished with an

external resistor divider feeding back the voltage to the IC

back to the error amplifier by the voltage adjust pin VA.

The internal reference voltage is set to a temperature stable

reference of 2.5 V.

The output voltage is calculated from the following

formula. Ignoring the bias current into the VA pin:

VQ+[(R1 )R2) * Vref]ńR2

Use R2 < 50 k to avoid significant voltage output errors

due to VA bias current.

Connecting VA directly to Q without R1 and R2 creates

an output voltage of 2.5 V.

Designers should consider the tolerance of R1 and R2

during the design phase.

The input voltage range for operation (pin 1) of the

adjustable version is between (VQ + 0.5 V) and 40 V.

Internal bias requirements dictate a minimum input voltage

of 4.5 V. The dropout voltage for output voltages less than

4.0 V is (4.5 V − VQ).

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Calculating Power Dissipation

in a Single Output Linear Regulator

The maximum power dissipation for a single output

regulator (Figure 50) is:

PD(max) +[VI(max) *VQ(min)]I

Q(max) (1)

)VI(max)Iq

where

VI(max) is the maximum input voltage,

VQ(min) is the minimum output voltage,

IQ(max) is the maximum output current for the

application,

Iq is the quiescent current the regulator

consumes at IQ(max).

Once the value of PD(max) is known, the maximum

permissible value of RqJA can be calculated:

RqJA +150oC*TA

PD(2)

The value of RqJA can then be compared with those in the

package section of the data sheet. Those packages with

RqJA less than the calculated value in Equation 2 will keep

the die temperature below 150°C.

In some cases, none of the packages will be sufficient to

dissipate the heat generated by the IC, and an external

heatsink will be required.

SMART

REGULATOR®

Control

Features

Figure 50. Single Output Regulator with Key

Performance Parameters Labeled

VIVQ

}

Heatsinks

A heatsink effectively increases the surface area of the

package to improve the flow of heat away from the IC and

into the surrounding air.

Each material in the heat flow path between the IC and

the outside environment will have a thermal resistance.

Like series electrical resistances, these resistances are

summed to determine the value of RqJA:

RqJA +RqJC )RqCS )RqSA (3)

where

RqJC is the junction−to−case thermal resistance,

RqCS is the case−to−heatsink thermal resistance,

RqSA is the heatsink−to−ambient thermal

resistance.

RqJC appears in the package section of the data sheet.

Like RqJA, it too is a function of package type. RqCS and

RqSA are functions of the package type, heatsink and the

interface between them. These values appear in data sheets

of heatsink manufacturers.

Thermal, mounting, and heatsinking considerations are

discussed in the ON Semiconductor application note

AN1040/D.

NCV4276, NCV4276A

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Thermal Model

A discussion of thermal modeling is in the ON Semiconductor web site: http://www.onsemi.com/pub/collateral/BR1487−D.PDF.

Table 1. DPAK 5−Lead Thermal RC Network Models

Drain Copper Area (1 oz thick) 168 mm2736 mm2168 mm2736 mm2

(SPICE Deck Format) Cauer Network Foster Network

168 mm2736 mm2Units Ta u Ta u Units

C_C1 Junction GND 1.00E−06 1.00E−06 W−s/C 1.36E−08 1.361E−08 sec

C_C2 node1 GND 1.00E−05 1.00E−05 W−s/C 7.41E−07 7.411E−07 sec

C_C3 node2 GND 6.00E−05 6.00E−05 W−s/C 1.04E−05 1.029E−05 sec

C_C4 node3 GND 1.00E−04 1.00E−04 W−s/C 3.91E−05 3.737E−05 sec

C_C5 node4 GND 4.36E−04 3.64E−04 W−s/C 1.80E−03 1.376E−03 sec

C_C6 node5 GND 6.77E−02 1.92E−02 W−s/C 3.77E−01 2.851E−02 sec

C_C7 node6 GND 1.51E−01 1.27E−01 W−s/C 3.79E+00 9.475E−01 sec

C_C8 node7 GND 4.80E−01 1.018 W−s/C 2.65E+01 1.173E+01 sec

C_C9 node8 GND 3.740 2.955 W−s/C 8.71E+01 8.59E+01 sec

C_C10 node9 GND 10.322 0.438 W−s/C sec

168 mm2736 mm2R’s R’s

R_R1 Junction node1 0.015 0.015 C/W 0.0123 0.0123 C/W

R_R2 node1 node2 0.08 0.08 C/W 0.0585 0.0585 C/W

R_R3 node2 node3 0.4 0.4 C/W 0.0304 0.0287 C/W

R_R4 node3 node4 0.2 0.2 C/W 0.3997 0.3772 C/W

R_R5 node4 node5 2.97519 2.6171 C/W 3.115 2.68 C/W

R_R6 node5 node6 8.2971 1.6778 C/W 3.571 1.38 C/W

R_R7 node6 node7 25.9805 7.4246 C/W 12.851 5.92 C/W

R_R8 node7 node8 46.5192 14.9320 C/W 35.471 7.39 C/W

R_R9 node8 node9 17.7808 19.2560 C/W 46.741 28.94 C/W

R_R10 node9 GND 0.1 0.1758 C/W C/W

NOTE: Bold face items represent the package without the external thermal system.

Junction R1

C1C2

Time constants are not simple RC products. Amplitudes

of mathematical solution are not the resistance values.

Ambient

(thermal ground)

Figure 51. Grounded Capacitor Thermal Network (“Cauer” Ladder)

Junction R1

C1C2

Each rung is exactly characterized by its RC−product

time constant; amplitudes are the resistances.

Ambient

(thermal ground)

Figure 52. Non−Grounded Capacitor Thermal Ladder (“Foster” Ladder)

NCV4276, NCV4276A

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Table 2. D2PAK 5−Lead Thermal RC Network Models

Drain Copper Area (1 oz thick) 241 mm2788 mm2241 mm2788 mm2

(SPICE Deck Format) Cauer Network Foster Network

241 mm2653 mm2Units Ta u Ta u Units

C_C1 Junction GND 1.00E−06 1.00E−06 W−s/C 1.361E−08 1.361E−08 sec

C_C2 node1 GND 1.00E−05 1.00E−05 W−s/C 7.411E−07 7.411E−07 sec

C_C3 node2 GND 6.00E−05 6.00E−05 W−s/C 1.005E−05 1.007E−05 sec

C_C4 node3 GND 1.00E−04 1.00E−04 W−s/C 3.460E−05 3.480E−05 sec

C_C5 node4 GND 2.82E−04 2.87E−04 W−s/C 7.868E−04 8.107E−04 sec

C_C6 node5 GND 5.58E−03 5.95E−03 W−s/C 7.431E−03 7.830E−03 sec

C_C7 node6 GND 4.25E−01 4.61E−01 W−s/C 2.786E+00 2.012E+00 sec

C_C8 node7 GND 9.22E−01 2.05 W−s/C 2.014E+01 2.601E+01 sec

C_C9 node8 GND 1.73 4.88 W−s/C 1.134E+02 1.218E+02 sec

C_C10 node9 GND 7.12 1.31 W−s/C sec

241 mm2653 mm2R’s R’s

R_R1 Junction node1 0.015 0.0150 C/W 0.0123 0.0123 C/W

R_R2 node1 node2 0.08 0.0800 C/W 0.0585 0.0585 C/W

R_R3 node2 node3 0.4 0.4000 C/W 0.0257 0.0260 C/W

R_R4 node3 node4 0.2 0.2000 C/W 0.3413 0.3438 C/W

R_R5 node4 node5 1.85638 1.8839 C/W 1.77 1.81 C/W

R_R6 node5 node6 1.23672 1.2272 C/W 1.54 1.52 C/W

R_R7 node6 node7 9.81541 5.3383 C/W 4.13 3.46 C/W

R_R8 node7 node8 33.1868 18.9591 C/W 6.27 5.03 C/W

R_R9 node8 node9 27.0263 13.3369 C/W 60.80 29.30 C/W

R_R10 node9 GND 1.13944 0.1191 C/W C/W

NOTE: Bold face items represent the package without the external thermal system.

The Cauer networks generally have physical significance and may be divided between nodes to separate thermal behavior

due to one portion of the network from another. The Foster networks, though when sorted by time constant (as above) bear

a rough correlation with the Cauer networks, are really only convenient mathematical models. Cauer networks can be easily

implemented using circuit simulating tools, whereas Foster networks may be more easily implemented using mathematical

tools (for instance, in a spreadsheet program), according to the following formula:

R(t) +

i+1Riǒ1−e−tńtauiǓ

NCV4276, NCV4276A

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110

150

Figure 53. qJA vs. Copper Spreader Area,

DPAK 5−Lead

Figure 54. qJA vs. Copper Spreader Area,

D2PAK 5−Lead

100

200 250 300 350 400 450 500 550 600 650 700 750

COPPER AREA (mm2)

qJA (C°/W)

1 oz

2 oz

110

150

100

200 250 300 350 400 450 500 550 600 650 700 750

COPPER AREA (mm2)

qJA (C°/W)

1 oz

2 oz

100

1.0

0.1

0.01

TIME (sec)

R(t) C°/W

0.0000001 0.000001 0.00001 0.0001 0.001 0.01 0.1 1.0 10 100 1000

Cu Area 167 mm2

Cu Area 736 mm2

Figure 55. Single−Pulse Heating Curves, DPAK 5−Lead

100

1.0

0.1

0.01

TIME (sec)

R(t) C°/W

0.0000001 0.000001 0.00001 0.0001 0.001 0.01 0.1 1.0 10 100 1000

Cu Area 167 mm2

Cu Area 736 mm2

sqrt(t)

Figure 56. Single−Pulse Heating Curves, D2PAK 5−Lead

NCV4276, NCV4276A

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100

1.0

0.1

0.01

PULSE WIDTH (sec)

RqJA 788 mm2 C°/W

0.0000001 0.000001 0.00001 0.0001 0.001 0.01 0.1 1.0 10 100 1000

Non−normalized Response

50% Duty Cycle

20%

10%

100

1.0

0.1

0.01

PULSE WIDTH (sec)

RqJA 736 mm2 C°/W

0.0000001 0.000001 0.00001 0.0001 0.001 0.01 0.1 1.0 10 100 1000

Non−normalized Response

50% Duty Cycle

Figure 57. Duty Cycle for 1, Spreader Boards, DPAK 5−Lead

20%

10%

Figure 58. Duty Cycle for 1, Spreader Boards, D2PAK 5−Lead

NCV4276, NCV4276A

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76AXXG

ALYWW

V4276A−XX

AWLYWWG

NCV4276A NCV4276A

D2PAK

5−PIN

DS SUFFIX

CASE 936A

DPAK

5−PIN

DT SUFFIX

CASE 175AA

MARKING DIAGRAMS

4276XG

ALYWW

V4276−XX

AWLYWWG

NCV4276 NCV4276

D2PAK

5−PIN

DS SUFFIX

CASE 936A

DPAK

5−PIN

DT SUFFIX

CASE 175AA

A = Assembly Location

WL, L = Wafer Lot

Y = Year

WW = Work Week

G = Pb−Free Device

x, xx = Voltage Ratings as

indicated below

*Tab is connected to Pin 3 on all packages.

DPAK

XX = AJ (Adj. Voltage)

XX = 50 (5.0 V)

XX = 33 (3.3 V)

D2PAK

XX = AJ (Adj. Voltage)

XX = 50 (5.0 V)

A−Version

DPAK

X = V (Adj. Voltage)

X = 5 (5.0 V)

X = 3 (3.3 V)

D2PAK

XX = AJ (Adj. Voltage)

XX = 50 (5.0 V)

XX = 33 (3.3 V)

XX = 25 (2.5 V)

XX = 18 (1.8 V)

Non−A−Version

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ORDERING INFORMATION

Device Output Voltage Accuracy Output Voltage Package Shipping†

NCV4276DT50RKG

5.0 V

DPAK, 5−Pin

(Pb−Free)

2500 / Tape & Reel

NCV4276DS50G D2PAK, 5−Pin

(Pb−Free)

50 Units / Rail

NCV4276DS50R4G D2PAK, 5−Pin

(Pb−Free)

800 / Tape & Reel

NCV4276DT33RKG

3.3 V

DPAK, 5−Pin

(Pb−Free)

2500 / Tape & Reel

NCV4276DS33G D2PAK, 5−Pin

(Pb−Free)

50 Units / Rail

NCV4276DS33R4G D2PAK, 5−Pin

(Pb−Free)

800 / Tape & Reel

NCV4276DS25G

2.5 V

D2PAK, 5−Pin

(Pb−Free)

50 Units / Rail

NCV4276DS25R4G D2PAK, 5−Pin

(Pb−Free)

800 / Tape & Reel

NCV4276DS18G

1.8 V

D2PAK, 5−Pin

(Pb−Free)

50 Units / Rail

NCV4276DS18R4G D2PAK, 5−Pin

(Pb−Free)

800 / Tape & Reel

NCV4276DTADJRKG

Adjustable

DPAK, 5−Pin

(Pb−Free)

2500 / Tape & Reel

NCV4276DSADJG D2PAK, 5−Pin

(Pb−Free)

50 Units / Rail

NCV4276DSADJR4G 800 / Tape & Reel

NCV4276ADT33RKG

3.3 V DPAK, 5−Pin

(Pb−Free)

2500 / Tape & Reel

NCV4276ADT50RKG

5.0 V

DPAK, 5−Pin

(Pb−Free)

2500 / Tape & Reel

NCV4276ADS50G D2PAK, 5−Pin

(Pb−Free)

50 Units / Rail

NCV4276ADS50R4G 800 / Tape & Reel

NCV4276ADTADJRKG

Adjustable

DPAK, 5−Pin

(Pb−Free)

2500 / Tape & Reel

NCV4276ADSADJG D2PAK, 5−Pin

(Pb−Free)

50 Units / Rail

NCV4276ADSADJR4G 800 / Tape & Reel

†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging

Specifications Brochure, BRD8011/D.

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PACKAGE DIMENSIONS

5 PL

0.13 (0.005) T

−T−SEATING

PLANE

DIM MIN MAX MIN MAX

MILLIMETERSINCHES

A0.235 0.245 5.97 6.22

B0.250 0.265 6.35 6.73

C0.086 0.094 2.19 2.38

D0.020 0.028 0.51 0.71

E0.018 0.023 0.46 0.58

F0.024 0.032 0.61 0.81

G0.180 BSC 4.56 BSC

H0.034 0.040 0.87 1.01

J0.018 0.023 0.46 0.58

K0.102 0.114 2.60 2.89

L0.045 BSC 1.14 BSC

R0.170 0.190 4.32 4.83

S0.025 0.040 0.63 1.01

U0.020 −−− 0.51 −−−

V0.035 0.050 0.89 1.27

Z0.155 0.170 3.93 4.32

NOTES:

1. DIMENSIONING AND TOLERANCING

PER ANSI Y14.5M, 1982.

2. CONTROLLING DIMENSION: INCH.

R1 0.185 0.210 4.70 5.33

1234 5

DPAK 5, CENTER LEAD CROP

DT SUFFIX

CASE 175AA−01

ISSUE A

6.4

0.252

0.8

0.031

10.6

0.417

5.8

0.228

SCALE 4:1 ǒmm

inchesǓ

0.34

0.013

5.36

0.217

2.2

0.086

SOLDERING FOOTPRINT*

*For additional information on our Pb−Free strategy and soldering

details, please download the ON Semiconductor Soldering and

Mounting Techniques Reference Manual, SOLDERRM/D.

NCV4276, NCV4276A

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PACKAGE DIMENSIONS

PAK 5

CASE 936A−02

ISSUE C

5 REF

123

TERMINAL 6

NOTES:

1. DIMENSIONING AND TOLERANCING PER ANSI

Y14.5M, 1982.

2. CONTROLLING DIMENSION: INCH.

3. TAB CONTOUR OPTIONAL WITHIN DIMENSIONS A

AND K.

4. DIMENSIONS U AND V ESTABLISH A MINIMUM

MOUNTING SURFACE FOR TERMINAL 6.

5. DIMENSIONS A AND B DO NOT INCLUDE MOLD

FLASH OR GATE PROTRUSIONS. MOLD FLASH

AND GATE PROTRUSIONS NOT TO EXCEED 0.025

(0.635) MAXIMUM.

DIM

MIN MAX MIN MAX

MILLIMETERS

0.386 0.403 9.804 10.236

INCHES

B0.356 0.368 9.042 9.347

C0.170 0.180 4.318 4.572

D0.026 0.036 0.660 0.914

E0.045 0.055 1.143 1.397

G0.067 BSC 1.702 BSC

H0.539 0.579 13.691 14.707

K0.050 REF 1.270 REF

L0.000 0.010 0.000 0.254

M0.088 0.102 2.235 2.591

N0.018 0.026 0.457 0.660

P0.058 0.078 1.473 1.981

R5 REF

S0.116 REF 2.946 REF

U0.200 MIN 5.080 MIN

V0.250 MIN 6.350 MIN

0.010 (0.254) T

−T−

OPTIONAL

CHAMFER

8.38

0.33

1.016

0.04

16.02

0.63

10.66

0.42

3.05

0.12

1.702

0.067

SCALE 3:1

inches

SOLDERING FOOTPRINT

ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice

to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any

liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental

damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over

time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under

its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body,

or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death

may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees,

subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of

personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part.

SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.

PUBLICATION ORDERING INFORMATION

N. American Technical Support: 800−282−9855 Toll Free

USA/Canada

Europe, Middle East and Africa Technical Support:

Phone: 421 33 790 2910

Japan Customer Focus Center

Phone: 81−3−5773−3850

NCV4276/D

SMART REGULATOR is a registered trademark of Semiconductor Components Industries, LLC (SCILLC).

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