EM4006
Copyright 2001, EM Mic roelectronic-Marin SA 1 www.emmicroelectronic.com
13.56 MHz 64 Data bit Read Only Contactless
Identification Device
Description
The EM4006 (previously named H4006) is a CMOS
integrated circuit intended for use in electronic Read Only
transponders.
The exited coil connected to the device generates the
power supply via a rectifier and an integrated decoupling
capacitor. The clock used for the logic is also extracted
from the coil. The logic is mainly composed by a miller
code generator and the LROM control. The memory is
factory programmed so that each IC is unique.
Features
Operating frequency range 10 MHz to 15 MHz
RF interface optimized for 13.56 MHz operation
Laser programmed memory array
(64 data bit + 16 CRC bit)
Modulator switch designed to preserve supply voltage
Miller coding
Default data rate is 26484 Baud
Other data rates possible (mask programmable)
On chip rectifier
On chip resonant capacitor
On chip supply buffer capacitor
Applications
Logistics automation
Anticounterfeiting
Access control
Industrial transponder
Typical Operating Configuration
Coil1
Coil2
EM4006
L: typical 1.4µH for fo = 13.56MHz
Fig. 1
Pad Assignment
EM4006
VSS
TESTn
TOUT
VDD
C1 C2 Fig. 2
EM MICROELECTRONIC - MARIN SA
EM4006
Copyright 2001, EM Mic roelectronic-Marin SA 2 www.emmicroelectronic.com
Absolute Maximum Ratings
Parameter Symbol Conditions
Maximum DC Current forced
on COIL1 and COIL2 ICMAX ±30mA
Power Supply VDD -0.3V to 7.5V
Storage Temp. Die form
Storage Temp. PCB form Tst
Tst -55 to +200°C
-55 to +125°C
Electrostatic discharge
maximum to MIL-STD-883C
method 3015 VESD 2000V
Stresses above these listed maximum ratings may cause
permanent damages to the device. Exposure beyond
specified operating conditions may affect device reliability
or cause malfunction.
Handling Procedures
This device has built-in protection against high static
voltages or electric fields; however, anti-static
precautions must be taken as for any other CMOS
component. Unless otherwise specified, proper operation
can only occur when all terminal voltages are kept within
the voltage range. Unused inputs must always be tied to
a defined logic voltage level.
Operating Conditions
Parameter Symb Min Typ Max Units
Operating Temp.
Maximum Coil
Current
AC Voltage on Coil
Supply Frequency
Top
Icoil
Vcoil
fcoil
-40
-10
3
10
14*
13.56
+85
10
15
°C
mA
Vpp
MHz
*) The AC Voltage on Coil is limited by the on chip
voltage limitation circuitry. This is according to the
parameter Icoil.
System Principle
Antenna
Driver
Oscillator
Demodulator
Filter
and
Gain
Data decoder Data received
from transponder
Tranceiver Transponder
Coil1
Coil2
EM4006
Signal on coils
Transponder coil
Transeiver coil
RF Carrier Data Fig. 3
EM4006
Copyright 2001, EM Mic roelectronic-Marin SA 3 www.emmicroelectronic.com
Electrical Characteristics
VDD = 2V, VSS = 0V, fC1 = 13.56MHz sine wave, VC1 = 1.0Vpp centered at (VDD - VSS)/2, Ta = 25°C
unless otherwise specified
Parameter Symbol Test Conditions Min. Typ. Max. Units
Supply Voltage VDD 1.9 (note 1) V
Supply current IDD 60 150 µA
Rectifier Voltage Drop VREC IC1C2 = 1mA, modulator switch on
VREC = (VC1-VC2) - (VDD - VSS)1.8 V
Modulator ON DC voltage
drop (note 2) VON1
VON2 IVDD VSS = 1mA
IVDD VSS = 10mA 1.9
2.4 2.3
2.8 2.8
3.3 V
V
Power on reset (note 3) VR
VR - VMIN 1.2
0.1 1.4
0.25 1.7
0.5 V
V
Coil1 - Coil2 Capacitance CRES Vcoil=100mVRMS f=10kHz 92.6 94.5 96.4 pF
Series resistance of CRES RS3
Power Supply Capacitor Csup 140 pF
Note 1: Maximum voltage is defined by forcing 10 mA on C1 - C2
Note 2: Measured between VDD and VSS
Note 3: According to Figure 7
Block Diagram
Fig. 4
Clock extractor Divider Chain Sequencer Miller Code
Generator
Power
on
Reset LASER
ROM
Modulator
HF Rectifier
Power Management
VDD
VSS
CSUP
+
AC2
AC1
-
CRES
C1
C2
EM4006
Copyright 2001, EM Mic roelectronic-Marin SA 4 www.emmicroelectronic.com
General Description
The transponder will be activated when illuminated by a
RF field of sufficient power and at any frequency that is
compatible with its associated antenna and its internal
power supply circuit input characteristics. The chip will
Power-on-Reset itself when powered by this incoming
energy that exceeds its reset threshold. After resetting
itself the chip will start to transmit its memory contents as
a stream of Miller code. The memory contents is
transmitted by modifying the antenna matching
impedance at its internal clock rate, thereby causing
varying amounts of RF energy to be reflected from the
antenna. This impedance variation will be achieved by
connecting a modulating device across the antenna
terminals. When switched on the modulating device will
present a low impedance to the antenna. This will cause a
change in the matching of the antenna and therefore in
the amount of RF energy reflected by the transponder to
the reader. This reflected signal combines with the
transmitted signal in the receiver to yield an amplitude
modulated signal representative of the IC memory
contents. The “ON” impedance of the modulating device
needs to be comparable to about 100 Ohms to affect the
matching of the antenna and there fore its r efl ect ivity .
The RF signal received from the transponder antenna will
serve several purposes :
power the chip
provide a global reset to the chip through its POR
(Power-On-Reset) function
provide a carrier for the data transmission
provide the input of the internal clock generation circuit
(frequency division)
Functional Description
Output Sequence
Transmission from the transponder will be accomplished
through variation of the antenna load impedance by
switching the modulating device ON and OFF.
Output sequence is composed of cycles which are
repeated. Each cycle is composed of 82 bits Standard
Message Structure (STDMS) which is Miller coded and a
pause (LW) during which the modulating device is OFF
(see figure 6 for details of Miller code).
The pause (LW) is 9bits length.
The 82 bit STDMS consists of 1 start bit, 64 data bits, 16
CRC bits and 1 stop bit.
Start bit (1) Data(64) CRC (16)
S
top bit (1) LW(9)
Memory organisation
As already mentioned above the 82 bits are stored in
laser programmed ROM (LROM). The 82 bits of this
LROM is partioned as followed (see Memory Map):
Factory reserved 9 bits
IC name 10 bits
Customer ID 13 bits
ID code 32 bits
CRC-CCITT 16 bits
Start and stop bits 2 bits
Memory Map
(First out)
012345678910111213141516
Start Factory reserved MSB IC Name
17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
LSB MSB Customer ID LSB
33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48
MSB ID code
49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64
ID code LSB
65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81
LSB CRC - CCITT MSB Stop
EM4006
Copyright 2001, EM Mic roelectronic-Marin SA 5 www.emmicroelectronic.com
Factory reserved bits
These 9 bits are reserved. Default value is 00Bhex.
IC name bits
They contains the 3 last characters device name. For this
device, the value is 006hex.
Customer ID bits
This field contains a code which is defined by EM
Microelectronic-Marin S.A. For standard version, the code
is 0001hex.
ID code bits
This field is programmed from a counter in that way that
each device is unique.
Cyclic redundancy check
The shift register is reset to all zero with each Stop Bit.
CRC code is calculated on 64 data bits. The CRC code is
calculated according to CCITT / ISO 3309 - 1984
standards. See figure 5 for principle block schematic and
generating polynomial of the CRC code.
Start and stop bits
Start bit is set to logic 1 and stop bit is set to logic 0.
CRC Block Diagram
15 14 111213 45678910 0123
data input
BCC REGISTER
SERI
A
LQUOTIENT X16X12X5 FEEDB
A
CK
BEFORE
SHIFT
CRC-C CITT G E N E R
A
TING P O LY NO MI
A
L=
X
16 +
X
12 +
X
5+
X
0
=BCC( Bloc k Che c k Cha
r
acte
r
s) REGISTER ST
A
GE
= E
X
CLUSI
V
E - OR
x
LSBMSB
Fig. 5
RF Interface
Resonant capacitor, Rectifier, Limiter and Modulator
Switch form the unit which is interfacing to the incoming
RF signal. These blocks are interdependent so they are
developed as unit. They interface to the antenna which
typical characteristics are:
LS 1400 nH
RS 3 Ohms
30 < Q < 40 at 13.56 MHz.
Resonant Capacitor
The capacitor value is adjusted by laser fusing. It can be
trimmed by 1pF steps to achieve the absolute value of
94.5pF typically. This option, which is available on
request, allows a smaller capacitor tolerance over the
whole production.
Rectifier and Limiter
A full wave rectifier (Graetz Bridge) is used to provide
supply voltage to the IC. The reverse breakdown of the
diodes is also used to protect the IC from overvoltages.
EM4006
Copyright 2001, EM Mic roelectronic-Marin SA 6 www.emmicroelectronic.com
Modulator Switch
Due to the low impedance of the antenna and resonant
capacitor the Modulator Switch has to present low RF
impedance when switched ON (about 100 ohms).
The minimum time period with the Modulator Switch ON
is 38 µs. At lower data rates this time is even much
longer. The current consumption of divider chain running
at 13 MHz is near 60 µA. Putting together this two figures
it is clear that it is not possible to supply the IC during the
time the Modulator Switch is ON from the integrated
Supply Buffer Capacitor which value is approximately 140
pF. The IC has to get power from the RF field also during
the time the Modulator Switch is ON.
This problem is solved by putting the Modulator Switch on
the output of the Rectifier (between VDD and VSS) and
regulating its ON resistance in function of supply voltage.
When the supply voltage is high the ON impedance is low.
When the supply voltage drops near the region where the
operation of the IC at 13.56 MHz is not guaranteed the
ON impedance is increased in order to prevent further
drop.
NRZ-L
STREAM
DM-M
CODED
1 11111 00000
Bit i-1 Bit i
x 1 no transition at the beginning of Bit i, transition in the middle of Bit i
0 0 transition at the beginning of Bit i, no transition in the middle of Bit i
1 0 no transition at the beginning of Bit i, no transition in the middle of Bit i
Fig. 6
Power Supply Management
For a correct operation, the device must be initialised.
When the transponder is put in the RF field, the supply
voltage increases until it achieves Vr limit (see Figure 7).
During this time and for an additionnal 64 bit period, the
modulator switch is on and the device initialises its
internal logic.
At this point, the data transmission starts and runs while
the supply voltage is higher than Vmin. If the supply
voltage decreases under this limit, the device is again in
an initialising state and the modulator is on.
EM4006
Copyright 2001, EM Mic roelectronic-Marin SA 7 www.emmicroelectronic.com
Fig. 7
Miller Encoder
The input to Miller encoder is NRZ data coming from
LROM. The output is coded according to Miller format and
is driving the modulator Switch. See figure 6 for example
of Miller code.
Clock Generation
The clock of the logic is extracted from the RF signal. The
clock extracted from RF signal is driving the divider chain
consisting of toggle flip-flops. The output of this divider
chain is data clock with which the data from Laser ROM
(LROM) is addressed, encoded and sent to Modulator
Switch.
The layout of divider chain is designed in a way that
different data rates can be chosen with metal mask
(options).
The following division factors are possible on request:
128, 256, 1024, 2048, 4094 and 8192.
The standard is 512.
Others
As mentioned in Output Sequence, during the pause (LW)
the Modulator Switch is OFF. When observing the pause
duration one has to remember that the time with
Modulator Switch OFF effectively observed can vary due
to different terminations of STDMS. The stop bit at 0 can
be represented either by Modulator Switch ON or OFF
depending on the data. The start bit at 1 adds 1/2 of data
period OFF (transition in the middle of bit period).
Figure below show the four possible terminations of
STDMS and its influence on entire period passed by
Modulator Switch OFF. Level LOW represents Modulator
Switch OFF. LDB stands for last data bit.
time
time
modulator
ON/OFF READ
64 bits
period
chip operating voltage range: from Vmin to Vmax
Vmax (voltage clipping)
Vmin
Vr (Read wake up)
chip supply voltage
ON
OFF
supply voltage
VDD
EM4006
Copyright 2001, EM Mic roelectronic-Marin SA 8 www.emmicroelectronic.com
LDB
1
1
0
0
Last data
bit Stop bit
at 0 Pause 8 +1 bit periods Star t bit
at 1
This transition is not due to Miller encoding.
Fig. 8
EM4006
Copyright 2001, EM Mic roelectronic-Marin SA 9 www.emmicroelectronic.com
Pad Description
Name Description
C2 connection t o antenna
C1 connection t o antenna
VDD positive supply
Tout test output
TESTn test input with pull up
VSS negative supply
Package Inf ormat ion
FF g
C2 C1
MARKING
AREA
D
A
B
e
JK
FRONT VIEW
TOP VIEW
R
Y
X
Z
SYMBOL MIN TYP MAX
X8.0
Y4.0
Z1.0
Dimensions are in mm
Dimensions are in mm
CID Package PCB Package
C2 C1
SYMBOL MIN TYP MAX
A 8.2 8.5 8.8
B 3.8 4.0 4.2
D 5.8 6.0 6.2
e 0.38 0.5 0.62
F 1.25 1.3 1.35
g 0.3 0.4 0.5
J 0.42 0.44 0.46
K 0.115 0.127 0.139
R 0.4 0.5 0.6
Fig. 9 Fig. 10
Pad position
EM4006
All dimensions in µm
Y
X1041
1600
152
316
14
740
325
1144
1124
C1, C2 pad size : 95 X 95
Other pads size : 76 X 76
772
513
Fig. 11
EM4006
Copyright 2001, EM Mic roelectronic-Marin SA 10 www.emmicroelectronic.com
Ordering Information
Die Form
This chart shows general offering; for detailed Part Number to order, please see the table “Standard Versions” below.
EM4006 -
V
ersion: Customer Version:
F9 = Miller, 512 clocks per bit %%% = only for custom specific version
Die form: Bumpin
g
:
WW = Wafer " " (blank) = no bumps
W S = Sawn Wafer/Frame E = with Gold Bumps
W T = Sticky Tape
WP = Waf f l e Pack (note 1) Thickness:
7 = 7 mil s (178um)
11 = 11 mil s (280um)
21 = 21 mil s (533um)
%%%F9 WS 11
Packaged Devices
This chart shows general offering; for detailed Part Number to order, please see the table “Standard Versions” below.
Remarks:
For ordering please use table of “Standard Version” table below.
For specifications of Delivery Form, including gold bumps, tape and bulk, as well as possible other delivery form or
packages, please contact EM Microelectronic-Marin S.A.
Note 1: This is a non-standard package. Please contact EM Microelectronic-Marin S.A for availability.
Standard Versions:
The versions below are considered standards and should be readily available. For other versions or other delivery form,
please contact EM Microelectronic-Marin S.A. Please make sure to give complete part number when ordering (without
space between letters).
Part Number Bit
coding Cycle/
bit Package/Die Form Delivery
Form / For EM internal use
only
Bumping old ver si on OPS#
EM4006 F9 CB2RC Miller 512 PCB Package, 2 pins bulk 501 2878
EM4006 F9 CI2LC Miller 512 CID package, 2 pins (length 2.5mm) bulk 501 2930
EM4006 F9 WP7 Miller 512 Die in waffle pack, 7 mils no bumps 501 3669
EM4006 F9 YYY-%%% Miller 512 custom custom %%%
Product Support
Check our Web Site under Products/RF Identification section.
Questions ca n be sent to cid@ em mi croel ectr oni c.com
© EM Microelectronic-Marin S A, 01/02, Rev. C/404
EM Microelectronic-Marin SA cannot assume responsibility for use of any circuitry described other than circuitry
entirely embodied in an EM Microelectronic-Marin SA product. EM Microelectronic-Marin SA reserves the right to
change the circuitry and specifications without notice at any time. You are strongly urged to ensure that the
information given has not been supersede d by a more up-to-date version.
EM4006 -
V
ersion: Customer Version:
F9 = Miller, 512 clocks per bit %%% = only for custom specific version
Packa
e: Deliver
y
Form:
CI2L = CID Pack, 2 pins (length 2.5mm ) B = Tape
CB2R = PCB P ackage, 2 pins C = Bulk
F9 CI2L C %%%