
ADM663/ADM666
REV. 0 –3–
DIP & SOIC PIN CONFIGURATIONS
GENERAL INFORMATION
The ADM663/ADM666 contains a micropower bandgap refer-
ence voltage source, an error amplifier A1, two comparators
C1, C2 and a series pass output transistor. A P-channel FET
and an NPN transistor are used on the ADM663 while the
ADM666 uses an NPN output transistor.
CIRCUIT DESCRIPTION
The internal bandgap reference is trimmed to 1.3 V ± 30 mV.
This is used as a reference input to the error amplifier A1. The
feedback signal from the regulator output is supplied to the
other input by an on-chip voltage divider or by two external re-
sistors. When V
SET
is at ground, the internal divider provides
the error amplifier’s feedback signal giving a +5 V output. When
V
SET
is at more than 50 mV above ground, the error amplifier's
input is switched directly to the V
SET
pin, and external resistors
are used to set the output voltage. The external resistors are
selected so that the desired output voltage gives 1.3 V at V
SET
.
Comparator C1 monitors the output current via the SENSE
input. This input, referenced to V
OUT(2)
, monitors the voltage
drop across a load sense resistor. If the voltage drop exceeds
0.5 V, then the error amplifier A
1
is disabled and the output
current is limited.
The ADM663 has an additional amplifier, A2, which provides a
temperature-proportional output, V
TC
. If this is summed into
the inverting input of the error amplifier, a negative temperature
coefficient results at the output. This is useful when powering
liquid crystal displays over wide temperature ranges.
The ADM666 has an additional comparator, C3 which com-
pares the voltage on the Low Battery Input, LBI, pin to the in-
ternal +1.3 V reference. The output from the comparator drives
PIN FUNCTION DESCRIPTION
Mnemonic Function
V
OUT(1) (2)
Voltage Regulator Output(s)
V
IN
Voltage Regulator Input
SENSE Current Limit Sense Input. (Referenced to
V
OUT(2).
) If not used it should be connected to
V
OUT(2)
GND Ground Pin. Must be connected to 0 V
LBI Low Battery Detect Input. Compared with 1.3 V
LBO Low Battery Detect Output. Open Drain Output
SHDN Digital Input. May be used to disable the device
so that the power consumption is minimized
V
SET
Voltage Setting Input. Connect to GND for +5 V
output or connect to resistive divider for adjust
able output
V
TC
Temperature-Proportional Voltage for negative
TC Output
an open drain FET connected to the Low Battery Output pin,
LBO. The Low Battery Threshold may be set using a suitable
voltage divider connected to LBI. When the voltage on LBI falls
below 1.3 V, the open drain output LBO is pulled low.
Both the ADM663 and the ADM666 contain a shutdown
(SHDN) input which can be used to disable the error amplifier
and hence the voltage output. The quiescent current in shut-
down is less than 12 µA.
50mV
VIN
ADM663
SHDN
GND
VTC
VSET
VOUT1
VOUT2
SENSE
1.3V
REF
C2
0.9V
0.5V
C1
A2
A1
Figure 1. ADM663 Functional Block Diagram
SENSE
VOUT2
VOUT1
GND
VIN
VTC
VSET
SHDN
1
2
3
4
8
7
6
5
TOP VIEW
(Not to Scale)
ADM663
SENSE
V
OUT
LBI
GND
1
2
3
4
8
7
6
5
TOP VIEW
(Not to Scale)
ADM666
V
IN
LBO
V
SET
SHDN