Automotive Mobile LPDDR2 SDRAM FAAT Addendum Introduction Addendum: Automotive Mobile LPDDR2 SDRAM MT42L32M16D1, MT42L32M32D2, MT42L16M32D1 Introduction Table 1: Key Timing Parameters This addendum provides information for the fuseblow automotive (FA) option for the Micron 512Mb Mobile Low-Power DDR2 SDRAM (LPDDR2) device. The FA option device disables the device power-saving functionality. Speed Clock Rate Data Rate Grade (MHz) (Mb/s/pin) This addendum does not provide detailed device information. The standard density-specific device data sheet provides a complete description of device functionality, operating modes, and specifications unless specified herein. Information provided here is in addition to or supersedes information in the device data sheet. WL tRCD/tRP -25 400 800 6 3 Typical -3 333 667 5 2 Typical Options * VDD2: 1.2V Marking L * Configuration Features - 4 Meg x 32 x 4 banks 16M32 - 8 Meg x 16 x 4 banks 32M16 - 2 x 8 Meg x 16 x 4 banks 32M32 * Device type * Ultra low-voltage core and I/O power supplies - VDD2 = 1.14-1.30V - VDDCA/VDDQ = 1.14-1.30V - VDD1 = 1.70-1.95V * Clock frequency range - 400-10 MHz (data rate range: 800-20 Mb/s/pin) * Four-bit pre-fetch DDR architecture * Four internal banks for concurrent operation * Multiplexed, double data rate, command/address inputs; commands entered on every CK edge * Bidirectional/differential data strobe per byte of data (DQS/DQS#) * Programmable READ and WRITE latencies (RL/WL) * Programmable burst lengths: 4, 8, or 16 * On-chip temperature sensor: self-refresh rate control * Partial-array self refresh (PASR) * Deep power-down mode (DPD) * Selectable output drive strength (DS) * Clock stop capability * RoHS-compliant, "green" packaging PDF: 09005aef86530df3 u67m_512mb_faat_mobile_lpddr2.pdf - Rev. B 11/15 EN RL - LPDDR2-S4, 1 die in package D1 - LPDDR2-S4, 2 die in package D2 * FBGA "green" package - 134-ball FBGA (10mm x 11.5mm) AC - 168-ball FBGA (12mm x 12mm) LG * Timing - cycle time - 2.5ns @ RL = 6 -25 - 3.0ns @ RL = 5 -3 * Automotive certified - Fuse-blow, Package-level burn-in FA * Operating temperature range - From -40C to +105C * Revision 1 AT :A Micron Technology, Inc. reserves the right to change products or specifications without notice. (c) 2015 Micron Technology, Inc. All rights reserved. Products and specifications discussed herein are subject to change by Micron without notice. Automotive Mobile LPDDR2 SDRAM FAAT Addendum Introduction Table 2: S4 Configuration Addressing Architecture 16 Meg x 32 32 Meg x 16 32 Meg x 32 4 Meg x 32 x 4 banks 8 Meg x 16 x 4 banks 2 x 8 Meg x 16 x 4 banks Row addressing 8K (A[12:0]) 8K (A[12:0]) 8K (A[12:0]) Column addressing 512 (A[8:0]) 1K (A[9:0]) 1K (A[9:0]) Number of die 1 1 2 Number of channels 1 1 1 Die per rank 1 1 2 Ranks per channel 1 1 1 Die configuration See Package Block Diagrams for descriptions of signal connections and die configurations for each respective architecture. Part Numbering Figure 1: 512Mb LPDDR2 Part Numbering MT 42 L 32M32 D2 LG -25 Micron Technology FA AT :A Design Revision :A = First generation Product Family Operating Temperature 42 = Mobile LPDDR2 SDRAM AT = -40C to +105C Operating Voltage L = 1.2V Product Certification Configuration FA = Fuse-blow automotive, with functionality to disable power saving 16M32 = One 16 Meg x 32 32M16 = One 32 Meg x 16 Cycle Time 32M32 = Two 32 Meg x 16 -25 = 2.5ns, tCK RL = 6 -3 = 3.0ns, tCK RL = 5 Addressing D1 = LPDDR2, 1 die Package Codes D2 = LPDDR2, 2 die AC = 134-ball FBGA, 10mm x 11.5mm LG = 168-ball FBGA, 12mm x 12mm PDF: 09005aef86530df3 u67m_512mb_faat_mobile_lpddr2.pdf - Rev. B 11/15 EN 2 Micron Technology, Inc. reserves the right to change products or specifications without notice. (c) 2015 Micron Technology, Inc. All rights reserved. Automotive Mobile LPDDR2 SDRAM FAAT Addendum General Description General Description The 512Mb Mobile Low-Power DDR2 SDRAM (LPDDR2) is a high-speed CMOS, dynamic random-access memory containing 536,870,912 bits. The LPDDR2-S4 device is internally configured as an four-bank DRAM. Each of the x16's 134,217,728-bit banks is organized as 8192 rows by 1024 columns by 16 bits. Each of the x32's 134,217,728-bit banks is organized as 8192 rows by 512 columns by 32 bits. General Notes Throughout the data sheet, figures and text refer to DQs as "DQ." DQ should be interpreted as any or all DQ collectively, unless specifically stated otherwise. "DQS" and "CK" should be interpreted as DQS, DQS# and CK, CK# respectively, unless specifically stated otherwise. "BA" includes all BA pins used for a given density. Complete functionality may be described throughout the entire document. Any page or diagram may have been simplified to convey a topic and may not be inclusive of all requirements. Any specific requirement takes precedence over a general statement. Any functionality not specifically stated herein is considered undefined, illegal, is not supported, and will result in unknown operation. In timing diagrams, "CMD" is used as an indicator only. Actual signals occur on CA[9:0]. VREF indicates V REFCA and V REFDQ. PDF: 09005aef86530df3 u67m_512mb_faat_mobile_lpddr2.pdf - Rev. B 11/15 EN 3 Micron Technology, Inc. reserves the right to change products or specifications without notice. (c) 2015 Micron Technology, Inc. All rights reserved. Automotive Mobile LPDDR2 SDRAM FAAT Addendum IDD Specifications IDD Specifications Table 3: 16 Meg x 32 IDD Specifications VDD2, VDDQ, VDDCA = 1.14-1.30V; VDD1 = 1.70-1.95V Speed Grade Parameter Supply -25 -3 Unit IDD01 VDD1 9 9 mA IDD02 VDD2 29 29 IDD0,in VDDCA + VDDQ 10 10 A IDD2P1 VDD1 200 200 IDD2P2 VDD2 500 500 IDD2P,in VDDCA + VDDQ 75 75 IDD2PS1 VDD1 200 200 IDD2PS2 VDD2 500 500 IDD2PS,in VDDCA + VDDQ 75 75 IDD2N1 VDD1 2 2 IDD2N2 VDD2 10 10 IDD2N,in VDDCA + VDDQ 10 10 IDD2NS1 VDD1 0.7 0.7 IDD2NS2 VDD2 2.5 2.5 IDD2NS,in VDDCA + VDDQ 6 6 IDD3P1 VDD1 750 750 A IDD3P2 VDD2 4 4 mA IDD3P,in VDDCA + VDDQ 240 240 A IDD3PS1 VDD1 750 750 A A mA mA IDD3PS2 VDD2 4 4 mA IDD3PS,in VDDCA + VDDQ 240 240 A IDD3N1 VDD1 0.7 0.7 mA IDD3N2 VDD2 13.5 13.5 IDD3N,in VDDCA + VDDQ 10 10 IDD3NS1 VDD1 0.7 0.7 IDD3NS2 VDD2 2.5 2.5 IDD3NS,in VDDCA + VDDQ 6 6 IDD4R1 VDD1 2 2 IDD4R2 VDD2 165 165 IDD4R,in VDDCA 10 10 IDD4W1 VDD1 2 2 IDD4W2 VDD2 130 130 IDD4W,in VDDCA + VDDQ 50 50 PDF: 09005aef86530df3 u67m_512mb_faat_mobile_lpddr2.pdf - Rev. B 11/15 EN 4 mA mA mA Micron Technology, Inc. reserves the right to change products or specifications without notice. (c) 2015 Micron Technology, Inc. All rights reserved. Automotive Mobile LPDDR2 SDRAM FAAT Addendum IDD Specifications Table 3: 16 Meg x 32 IDD Specifications (Continued) VDD2, VDDQ, VDDCA = 1.14-1.30V; VDD1 = 1.70-1.95V Speed Grade Parameter Supply -25 -3 Unit VDD1 22 22 mA IDD52 VDD2 60 60 IDD5,in VDDCA + VDDQ 10 10 IDD5AB1 VDD1 1.2 1.2 IDD5AB2 VDD2 12 12 IDD5AB,in IDD51 VDDCA + VDDQ 10 10 IDD61 VDD1 500 500 IDD62 VDD2 2000 2000 IDD6,in VDDCA + VDDQ 50 50 IDD81 VDD1 25 25 IDD82 VDD2 60 60 IDD8,in VDDCA + VDDQ 25 25 mA A A Table 4: 32 Meg x 16 IDD Specifications VDD2, VDDQ, VDDCA = 1.14-1.30V; VDD1 = 1.70-1.95V Speed Grade Parameter Supply -25 -3 Unit IDD01 VDD1 9 9 mA IDD02 VDD2 29 29 IDD0,in VDDCA + VDDQ 10 10 IDD2P1 VDD1 200 200 IDD2P2 VDD2 500 500 IDD2P,in VDDCA + VDDQ 75 75 IDD2PS1 VDD1 200 200 IDD2PS2 VDD2 500 500 IDD2PS,in VDDCA + VDDQ 75 75 VDD1 2 2 IDD2N2 VDD2 10 10 IDD2N,in VDDCA + VDDQ 10 10 IDD2NS1 VDD1 0.7 0.7 IDD2NS2 VDD2 2.5 2.5 IDD2NS,in IDD2N1 A A mA mA VDDCA + VDDQ 6 6 IDD3P1 VDD1 750 750 A IDD3P2 VDD2 4 4 mA IDD3P,in VDDCA + VDDQ 240 240 A PDF: 09005aef86530df3 u67m_512mb_faat_mobile_lpddr2.pdf - Rev. B 11/15 EN 5 Micron Technology, Inc. reserves the right to change products or specifications without notice. (c) 2015 Micron Technology, Inc. All rights reserved. Automotive Mobile LPDDR2 SDRAM FAAT Addendum IDD Specifications Table 4: 32 Meg x 16 IDD Specifications (Continued) VDD2, VDDQ, VDDCA = 1.14-1.30V; VDD1 = 1.70-1.95V Speed Grade Parameter IDD3PS1 Supply -25 -3 Unit VDD1 750 750 A IDD3PS2 VDD2 4 4 mA IDD3PS,in VDDCA + VDDQ 240 240 A IDD3N1 VDD1 0.7 0.7 mA IDD3N2 VDD2 13.5 13.5 IDD3N,in VDDCA + VDDQ 10 10 IDD3NS1 VDD1 0.7 0.7 IDD3NS2 VDD2 2.5 2.5 IDD3NS,in VDDCA + VDDQ 6 6 IDD4R1 VDD1 2 2 IDD4R2 VDD2 125 125 IDD4R,in VDDCA 10 10 IDD4W1 VDD1 2 2 IDD4W2 VDD2 90 90 IDD4W,in VDDCA + VDDQ 30 30 IDD51 VDD1 22 22 IDD52 VDD2 60 60 IDD5,in VDDCA + VDDQ 10 10 IDD5AB1 VDD1 1.2 1.2 IDD5AB2 VDD2 12 12 IDD5AB,in VDDCA + VDDQ 10 10 IDD61 VDD1 500 500 IDD62 VDD2 2000 2000 IDD6,in VDDCA + VDDQ 50 50 IDD81 VDD1 25 25 IDD82 VDD2 60 60 IDD8,in VDDCA + VDDQ 25 25 mA mA mA mA mA A A Table 5: 32 Meg x 32 IDD Specifications VDD2, VDDQ, VDDCA = 1.14-1.30V; VDD1 = 1.70-1.95V Speed Grade Parameter Supply -25 -3 Unit IDD01 VDD1 18 18 mA IDD02 VDD2 58 58 IDD0,in VDDCA + VDDQ 20 20 PDF: 09005aef86530df3 u67m_512mb_faat_mobile_lpddr2.pdf - Rev. B 11/15 EN 6 Micron Technology, Inc. reserves the right to change products or specifications without notice. (c) 2015 Micron Technology, Inc. All rights reserved. Automotive Mobile LPDDR2 SDRAM FAAT Addendum IDD Specifications Table 5: 32 Meg x 32 IDD Specifications (Continued) VDD2, VDDQ, VDDCA = 1.14-1.30V; VDD1 = 1.70-1.95V Speed Grade Parameter Supply -25 -3 Unit VDD1 400 400 A IDD2P2 VDD2 1000 1000 IDD2P,in VDDCA + VDDQ 150 150 IDD2PS1 VDD1 400 400 IDD2PS2 VDD2 1000 1000 IDD2PS,in IDD2P1 VDDCA + VDDQ 150 150 IDD2N1 VDD1 4 4 IDD2N2 VDD2 20 20 IDD2N,in VDDCA + VDDQ 20 20 A mA IDD2NS1 VDD1 1.4 1.4 IDD2NS2 VDD2 5 5 IDD2NS,in VDDCA + VDDQ 12 12 VDD1 1500 1500 A IDD3P1 mA IDD3P2 VDD2 8 8 mA IDD3P,in VDDCA + VDDQ 480 480 A IDD3PS1 VDD1 1500 1500 A IDD3PS2 VDD2 8 8 mA IDD3PS,in VDDCA + VDDQ 480 480 A IDD3N1 VDD1 1.4 1.4 mA IDD3N2 VDD2 27 27 IDD3N,in VDDCA + VDDQ 20 20 IDD3NS1 VDD1 1.4 1.4 IDD3NS2 VDD2 5 5 IDD3NS,in VDDCA + VDDQ 12 12 VDD1 4 4 IDD4R2 VDD2 250 250 IDD4R,in VDDCA 20 20 IDD4W1 VDD1 4 4 IDD4W2 VDD2 180 180 IDD4W,in IDD4R1 VDDCA + VDDQ 60 60 IDD51 VDD1 44 44 IDD52 VDD2 120 120 IDD5,in VDDCA + VDDQ 20 20 IDD5AB1 VDD1 2.4 2.4 IDD5AB2 VDD2 24 24 IDD5AB,in VDDCA + VDDQ 20 20 PDF: 09005aef86530df3 u67m_512mb_faat_mobile_lpddr2.pdf - Rev. B 11/15 EN 7 mA mA mA mA mA Micron Technology, Inc. reserves the right to change products or specifications without notice. (c) 2015 Micron Technology, Inc. All rights reserved. Automotive Mobile LPDDR2 SDRAM FAAT Addendum IDD Specifications Table 5: 32 Meg x 32 IDD Specifications (Continued) VDD2, VDDQ, VDDCA = 1.14-1.30V; VDD1 = 1.70-1.95V Speed Grade Parameter Supply -25 -3 Unit VDD1 1000 1000 A IDD62 VDD2 4000 4000 IDD6,in VDDCA + VDDQ 100 100 IDD81 VDD1 50 50 IDD82 VDD2 120 120 IDD8,in VDDCA + VDDQ 50 50 IDD61 A Table 6: 32 Meg x 16 IDD6 Partial-Array Self Refresh Current VDD2, VDDQ, VDDCA = 1.14-1.30V; VDD1 = 1.70-1.95V PASR Supply Full array 1/2 array 1/4 array PDF: 09005aef86530df3 u67m_512mb_faat_mobile_lpddr2.pdf - Rev. B 11/15 EN Value Unit VDD1 500 A VDD2 2000 VDDi 50 VDD1 300 VDD2 1200 VDDi 50 VDD1 250 VDD2 800 VDDi 50 8 Micron Technology, Inc. reserves the right to change products or specifications without notice. (c) 2015 Micron Technology, Inc. All rights reserved. Automotive Mobile LPDDR2 SDRAM FAAT Addendum IDD Specifications Figure 2: 32 Meg x 16 IDD61 Typical Self Refresh Current vs. Temperature 300 Full Half Quarter 250 IDD61 (A) 200 150 100 50 0 -20 -15 -10 -5 0 5 10 15 20 25 30 35 40 45 50 55 60 65 70 75 80 85 90 95 100 105 110 Temperature (C) Table 7: 32 Meg x 32 DDP IDD6 Partial-Array Self Refresh Current VDD2, VDDQ, VDDCA = 1.14-1.30V; VDD1 = 1.70-1.95V PASR Supply Full array 1/2 array 1/4 array PDF: 09005aef86530df3 u67m_512mb_faat_mobile_lpddr2.pdf - Rev. B 11/15 EN Value Unit VDD1 1000 A VDD2 4000 VDDi 100 VDD1 600 VDD2 2400 VDDi 100 VDD1 500 VDD2 1600 VDDi 100 9 Micron Technology, Inc. reserves the right to change products or specifications without notice. (c) 2015 Micron Technology, Inc. All rights reserved. Automotive Mobile LPDDR2 SDRAM FAAT Addendum Revision History Revision History Rev. B - 11/15 * Production release Rev. A - 06/15 * Initial release 8000 S. Federal Way, P.O. Box 6, Boise, ID 83707-0006, Tel: 208-368-4000 www.micron.com/products/support Sales inquiries: 800-932-4992 Micron and the Micron logo are trademarks of Micron Technology, Inc. All other trademarks are the property of their respective owners. This data sheet contains minimum and maximum limits specified over the power supply and temperature range set forth herein. Although considered final, these specifications are subject to change, as further product development and data characterization sometimes occur. PDF: 09005aef86530df3 u67m_512mb_faat_mobile_lpddr2.pdf - Rev. B 11/15 EN 10 Micron Technology, Inc. reserves the right to change products or specifications without notice. (c) 2015 Micron Technology, Inc. All rights reserved.