ESD9L3.3ST5G - ON Semiconductor - Datasheet.Directory

November, 2011 − Rev. 4

1Publication Order Number:

ESD9L/D

ESD9L

Transient Voltage

Suppressors

ESD Protection Diodes with Ultra−Low

Capacitance

The ESD9L is designed to protect voltage sensitive components that

require ultra−low capacitance from ESD and transient voltage events.

Excellent clamping capability, low capacitance, low leakage, and fast

response time, make these parts ideal for ESD protection on designs

where board space is at a premium. Because of its low capacitance, it is

suited for use in high frequency designs such as USB 2.0 high speed and

antenna line applications.

Specification Features:

•Ultra Low Capacitance 0.5 pF

•Low Clamping Voltage

•Small Body Outline Dimensions:

0.039″ x 0.024″(1.00 mm x 0.60 mm)

•Low Body Height: 0.016″ (0.4 mm)

•Stand−off Voltage: 3.3 V, 5 V

•Low Leakage

•Response Time is Typically < 1.0 ns

•IEC61000−4−2 Level 4 ESD Protection

•This is a Pb−Free Device

Mechanical Characteristics:

CASE: Void-free, transfer-molded, thermosetting plastic

Epoxy Meets UL 94 V−0

LEAD FINISH: 100% Matte Sn (Tin)

MOUNTING POSITION: Any

QUALIFIED MAX REFLOW TEMPERATURE: 260°C

Device Meets MSL 1 Requirements

MAXIMUM RATINGS

Rating Symbol Value Unit

IEC 61000−4−2 (ESD) Contact

Air

±10

±15

Total Power Dissipation on FR−5 Board

(Note 1) @ TA = 25°C

°PD°150 mW

Storage Temperature Range Tstg −55 to +150 °C

Junction Temperature Range TJ−55 to +150 °C

Lead Solder Temperature − Maximum

(10 Second Duration)

TL260 °C

Stresses exceeding Maximum Ratings may damage the device. Maximum

Ratings are stress ratings only. Functional operation above the Recommended

Operating Conditions is not implied. Extended exposure to stresses above the

Recommended Operating Conditions may affect device reliability.

1. FR−5 = 1.0 x 0.75 x 0.62 in.

See Application Note AND8308/D for further description of survivability specs.

Device Package Shipping†

ORDERING INFORMATION

SOD−923

CASE 514AB

ESD9L3.3ST5G SOD−923

(Pb−Free)

8000/Tape & Reel

MARKING DIAGRAM

See specific marking information in the device marking

column of the Electrical Characteristics tables starting on

page 2 of this data sheet.

DEVICE MARKING INFORMATION

†For information on tape and reel specifications,

including part orientation and tape sizes, please

refer to our Tape and Reel Packaging Specifications

Brochure, BRD8011/D.

X = 6 (ESD9L3.3ST5G) or

= D (ESD9L5.0ST5G)

M = Date Code

http://onsemi.com

X M

*Date Code orientation and/or position may

vary depending upon manufacturing location.

PIN 1. CATHODE

2. ANODE

ESD9L5.0ST5G SOD−923

(Pb−Free)

8000/Tape & Reel

ESD9L

http://onsemi.com

ELECTRICAL CHARACTERISTICS

(TA = 25°C unless otherwise noted)

Symbol Parameter

IPP Maximum Reverse Peak Pulse Current

VCClamping Voltage @ IPP

VRWM Working Peak Reverse Voltage

IRMaximum Reverse Leakage Current @ VRWM

VBR Breakdown Voltage @ IT

ITTest Current

IFForward Current

VFForward Voltage @ IF

Ppk Peak Power Dissipation

CMax. Capacitance @ VR = 0 and f = 1.0 MHz

*See Application Note AND8308/D for detailed explanations of

datasheet parameters.

Uni−Directional TVS

IPP

VRWM

VCVBR

ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted, VF = 1.0 V Max. @ IF = 10 mA for all types)

Device

Marking

VRWM

(V)

IR (mA)

@ VRWM

VBR (V) @ IT

(Note 2) ITC (pF)

VC (V)

@ IPP = 1 A VC

Max Max Min mA Typ Max Max

Per IEC61000−4−2

(Note 4)

ESD9L3.3ST5G 6* 3.3 1.0 4.8 1.0 0.5 0.9 9.0 Figures 1 and 2

See Below

ESD9L5.0ST5G D 5.0 1.0 5.4 1.0 0.5 0.9 9.8 Figures 1 and 2

See Below

*Rotated 180°.

2. VBR is measured with a pulse test current IT at an ambient temperature of 25°C.

3. Surge current waveform per Figure 5.

4. For test procedure see Figures 3 and 4 and Application Note AND8307/D.

Figure 1. ESD Clamping Voltage Screenshot

Positive 8 kV Contact per IEC61000−4−2

Figure 2. ESD Clamping Voltage Screenshot

Negative 8 kV Contact per IEC61000−4−2

ESD9L

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IEC 61000−4−2 Spec.

Level

Test

Voltage

(kV)

First Peak

Current

(A)

Current at

30 ns (A)

Current at

60 ns (A)

1 2 7.5 4 2

2 4 15 8 4

3 6 22.5 12 6

4 8 30 16 8

Ipeak

90%

10%

IEC61000−4−2 Waveform

100%

I @ 30 ns

I @ 60 ns

tP = 0.7 ns to 1 ns

Figure 3. IEC61000−4−2 Spec

Figure 4. Diagram of ESD Test Setup

50 W

Cable

TVS Oscilloscope

ESD Gun

The following is taken from Application Note

AND8308/D − Interpretation of Datasheet Parameters

for ESD Devices.

ESD Voltage Clamping

For sensitive circuit elements it is important to limit the

voltage that an IC will be exposed to during an ESD event

to as low a voltage as possible. The ESD clamping voltage

is the voltage drop across the ESD protection diode during

an ESD event per the IEC61000−4−2 waveform. Since the

IEC61000−4−2 was written as a pass/fail spec for larger

systems such as cell phones or laptop computers it is not

clearly defined in the spec how to specify a clamping voltage

at the device level. ON Semiconductor has developed a way

to examine the entire voltage waveform across the ESD

protection diode over the time domain of an ESD pulse in the

form of an oscilloscope screenshot, which can be found on

the datasheets for all ESD protection diodes. For more

information on how ON Semiconductor creates these

screenshots and how to interpret them please refer to

AND8307/D.

Figure 5. 8 X 20 ms Pulse Waveform

100

0020406080

t, TIME (ms)

% OF PEAK PULSE CURRENT

PULSE WIDTH (tP) IS DEFINED

AS THAT POINT WHERE THE

PEAK CURRENT DECAY = 8 ms

PEAK VALUE IRSM @ 8 ms

HALF VALUE IRSM/2 @ 20 ms

ESD9L

http://onsemi.com

PACKAGE DIMENSIONS

SOD−923

CASE 514AB−01

ISSUE B

0.40

0.30

0.90

DIMENSIONS: MILLIMETERS

*For additional information on our Pb−Free strategy and soldering

details, please download the ON Semiconductor Soldering and

Mounting Techniques Reference Manual, SOLDERRM/D.

SOLDERING FOOTPRINT*

NOTES:

1. DIMENSIONING AND TOLERANCING PER ANSI

Y14.5M, 1982.

2. CONTROLLING DIMENSION: MILLIMETERS.

3. MAXIMUM LEAD THICKNESS INCLUDES LEAD

FINISH THICKNESS. MINIMUM LEAD

THICKNESS IS THE MINIMUM THICKNESS OF

BASE MATERIAL.

DIM MIN NOM MAX

MILLIMETERS

A0.34 0.37 0.40

b0.15 0.20 0.25

c0.07 0.12 0.17

D0.75 0.80 0.85

E0.55 0.60 0.65

0.95 1.00 1.05

L0.05 0.10 0.15

0.013 0.015 0.016

0.006 0.008 0.010

0.003 0.005 0.007

0.030 0.031 0.033

0.022 0.024 0.026

0.037 0.039 0.041

0.002 0.004 0.006

MIN NOM MAX

INCHES

−Y−

−X−

0.08 (0.0032) XY

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ESD9L/D

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