FSUSB30 Low-Power, Two-Port, High-Speed USB 2.0 (480Mbps) Switch
© 2006 Fairchild Semiconductor Corporation www.fairchildsemi.com
FSUSB30 Rev. 1.1.7
February 2012
Click to see this datasheet
in Simplified Chinese!
FSUSB30
Low-Power, Two-Port, High-Speed USB 2.0 (480Mbps)
Switch
Features
?Low On Capacitance: 3.7pF (Typical)
?Low On Resistance: 6.5 (Typical)
?Low Power Consumption: 1µA (Maximum)
10µA Maximum ICCT over an Expanded Control
Voltage Range (VIN = 2.6V, VCC = 4.3V)
?Wide -3dB Bandwidth, >720MHz
?8KV ESD Protection
?Power-Of f Pr otect ion whe n V CC = 0V ; D+/D- Pins can
Tolerate up to 5.5V
?Packaged in:
10-lead MicroPak™ (1.6 x 2.1mm)
14-lead DQFN
10-lead MSOP
10-lead UMLP (1.4 x 1.8mm)
Applications
?Cell phone, PDA, Digital Camera, and Notebook LCD
Monitor, TV, and Set-top Box
Related Application Notes
?AN-6022 Using the FSUSB30 / FSUSB31 to Comply
with USB 2.0 Fault Condition Requirements
Description
The FSUSB30 is a low-power, two-port, high-speed USB
2.0 switch. Configured as a double-pole double-throw
(DPDT) switch, it is optimized for switching between two
high-speed (480Mbps) sources or a Hi-Speed and Full-
Speed (12Mbps) source. The FSUSB30 is compatible
with the requirements of USB2.0 and features an
extremely low on capacitance (CON) of 3.7pF. The wide
bandwidth of this device (720MHz), exceeds the band-
width needed to pass the third harmonic, resulting in sig-
nals with minimum edge and phase distortion. Superior
channel-to-channel crosstalk minimizes interference.
The FSUSB30 contains special circuitry on the D+/D-
pins which allows the device to withstand an overvoltage
condition when powered off. This device is also designed
to minimize current consumption even when the control
voltage applied to the S pin, is lower than the supply volt-
age (VCC). This feature is especially valuable to ultra-
portable applications such as cell phones, allowing for
direct interface with the general purpose I/Os of the
baseband processor. Other applications include switch-
ing and connector sharing in portable cell phones, PDAs,
digital cameras, printers, and notebook computers.
Ordering Information
Figure 1. Typical Application
MicroPak is a trademark of Fairchild Semiconductor Corporation.
Order
Number Package
Number Product Code
Top Mark Package Description
FSUSB30L10X MAC010A FJ 10-Lead MicroPak, 1.6 x 2.1mm
FSUSB30BQX MLP014A USB30 14-Terminal Depopulated Quad Very-Thin Flat Pack
No Leads (DQFN), JEDEC MO-241, 2.5 x 3.0mm
FSUSB30MUX MUA10A FSUSB30 10-Lead Molded Small Outline Package (MSOP), JEDEC MO-
187, 3.0mm Wide
FSUSB30UMX MLP010A GJ 10-Lead, Quad, Ultrathin, MLP (UMLP) 1.4 x 1.8mm
USB2.0
Controller
Set Top Box
(STB) CPU
or
DSP
Processor DVR or
Mass Storage
Controller
1D+ VCC
1D–
2D+
2D–
USB
Connector
FSUSB30
D+
D–
SOE
Control
© 2006 Fairchild Semiconductor Corpo ration www.fairchildsemi.com
FSUSB30 Low-Power, Two-Port, High-Speed USB 2.0 (480Mbps) Switch
FSUSB30 Rev. 1.1.6 2
Connection Diagrams Analog Symbol
Pin Descriptions
Truth Table
Pin Name Description
OE Bus Switch Enable
S Select Input
D+, D, HSDn+, HSDnDat a Po rts
NC No Connect
SOE Function
X HIGH Disconnect
LOW LOW D+, D = HSD1n
HIGH LOW D+, D = HSD2n
HSD1+
HSD2+
D+
S
OE Control
HSD1–
HSD2–
D–
9
Pad Assignments for MicroPak
(Top View)
Pad Assignments for DQFN
(Top Through View)
Pin Assignment for MSOP
(Top Through View)
(Top Through View)
876
510
2
14
VCC
VCC
VCC
13 OE
134
1
87
NC
NCGND
GND
12 HSD1–
11 NC
10 HSD2–
9
2
3
4
5
6D–
S
HSD1+
NC
HSD2+
D+
S
HSD1+
HSD2+
D+
S
HSD1+
GND
HSD2+
D+
OE
HSD1–
HSD2–
D–
Pad Assignments for µMLP
OE
HSD1–
HSD2–
D–
10
9
8
7
6
1
2
3
4
5
VCC
Sel 12
76
3
4
5
10
9
8
GND
HSD1+
HSD2+
D+
HSD1–
HSD2–
OE D–
© 2006 Fairchild Semiconductor Corpo ration www.fairchildsemi.com
FSUSB30 Low-Power, Two-Port, High-Speed USB 2.0 (480Mbps) Switch
FSUSB30 Rev. 1.1.6 3
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be opera-
ble above the recommended operating conditions and stressing the parts to these levels is not recommended. In addi-
tion, extended exposure to stresse s ab ove the recommended operating conditions may affect device reliability. The
absolute maximum ratings are stress ratings only.
Note:
1. The input and output negative voltage ratings may be exceeded if the inp ut and outpu t diode current ratings are
observed.
Recommended Operating Conditions
The Recommended Operating Conditio ns table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to absolute maximum ratings.(2)
Note:
2. Control input must be held HIGH or LOW and it must not float.
Symbol Parameter Minimum Maximum Unit
VCC Supply Voltage -0.5 +5.5 V
VCNTRL DC Input Voltage(1) -0.5 VCC V
VSW DC Switch Voltage(1) HSDnX 0.5 VCC V
D+,D- when VCC > 0 0.5 VCC V
D+,D- when VCC = 0 -0.50 VCC V
IIK DC Input Diode Current -50 mA
IOUT DC Output Current 50 mA
TSTG Storage Temperature -65 +150 °C
ESD Human Body Model All Pins 8 kV
I/O to GND 8 kV
Symbol Parameter Minimum Maximum Unit
VCC Supply Voltage 3.0 4.3 V
VIN Control Input Voltage 0 VCC V
VSW Switch Input Voltage 0 VCC V
TAOperating Temperature -40 +85 °C
JAThermal Resistance, 10 MicroPak 250 °C/W
© 2006 Fairchild Semiconductor Corpo ration www.fairchildsemi.com
FSUSB30 Low-Power, Two-Port, High-Speed USB 2.0 (480Mbps) Switch
FSUSB30 Rev. 1.1.6 4
DC Electrical Characteristics
All typical values are at 25°C unless otherwise specified.
Notes:
3. Measured by the voltage drop between Dn, HSD1n, HSD2n pins at the indicated current throug h the switch.
On resistance is determined by the lower of the voltage on the two ports.
4.Guaranteed by characterization.
AC Electrical Characteristics
All typical values are for VCC = 3.3V at 25°C unless otherwise specified.
Symbol Parameter Conditions VCC (V) TA = 40°C to +85°C Unit
Min. Typ. Max.
VIK Clamp Diode Voltage IIN = -18mA 3.0 -1.2 V
VIH Input Voltage HIGH 3.0 to 3.6 1.3 V
4.3 1.7 V
VIL Input Voltage LOW 3.0 to 3.6 0.5 V
4.3 0.7 V
IIN Control Input Leakage VSW = 0.0V to VCC 4.3 -1.0 1.0 µA
IOZ OFF State Leakage 0 Dn, HSD1n, HSD2n VCC 4.3 -2.0 2.0 µA
IOFF Power OFF Leakage
Current (D+, D–) VSW = 0V to 4.3V, VCC = 0V 0 -2.0 2.0 µA
RON Switch On Resistance(3) VSW = 0.4V, ION = -8mA 3.0 6.5 10.0
VSW = 0V, IO = 30mA at 25°C 3.6 7.0
RON Delta RON(4) VSW = 0.4V, ION = -8mA 3.0 0.35
RON Flatness RON Flatness(3) VSW = 0.0V - 1.0V,
ION = -8mA 3.0 2.0
ICC Quiescent Supply Current VCNTRL = 0.0V or VCC,
IOUT = 0 4.3 1.0 µA
ICCT Increase in ICC Current
per Control Voltage VCNTRL (control input) = 2.6V 4.3 10.0 µA
Symbol Parameter Conditions VCC (V) TA = 40°C to +85°C Unit Figure
Number
Min. Typ. Max.
tON Turn-On Ti me S,
OE to Output HD1n, HD2n = 0.8V,
RL = 50, CL = 5pF 3.0 to 3.6 13 30 ns Figure 9
tOFF Turn-Off Time S,
OE to Output HD1n, HD2n = 0.8V,
RL = 50, CL = 5pF 3.0 to 3.6 12 25 ns Figure 9
tPD Propagation Delay(4) RL = 50, CL = 5pF 3.3 0.25 ns Figure 7
Figure 8
tBBM Break-Before-Make RL = 50, CL = 5pF,
VIN = 0.8V 3.0 to 3.6 2.0 6.5 ns Figure 10
OIRR Off Isolation
(Non-Adjacent) f = 240MHz, RT = 503.0 to 3.6 -30 dB Figure 13
Xtalk Non-Adjacent Channel
Crosstalk RT = 50, f = 240MHz 3.0 to 3.6 -45 dB Figure 14
BW 3dB Bandwidth RT = 50, CL = 0pF 3.0 to 3.6 720 MH z Figure 12
RT = 50, CL = 5pF 550
© 2006 Fairchild Semiconductor Corpo ration www.fairchildsemi.com
FSUSB30 Low-Power, Two-Port, High-Speed USB 2.0 (480Mbps) Switch
FSUSB30 Rev. 1.1.6 5
USB Hi-Speed Related AC Electrical Characteristics
Note:
5. Guaranteed by characterization.
Capacitance
Symbol Parameter Conditions VCC (V) TA = 40°C to +85°C Units Figure
Number
Min. Typ. Max.
tSK(O) Channel-to-Channel
Skew(5) RL = 50, CL = 5pF 3.0 to 3.6 50 ps Figure 7
Figure 11
tSK(P)
Skew of Opposite
Transitions of the
Same Output(5) RL = 50, CL = 5pF 3 .0 to 3.6 20 ps Figure 7
Figure 11
tJTotal Jitter(5) RL = 50, CL = 5pF,
tR = tF = 500ps at 480 Mbps
(PRBS = 215 1) 3.0 to 3.6 200 ps
Symbol Parameter Conditions TA = 40°C to +85°C Units Figure
Number
Min. Typ. Max.
CIN Control Pin Input Capacita nce VCC = 0V 1.5 pF Figure 16
CON D1n, D2n, Dn On Capacitance VCC = 3.3, OE = 0V 3.7 pF Figure 15
COFF D1n, D2n Off Capacitance VCC and OE = 3.3 2.5 pF Figure 16
© 2006 Fairchild Semiconductor Corpo ration www.fairchildsemi.com
FSUSB30 Low-Power, Two-Port, High-Speed USB 2.0 (480Mbps) Switch
FSUSB30 Rev. 1.1.6 6
Typical Characteristics
Figure 2. Gain vs. Frequenc y
Figure 3. Off Isolation
Figure 4. Crosstalk
Frequency Response
-8
-7
-6
-5
-4
-3
-2
-1
0
1 10 100 1000 10000
Frequency (MHz)
Gain (dB)
C
L = 0pF, VCC = 3.3V
Frequency (MHz)
Frequency Response
-120
-110
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
0
1 10 100 1000
Off Isolation (dB)
Frequency (MHz)
Frequency Response
1 10 100 1000
V
CC
= 3.3V
-120
-110
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
0
Crosstalk (dB)
© 2006 Fairchild Semiconductor Corpo ration www.fairchildsemi.com
FSUSB30 Low-Power, Two-Port, High-Speed USB 2.0 (480Mbps) Switch
FSUSB30 Rev. 1.1.6 7
Test Diagrams
Figure 5. On Resistance Figure 6. Off Leakage
Figure 7. AC Test Circuit Load Figure 8. Switch Propagation Delay Waveforms
Figure 9. Turn-On / Turn-Off Waveform
HSDn
I
ON
V
ON
GND
GND
V
IN
Dn
Select
V
S
= 0 to V
CC
R
ON
= V
ON
/ I
ON
GND
V
IN
Select
ID
n(OFF)
V
S
= 0 or V
CC
NC
A
Each switch port is tested separately.
RL
RS
CL
HSDn
VIN
VSel
D+, D–
GND
GND
GND
VOUT
RL, RS, and CL are functions of the application environment
(see AC Electrical tables for specific values).
CL includes test fixture and stray capacitance.
t
RISE
= 500ps
t
PLH
HSDn+,
HSDn–
Input:
Output: D+, D–
t
FALL
= 500ps
V
OH
90%
50% 50%
90%
10% 10%
50%
t
PHL
50%
V
OL
800mV
400mV
tRISE = 2.5ns
tON tOFF
Input – S, OE
Output – VOUT
tFALL = 2.5ns
VOH
90%
VCC/2 VCC/2
90%
10% 10%
90%90%
VOL
VCC
GND
© 2006 Fairchild Semiconductor Corpo ration www.fairchildsemi.com
FSUSB30 Low-Power, Two-Port, High-Speed USB 2.0 (480Mbps) Switch
FSUSB30 Rev. 1.1.6 8
Figure 10. Break-Before -Make (tBBM)
Figure 11. Switch Skew Tests
Figure 12. Bandwidth
t
D
t
R
= t
F
= 2.5ns (10–90%)
R
L
S
C
L
*
HSDn
HSDn
V
O
Control
Input
D+, D–
GND
Control
Input
50%
V
CC
0V
V
OUT
V
OUT
V
CC
V
CC
0.9 x V
OUT
*C
L
includes test fixture and stray capacitance.
t
RISE
= 500ps
t
PLH
t
PHL
Input:
Output: D+, D–
HSDn+
HSDn–
t
FALL
= 500ps
V
OH
90% 90%
50% 50%
10% 10%
50%
50%
V
OL
800mV
T
SK(P)
= |
t
PHL
t
PLH
|
Pulse Skew, T
SK(P)
400mV
t
RISE
= 500ps
t
PLH1
t
PHL1
Output1:
Input: D+, D–
Output1: D2+, D2–
HSD1+
HSD1–
t
FALL
= 500ps
V
OH
90% 90%
50% 50%
10% 10%
50%
50%
V
OL
800mV
T
SK(O)
= |
t
PLH1
t
PLH2
| or |
t
PHL1
t
PHL2
|
Output Skew, T
SK(OUT)
400mV
t
PLH2
t
PHL2
V
OH
50%
50%
V
OL
R
S
V
IN
FSUSB30
GND
VSel
Network Analyzer
V
OUT
GND V
S
GND R
T
GND
GND
R
S
and R
T
are functions of the application environment
(See AC Electrical Tables for specific values).
© 2006 Fairchild Semiconductor Corpo ration www.fairchildsemi.com
FSUSB30 Low-Power, Two-Port, High-Speed USB 2.0 (480Mbps) Switch
FSUSB30 Rev. 1.1.6 9
Figure 13. Channel Off Isolation
Figure 14. Non-Adjacent Channel-to-Channel Crosstalk
Figure 15. Channel On Capacitance Figure 16. Channel Off Capacitance
R
T
R
S
V
IN
FSUSB30
GND
VSel
Network Analyzer
V
OUT
GND V
S
GND
GND
OFF-Isolation = 20 Log (V
OUT
/
V
IN
)
R
T
GND
GND
FSUSB30
S
Dn
Capacitance
Meter
f = 240MHz
VSel = 0 or VCC
D1n, D2n
FSUSB30
S
Dn
Capacitance
Meter
f = 240MHz VSel = 0 or VCC
D1n, D2n
© 2006 Fairchild Semiconductor Corpo ration www.fairchildsemi.com
FSUSB30 Low-Power, Two-Port, High-Speed USB 2.0 (480Mbps) Switch
FSUSB30 Rev. 1.1.6 10
Application Guidance: Meeting USB 2.0 Vbus Short Requirements
In section 7. 1.1 of the USB 2.0 specification, it notes th at
USB devices must be able to withstand a Vbus short to
D+ or D- when the USB devices is either powered off or
powered on. The FSUSB3 0 can be successfully config-
ured to meet both these requirements.
Power-Off Protection
For a Vbus short circuit, the switch is expected to with-
stand such a condition for at least 24 hours. The
FSUSB30 has specially designed circuitry which pre-
vents unintended signal bleed through as well as guar-
anteed system reliability during a power-down, over-
voltage condition. The protection has been added to the
common pins (D+, D-).
Power-On Protection
The USB 2.0 specification also notes that the USB
device should be capable of withstanding a Vbus short
during transmission of data. Fairchi ld recomme nds add-
ing a 100 series resister between the switch VCC pin
and supply rail to protect against this case. This modifi-
cation works by limiting current flow back into the VCC
rail during the over-voltage event so current remains
within the safe operating range. In this application, the
switch passes the full 5.25V input signal through to the
selected output, while maintaining specified off isolation
on the un-sel e cted pins.
D+ = 5.25V
VC C = 3.6 V
100 Oh ms
FSUSB30
D- = 5.25V
HSD+
HSD+
HSD-
HSD-
Figure 17. Adding 100 resistor in series with the VCC supply allows the FSUSB30 to withstand a
Vbus short when powered up
For more information, see Applications Note AN-6022 Using the FSUSB30 to Comply with USB 2.0 Fault
Condition Requirements at www.fairchildsemi.com
© 2006 Fairchild Semiconductor Corpo ration www.fairchildsemi.com
FSUSB30 Low-Power, Two-Port, High-Speed USB 2.0 (480Mbps) Switch
FSUSB30 Rev. 1.1.6 11
Tape and Reel Specifications
Ta pe Fo rma t fo r DQ FN
Tape Dimensions
Dimenions are in millimeters unless otherwise specified.
Package
Designator Tape
Section Number
Cavities Cavity
Status Cover Tape
Status
BQX Leader (Start End) 125 (typ) Empty Sealed
Carrier 2500/3000 Filled Sealed
Tr ailer (Hub End) 75 (typ) Empty Sealed
© 2006 Fairchild Semiconductor Corpo ration www.fairchildsemi.com
FSUSB30 Low-Power, Two-Port, High-Speed USB 2.0 (480Mbps) Switch
FSUSB30 Rev. 1.1.6 12
Reel Dimensions for DQFN
Dimensions are in inches (millimeters) unless otherwise specified.
Tape SizeABCDNW1W2
(12mm) 13.0
(330) 0.059
(1.50) 0.512
(13.00) 0.795
(20.20) 7.008
(178) 0.488
(12.4) 0.724
(18.4)
© 2006 Fairchild Semiconductor Corporation www.fairchildsemi.com
FSUSB30 Low-Power, Two-Port, High-Speed USB 2.0 (480Mbps) Switch
FSUSB30 Rev. 1.1.7 13
Tape Dimensions for MSOP
Dimensions are in inches (millimeters) unless otherwise specified.
Reel Dimensions for MSOP
Dimensions are in inches (millimeters) unle ss otherwise specified
Tape SizeABCDNW1W2W3
(12mm) 13
(330) 0.059
(1.5) 0.512
(13) 0.795
(20.2) 7.008
(178) 0.448
(12.4) 0.724
(18.4) 0.468-0.606
(11.9 -15.4)
© 2006 Fairchild Semiconductor Corporation www.fairchildsemi.com
FSUSB30 Low-Power, Two-Port, High-Speed USB 2.0 (480Mbps) Switch
FSUSB30 Rev. 1.1.7 14
Physical Dimensions
Figure 17. 10-Lead MicroPak, 1.6 x 2.1mm
For tape and reel specifications, visit Fairchild’s website: http://www.fairchildsemi.com/products/logic/pdf/micropak_tr.pdf.
Package drawings are provided as a service to customers consider ing Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the draw ing and contact a Fairchild Semicond uctor r epresentative to ver ify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specif-
ically the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/.
BOTTOM VIEW
TOP VIEW
RECOMMENDED LAND PATTERN
SIDE VIEW
2X
2X
NOTES:
A. PACKAGE CONFORMS TO JEDEC
REGISTRATION MO-255, VARIATION UABD .
B. DIMENSIONS ARE IN MILLIMETERS.
C. DIMENSIONS AND TOLERANCES PER
ASME Y14.5M, 1994.
D. PRESENCE OF CENTER PAD IS PACKAGE
SUPPLIER DEPENDENT. IF PRESENT IT
IS NOT INTENDED TO BE SOLDERED AND
HAS A BLACK OXIDE FINISH.
E. DRAWING FILENAME: MKT-MAC10Arev5.
0.10 C
0.10 C
0.10 CAB
0.05 C
PIN1 IDENT IS
2X LONGER THAN
OTHER LINES
A
B
C
0.35
0.25
9X
9X
14
96
0.25
0.15
10 5
0.50
0.56
1.62
0.05
0.00
0.05 C
0.55 MAX
0.05 C
1.60
2.10
(0.35)
(0.25)
0.50 10X
10X
(0.11)
1.12
1.62 KEEPOUT ZONE, NO TRACES
OR VIAS ALLO WED
(0.20)
(0.15) 0.35
0.25
0.35
0.25
DETAIL A
DETAIL A 2X SCALE
0.35
0.25
0.65
0.55
D
ALL FEATURES
(0.36)
(0.29)
0.56
© 2006 Fairchild Semiconductor Corpo ration www.fairchildsemi.com
FSUSB30 Low-Power, Two-Port, High-Speed USB 2.0 (480Mbps) Switch
FSUSB30 Rev. 1.1.6 15
Physical Dimensions
Figure 18. 14-Terminal De-populated Qu ad Very-Thin Flat Pack No Leads (DQFN), JEDEC MO-241, 2.5 x 3.0mm
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner with-
out notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor rep resentative to verify or obtain
the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the
warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/.
© 2006 Fairchild Semiconductor Corpo ration www.fairchildsemi.com
FSUSB30 Low-Power, Two-Port, High-Speed USB 2.0 (480Mbps) Switch
FSUSB30 Rev. 1.1.6 16
Physical Dimensions
Figure 19. 10 -Lead Molded Small Outline Package (MSOP), JEDEC MO-187, 3.0mm Wide
Package drawings are provided as a service to customers consider ing Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the draw ing and contact a Fairchild Semicond uctor r epresentative to ver ify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specif-
ically the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/.
© 2006 Fairchild Semiconductor Corporation www.fairchildsemi.com
FSUSB30 Low-Power, Two-Port, High-Speed USB 2.0 (480Mbps) Switch
FSUSB30 Rev. 1.1.7 17
Physical Dimensions
Figure 20. 10-Lead, Quad, Ultrathin Molded Leadless Package (UMLP), 1.4 x 1.8mm
Package drawings are provided as a service to customers consider ing Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the draw ing and contact a Fairchild Semicond uctor r epresentative to ver ify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specif-
ically the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/.
AB
C
SEATING
PLANE
DETAIL A
PIN#1 IDENT
RECOMMENDED
LAND PATTERN
NOTES:
A. PACKAGE DOES NOT FULLY CONFORM TO
JEDEC STANDARD.
B. DIMENSIONS ARE IN MILLIMETERS.
C. DIMENSIONS AND TOLERANCES PER
ASME Y14.5M, 1994.
D. LAND PATTERN RECOMMENDATION IS
BASED ON FSC DESIGN ONLY.
E. DRAWING FILENAME: MKT-UMLP10Arev3.
TOP VIEW
BOTTOM VIEW
0.15 C
0.08 C
0.15 C
2X
2X
SIDE VIEW
0.10 C
0.05
3
6
1
0.10 C A B
0.05 C
0.55 MAX.
10
1.40
1.80
0.40
0.15
0.25(10X)
0.35
0.45(9X)
1.70
2.10
0.40
0.663 0.563
(9X)
0.225
(10X)
1
0.152
0.10
0.10
0.55
0.45
0.10
DETAIL A
SCALE : 2X
1.85
1.45
0.55
0.40
0.225
(10X)
9X
0.45
PIN#1 IDENT
OPTIONAL MINIMIAL
TOE LAND PATTERN
SCALE : 2X
LEAD
OPTION 1 SCALE : 2X
LEAD
OPTION 2
PACKAGE
EDGE
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FSUSB30 Low-Power, Two-Port, High-Speed USB 2.0 (480Mbps) Switch
FSUSB30 Rev. 1.1.7 18