PIN CONFIGURATIONS OUT A 1 PIN 1 INDICATOR 8 V+ -IN A 2 ADA4610-2 7 OUT B +IN A 3 TOP VIEW (Not to Scale) 6 -IN B V- 4 5 +IN B NOTES 1. THE EXPOSED PAD MUST BE CONNECTED TO V-. Figure 1. ADA4610-2, 8-Lead LFCSP (CP Suffix) 8 V+ ADA4610-2 7 TOP VIEW (Not to Scale) OUT B 6 -IN B 5 +IN B OUT A 1 -IN A 2 +IN A 3 V- 4 09646-002 Low offset voltage B grade: 0.4 mV maximum (ADA4610-2 only) A grade: 1 mV maximum Low offset voltage drift B grade: 4 V/C maximum (ADA4610-2 only) A grade: 8 V/C maximum Low input bias current: 5 pA typical Dual-supply operation: 5 V to 15 V Low voltage noise: 0.45 V p-p at 0.1 Hz to 10 Hz Voltage noise density: 7.3 nV/Hz at f = 1 kHz Low distortion (THD + noise): 0.00006% No phase reversal Rail-to-rail output Unity-gain stable 09646-001 FEATURES Figure 2. ADA4610-2, 8-Lead SOIC_N (R Suffix) and 8-Lead MSOP (RM Suffix) OUT A 1 APPLICATIONS 14 OUT D -IN A 2 +IN A 3 Instrumentation Medical instruments Multipole filters Precision current measurement Photodiode amplifiers Sensors Audio V+ 4 +IN B 5 13 -IN D ADA4610-4 TOP VIEW (Not to Scale) 12 +IN D 11 V- 10 +IN C -IN B 6 9 -IN C OUT B 7 8 OUT C 09646-103 Data Sheet Low Noise, Precision, Rail-to-Rail Output, JFET Dual/Quad Operational Amplifiers ADA4610-2/ADA4610-4 Figure 3. ADA4610-4, 14-Lead SOIC _N (R Suffix) GENERAL DESCRIPTION The ADA4610-2/ADA4610-4 are precision JFET amplifiers that feature low input noise voltage, current noise, offset voltage, input bias current, and rail-to-rail output. The ADA4610-2/ ADA4610-4 are dual and quad amplifiers, respectively. in a wide dynamic range for photodiode amplifier circuits. Low noise and distortion, high output current, and excellent speed make the ADA4610-2/ADA4610-4 great choices for audio applications. The combination of low offset, noise, and very low input bias current makes these amplifiers especially suitable for high impedance sensor amplification and precise current measurements using shunts. With excellent dc precision, low noise, and fast settling time, the ADA4610-2/ADA4610-4 provide superior accuracy in medical instruments, electronic measurement, and automated test equipment. Unlike many competitive amplifiers, the ADA4610-2/ADA4610-4 maintain fast settling performance with substantial capacitive loads. Unlike many older JFET amplifiers, the ADA4610-2/ADA4610-4 do not suffer from output phase reversal when input voltages exceed the maximum common-mode voltage range. The ADA4610-2/ADA4610-4 are specified over the -40C to +125C extended industrial temperature range. The fast slew rate and great stability with capacitive loads make the ADA4610-2/ADA4610-4 perfect fits for high performance filters. Low input bias currents, low offset, and low noise result Rev. D The ADA4610-2 is available in 8-lead narrow SOIC, 8-lead MSOP, and 8-lead LFCSP packages. The ADA4610-4 is available in a 14-lead narrow SOIC package. Table 1. Related Precision JFET Operational Amplifiers Single AD8510 AD8610 AD820 ADA4627-1/ADA4637-1 N/A1 1 Dual AD8512 AD8620 AD822 N/A1 ADA4001-2 Quad AD8513 N/A1 AD824 N/A1 N/A1 N/A = not available in this device family. Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 (c)2011-2014 Analog Devices, Inc. All rights reserved. Technical Support www.analog.com ADA4610-2/ADA4610-4 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Typical Performance Characteristics ..............................................9 Applications ....................................................................................... 1 Comparative Voltage and Variable Voltage Graphs ............... 15 Pin Configurations ........................................................................... 1 Functional Description .................................................................. 18 General Description ......................................................................... 1 Applications Information .............................................................. 19 Revision History ............................................................................... 2 Input Overvoltage Protection ................................................... 19 Specifications..................................................................................... 3 Peak Detector .............................................................................. 19 Electrical Characteristics ............................................................. 4 I to V Conversion Applications ................................................ 19 Absolute Maximum Ratings............................................................ 6 Comparator Operation .............................................................. 20 Thermal Resistance ...................................................................... 6 Outline Dimensions ....................................................................... 21 ESD Caution .................................................................................. 6 Ordering Guide .......................................................................... 22 Pin Configurations and Function Descriptions ........................... 7 REVISION HISTORY 11/14--Rev. C to Rev. D Change to Figure 56 ....................................................................... 19 5/14--Rev. B to Rev. C Added ADA4610-4 ............................................................. Universal Added 14-Lead SOIC ......................................................... Universal Added Voltage Noise Density to Features Section, Figure 3, and Table 1; Renumbered Sequentially ................................................. 1 Changes to Table 2 ............................................................................ 3 Changes to Table 3 ............................................................................ 4 Changes to Table 4 ............................................................................ 6 Added Pin Configurations and Function Descriptions Section, Figure 4 to Figure 6, Table 6, and Table 7 ....................... 7 Changes to Typical Performance Characteristics Section ........... 8 Added Functional Description Section ....................................... 17 Added Input Overvoltage Protection Section, Peak Detector Section, I to V Conversion Applications Section, and Photodiode Circuits Section ......................................................... 18 Change to Figure 56 ....................................................................... 18 Added Figure 62, Outline Dimensions ........................................ 20 Changes to Ordering Guide .......................................................... 20 8/12--Rev. A to Rev. B Changes to Figure 9 ...........................................................................8 5/12--Rev. 0 to Rev. A Changes to Data Sheet Title and General Description Section ...1 Changed Input Impedance Parameter, Differential to Input Capacitance Parameter, and Differential Parameter, Table 1 ......3 Added Input Resistance in Table 1 ..................................................3 Changed Input Impedance, Differential Parameter to Input Capacitance, Differential Parameter, Table 2 .................................4 Added Input Resistance Parameter, Table 2 ...................................4 Added Figure 9, Figure 10, and Figure 14; Renumbered Sequentially ........................................................................................8 Added Figure 15 ................................................................................9 Updated Outline Dimensions ....................................................... 16 Changes to Ordering Guide .......................................................... 17 12/11--Revision 0: Initial Version Rev. D | Page 2 of 22 Data Sheet ADA4610-2/ADA4610-4 SPECIFICATIONS VSY = 5 V, VCM = 0 V, TA = 25C, unless otherwise noted. Table 2. Parameter INPUT CHARACTERISTICS Offset Voltage B Grade (ADA4610-2 Only) Symbol Test Conditions/Comments Min Typ Max Unit 0.2 0.4 0.8 1 1.8 mV mV mV mV 4 8 25 1.5 20 0.25 +2.5 V/C V/C pA nA pA nA V dB dB VOS -40C < TA < +125C A Grade 0.4 -40C < TA < +125C Offset Voltage Drift B Grade1 (ADA4610-2 Only) A Grade1 Input Bias Current VOS/T IB Input Offset Current IOS 0.5 1 5 -40C < TA < +125C 2 -40C < TA < +125C Input Voltage Range Common-Mode Rejection Ratio Large Signal Voltage Gain ADA4610-2 CMRR AVO VCM = -2.5 V to +2.5 V -40C < TA < +125C RL = 2 k, VOUT = -3.5 V to +3.5 V -40C < TA < +125C ADA4610-4 Input Capacitance Differential Common-Mode Input Resistance OUTPUT CHARACTERISTICS Output Voltage High Output Voltage Low Short-Circuit Current POWER SUPPLY Power Supply Rejection Ratio ADA4610-2 -40C < TA < +125C VCM = 0 V 98 86 96 84 VCM = 0 V VOH VOL RL = 2 k -40C < TA < +125C RL = 600 -40C < TA < +125C RL = 2 k -40C < TA < +125C RL = 600 -40C < TA < +125C 4.85 4.60 4.60 4.05 PSRR 100 dB dB dB dB 98 3.1 4.8 >1013 pF pF 4.90 V V V V V V V V mA 4.89 -4.90 -4.90 -4.75 -4.80 -4.40 63 VSY = 4.5 V to 18 V ADA4610-4 ISy 110 -4.95 ISC -40C < TA < +125C Supply Current per Amplifier -2.5 94 86 -40C < TA < +125C IOUT = 0 mA -40C < TA < +125C Rev. D | Page 3 of 22 106 103 104 100 125 117 1.50 1.70 1.85 dB dB dB dB mA mA ADA4610-2/ADA4610-4 Parameter DYNAMIC PERFORMANCE Slew Rate Gain Bandwidth Product Unity-Gain Crossover Phase Margin -3 dB Closed-Loop Bandwidth Total Harmonic Distortion (THD) + Noise NOISE PERFORMANCE Voltage Noise Voltage Noise Density 1 Data Sheet Symbol Test Conditions/Comments Min Typ Max Unit SR GBP UGC M -3 dB THD + N RL = 2 k, AV = +1 VIN = 5 mV p-p, RL = 2 k, AV = +100 VIN = 5 mV p-p, RL = 2 k,AV = +1 151 AV = +1, VIN = 5 mV p-p 1 kHz, AV = +1, RL = 2 k, VIN = 1 V rms +21/-46 15.4 9.3 61 10.6 0.00025 V/s MHz MHz Degrees MHz % en p-p en 0.1 Hz to 10 Hz f = 10 Hz f = 100 Hz f = 1 kHz f = 10 kHz 0.45 14 8.20 7.30 7.30 V p-p nV/Hz nV/Hz nV/Hz nV/Hz Guaranteed by design and characterization. ELECTRICAL CHARACTERISTICS VSY = 15 V, VCM = 0 V, TA = 25C, unless otherwise noted. Table 3. Parameter INPUT CHARACTERISTICS Offset Voltage B Grade (ADA4610-2 Only) Symbol Test Conditions/Comments Min Typ Max Unit 0.2 0.4 0.8 1 1.8 mV mV mV mV 4 8 25 1.50 20 0.25 +12.5 V/C V/C pA nA pA nA V dB dB VOS -40C < TA < +125C A Grade 0.4 -40C < TA < +125C Offset Voltage Drift B Grade (ADA4610-2 Only)1 A Grade1 Input Bias Current VOS/T IB Input Offset Current IOS 0.5 1 5 -40C < TA < +125C 2 -40C < TA < +125C Input Voltage Range Common-Mode Rejection Ratio Large Signal Voltage Gain ADA4610-2 CMRR AVO VCM = -12.5 V to +12.5 V -40C < TA < +125C RL = 2 k, VOUT = 13.5 V -40C < TA < +125C ADA4610-4 Input Capacitance Differential Common-Mode Input Resistance OUTPUT CHARACTERISTICS Output Voltage High -40C < TA < +125C VCM = 0 V -12.5 100 96 104 91 102 86 VCM = 0 V VOH RL = 2 k -40C < TA < +125C RL = 600 -40C < TA < +125C Rev. D | Page 4 of 22 14.80 14.65 14.25 13.35 115 107 104 dB dB dB dB 3.1 4.8 >1013 pF pF 14.90 V V V V 14.47 Data Sheet Parameter Output Voltage Low Short-Circuit Current POWER SUPPLY Power Supply Rejection Ratio ADA4610-2 ADA4610-2/ADA4610-4 Symbol VOL Test Conditions/Comments RL = 2 k -40C < TA < +125C RL = 600 -40C < TA < +125C PSRR DYNAMIC PERFORMANCE Slew Rate Gain Bandwidth Product Unity-Gain Crossover Phase Margin -3 dB Closed-Loop Bandwidth Total Harmonic Distortion (THD) + Noise NOISE PERFORMANCE Peak-to-Peak Voltage Noise Voltage Noise Density 1 Max -14.85 -14.75 -14.60 -14.30 79 Unit V V V V mA VSY = 4.5 V to 18 V ADA4610-4 ISY Typ -14.90 -14.68 ISC -40C < TA < +125C Supply Current per Amplifier Min -40C < TA < +125C IOUT = 0 mA -40C < TA < +125C SR GBP UGC M -3 dB THD + N RL = 2 k , AV = +1 VIN = 5 mV p-p, RL = 2 k, AV = +100 VIN = 5 mV p-p, RL = 2 k, AV = +1 en p-p en 106 103 104 100 125 117 1.60 AV = +1, VIN = 5 mV p-p 1 kHz, AV = +1, RL = 2 k, VIN = 5 V rms +25/-61 16.3 9.3 66 9.5 0.00006 V/s MHz MHz Degrees MHz % 0.1 Hz to 10 Hz bandwidth f = 10 Hz f = 100 Hz f = 1 kHz f = 10 kHz 0.45 14 8.50 7.30 7.30 V p-p nV/Hz nV/Hz nV/Hz nV/Hz Guaranteed by design and characterization. Rev. D | Page 5 of 22 171 1.85 2.0 dB dB dB dB mA mA ADA4610-2/ADA4610-4 Data Sheet ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE Table 4. Parameter Supply Voltage Input Voltage Input Current1 Storage Temperature Range Operating Temperature Range Junction Temperature Range Lead Temperature (Soldering, 10 sec) Electrostatic Discharge (Human Body Model)2 Field Induced Charge Device Model (FICDM)3 Rating 18 V VS 10 mA -65C to +150C -40C to +125C -65C to +150C 300C 2500 V Table 5. Thermal Resistance 1250 V ESD CAUTION Package Type 8-Lead MSOP 8-Lead SOIC_N 8-Lead LFCSP_VD 14-Lead SOIC_N 1 JA1 142 120 57 115 JC 45 43 12 36 Unit C/W C/W C/W C/W JA is specified for worst-case conditions, that is, JA is specified for a device soldered in a circuit board for surface-mount packages. The input pins have clamp diodes connected to the power supply pins. Limit the input current to 10 mA or less whenever input signals exceed the power supply rail by 0.3 V. 2 ESDA/JEDEC JS-001-2011 applicable standard. 3 JESD22-C101 (ESD FICDM standard of JEDEC) applicable standard. 1 Stresses at or above those listed under Absolute Maximum Ratings may cause permanent damage to the product. This is a stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of this specification is not implied. Operation beyond the maximum operating conditions for extended periods may affect product reliability. Rev. D | Page 6 of 22 Data Sheet ADA4610-2/ADA4610-4 PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS +IN A 3 ADA4610-2 TOP VIEW (Not to Scale) V- 4 8 V+ 7 OUT B 6 -IN B 5 +IN B OUT A 1 PIN 1 INDICATOR 8 V+ -IN A 2 ADA4610-2 7 OUT B +IN A 3 TOP VIEW (Not to Scale) 6 -IN B V- 4 5 +IN B NOTES 1. THE EXPOSED PAD MUST BE CONNECTED TO V-. Figure 4. ADA4610-2 Pin Configuration, 8-Lead SOIC_N (R Suffix) and 8-Lead MSOP (RM Suffix) Figure 5. ADA4610-2 Pin Configuration, 8-Lead LFCSP_VD (CP Suffix) Table 6. ADA4610-2 Pin Function Descriptions, 8-Lead SOIC_N, 8-Lead MSOP, and 8-Lead LFCSP_VD Pin No. 1 2 3 4 5 6 7 8 Mnemonic OUT A -IN A +IN A V- +IN B -IN B OUT B V+ EPAD 09646-105 -IN A 2 09646-104 OUT A 1 Description Output Channel A. Inverting Input Channel A. Noninverting Input Channel A. Negative Supply Voltage. Noninverting Input Channel B. Inverting Input Channel B. Output Channel B. Positive Supply Voltage. Exposed Pad. The exposed pad must be connected to V-. Rev. D | Page 7 of 22 Data Sheet OUT A 1 14 OUT D -IN A 2 13 -IN D ADA4610-4 12 +IN D TOP VIEW (Not to Scale) 11 V- 10 +IN C -IN B 6 9 -IN C OUT B 7 8 OUT C +IN A 3 V+ 4 +IN B 5 09646-106 ADA4610-2/ADA4610-4 Figure 6. ADA4610-4 Pin Configuration, 14-Lead SOIC_N (R Suffix) Table 7. ADA4610-4 Pin Function Descriptions, 14-Lead SOIC_N Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 Mnemonic OUT A -IN A +IN A V+ +IN B -IN B OUT B OUT C -IN C +IN C V- +IN D -IN D OUT D Description Output Channel A. Inverting Input Channel A. Noninverting Input Channel A. Positive Supply Voltage. Noninverting Input Channel B. Inverting Input Channel B. Output Channel B. Output Channel C. Inverting Input Channel C. Noninverting Input Channel C. Negative Supply Voltage. Noninverting Input Channel D. Inverting Input Channel D. Output Channel D. Rev. D | Page 8 of 22 Data Sheet ADA4610-2/ADA4610-4 TYPICAL PERFORMANCE CHARACTERISTICS TA = 25C, unless otherwise noted. 400 400 SOIC 350 350 300 300 NUMBER OF CHANNELS 250 200 150 100 200 150 100 50 0 -1000 -800 -600 -400 -200 0 200 400 600 OFFSET VOLTAGE (V) 09646-003 0 -1000 -800 -600 -400 -200 0 200 400 600 OFFSET VOLTAGE (V) 800 1000 1200 Figure 7. Input Offset Voltage Distribution, VSY = 5 V 350 SOIC SOIC 300 200 150 100 250 200 150 100 0 0 TCVOS (V/C) 09646-004 50 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 7.0 7.5 8.0 8.5 9.0 9.5 10.0 10.5 50 TCVOS (V/C) Figure 8. Input Offset Voltage Drift (TCVOS) Distribution, VSY = 5 V Figure 11. TCVOS Distribution, VSY = 15 V 1500 1000 1000 INPUT OFFSET VOLTAGE (uV) 1500 500 0 -500 MEAN MEAN + 3 MEAN - 3 -1500 -5 -4 -3 -2 -1 0 VCM (V) 500 0 -500 MEAN MEAN + 3 MEAN - 3 -1000 1 2 3 4 5 -1500 -15 09646-005 -1000 09646-007 250 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 7.0 7.5 8.0 8.5 9.0 9.5 10.0 10.5 NUMBER OF CHANNELS 300 NUMBER OF CHANNELS 800 1000 1200 Figure 10. Input Offset Voltage Distribution, VSY = 15 V 350 INPUT OFFSET VOLTAGE (V) 09646-006 50 250 Figure 9. Input Offset Voltage vs. Common-Mode Input Voltage (VCM), VSY = 5 V, RL = (Sample Size = 200) -10 -5 0 VCM (V) 5 10 15 09646-008 NUMBER OF CHANNELS SOIC Figure 12. Input Offset Voltage vs. Input Common-Mode Voltage (VCM), VSY = 15 V, RL = (Sample Size = 200) Rev. D | Page 9 of 22 Data Sheet 50 40 40 30 30 INPUT BIAS CURRENT (pA) 50 10 0 -10 MEAN MEAN + 3 MEAN - 3 -20 20 10 0 -10 -30 -30 -40 -40 -4 -3 -2 -1 0 1 2 3 4 5 VCM (V) -50 -15 Figure 13. Input Bias Current vs. Common-Mode Input Voltage (VCM), VSY = 5 V, RL = (Sample Size = 700 Channels) -10 15 SOIC 10k 1k INPUT BIAS CURRENT (pA) +125C 100 10 +25C 1 -40C 1k +125C 100 10 +25C 1 0.1 -40C -3 -2 -1 0 1 2 3 4 5 VCMI (V) 09646-056 -4 0.1 -15 Figure 14. Input Bias Current vs. Common-Mode Input Voltage and Temperature (VCMI), VSY = 5 V, RL = (Sample Size = 700 Channels) -5 -10 0 5 10 15 VCMI (V) 09646-058 INPUT BIAS CURRENT (pA) 10 100k 10k Figure 17. Input Bias Current vs. Common-Mode Input Voltage and Temperature (VCMI), VSY = 15 V, RL = (Sample Size = 700 Channels) 100 INPUT BIAS CURRENT (pA) 100 10 1 -25 0 25 50 TEMPERATURE (C) 75 100 125 10 1 0.1 -50 09646-009 INPUT BIAS CURRENT (pA) 5 Figure 16. Input Bias Current vs. Common-Mode Input Voltage (VCM), VSY = 15 V, RL = (Sample Size = 700 Channels) SOIC 0.1 -50 0 VCM (V) 100k 0.01 -5 -5 -25 0 25 50 TEMPERATURE (C) 75 100 125 Figure 18. Input Bias Current vs. Temperature, VSY = 15 V Figure 15. Input Bias Current vs. Temperature, VSY = 5 V Rev. D | Page 10 of 22 09646-012 -50 -5 MEAN MEAN + 3 MEAN - 3 -20 09646-057 20 09646-055 INPUT BIAS CURRENT (pA) ADA4610-2/ADA4610-4 Data Sheet ADA4610-2/ADA4610-4 0.1 0.01 0.1 1 10 IOUT SOURCE (mA) 100 0.01 0.1 10 10 IOUT SOURCE (mA) 100 10 (VOUT - V-) (V) 1 0.1 1 10 100 IOUT SINK (mA) 0.01 0.01 0.1 1 IOUT SINK (mA) 10 100 Figure 23. Dropout Voltage (VOUT - V-) vs. Sink Current, VSY = 15 V Figure 20. Dropout Voltage (VOUT - V-) vs. Sink Current, VSY = 5 V 120 270 100 225 100 225 80 180 80 180 60 135 60 135 40 90 40 90 20 45 20 45 0 0 0 0 -20 -45 0.1 1 10 100 FREQUENCY (kHz) 1k 10k -90 100k -20 -40 0.01 09646-016 -40 0.01 GAIN (dB) 270 PHASE (Degrees) 120 Figure 21. Open-Loop Gain and Phase vs. Frequency, VSY = 5 V, RL = 2 k PHASE (Degrees) 1 09646-015 0.01 0.1 09646-018 0.1 -45 0.1 1 10 100 FREQUENCY (kHz) 1k 10k -90 100k 09646-019 (VOUT - V-) (V) 1 Figure 22. Dropout Voltage (V+ - VOUT) vs. Source Current, VSY = 15 V Figure 19. Dropout Voltage (V+ - VOUT) vs. Source Current, VSY = 5 V GAIN (dB) 0.1 09646-014 (V+ - VOUT) (V) 1 09646-011 (V+ - VOUT) (V) 1 Figure 24. Open-Loop Gain and Phase vs. Frequency, VSY = 15 V, RL = 2 k Rev. D | Page 11 of 22 ADA4610-2/ADA4610-4 Data Sheet 60 60 AV = +100 AV = +100 40 40 AV = +10 GAIN (dB) AV = +1 0 -20 20 AV = +1 0 1 10 100 1k FREQUENCY (kHz) 10k 100k -40 09646-017 -40 1 1k 1k 100 100 10 AV = +100 1 AV = +100 1 10 100 1k FREQUENCY (kHz) 10k 100k 0.01 0.1 09646-021 1 1 10 100 1k FREQUENCY (kHz) 10k 100k Figure 29. Closed-Loop Output Impedance (ZOUT) vs. Frequency, VSY = 15 V 120 120 100 100 80 80 PSRR (dB) PSRR- 60 40 PSRR- 60 40 PSRR+ PSRR+ 20 20 0 0 1 10 100 FREQUENCY (kHz) 1k 10k -20 0.1 09646-022 PSRR (dB) AV = +1 09646-024 0.1 Figure 26. Closed-Loop Output Impedance (ZOUT) vs. Frequency, VSY = 5 V -20 0.1 100k AV = +10 AV = +1 0.01 0.1 10k 10 AV = +10 0.1 100 1k FREQUENCY (kHz) Figure 28. Closed-Loop Gain vs. Frequency, VSY = 15 V ZOUT () ZOUT () Figure 25. Closed-Loop Gain vs. Frequency, VSY = 5 V 10 09646-020 -20 Figure 27. PSRR vs. Frequency, VSY = 5 V 1 10 100 FREQUENCY (kHz) 1k Figure 30. PSRR vs. Frequency, VSY = 15 V Rev. D | Page 12 of 22 10k 09646-025 GAIN (dB) AV = +10 20 Data Sheet ADA4610-2/ADA4610-4 120 120 100 100 80 60 80 60 40 40 20 20 1 10 100 FREQUENCY (kHz) 1k 10k 0 0.1 09646-023 0 0.1 3 12 2 8 1 0 -1 -2 10k 4 0 -4 1 2 3 4 5 6 TIME (s) 7 8 9 10 -12 09646-027 0 0 1 2 3 4 5 6 TIME (s) 7 8 9 10 09646-030 -8 -3 Figure 35. Large Signal Transient Response, VSY = 15 V, AV = +1, RL = 2 k, CL = 100 pF Figure 32. Large Signal Transient Response, VSY = 5 V, AV = +1, RL = 2 k, CL = 100 pF 75 50 50 OUTPUT VOLTAGE (mV) 75 25 0 -25 25 0 -25 -75 0 1 2 3 4 5 6 TIME (s) 7 8 9 10 -75 0 Figure 33. Small Signal Transient Response, VSY = 5 V, AV = +1, RL = 2 k, CL = 100 pF 1 2 3 4 5 6 TIME (s) 7 8 9 10 Figure 36. Small Signal Transient Response, VSY = 15 V, AV = +1, RL = 2 k, CL = 100 pF Rev. D | Page 13 of 22 09646-031 -50 -50 09646-028 OUTPUT VOLTAGE (mV) 1k Figure 34. CMRR vs. Frequency, VSY = 15 V OUTPUT VOLTAGE (V) OUTPUT VOLTAGE (V) Figure 31. CMRR vs. Frequency, VSY = 5 V 10 100 FREQUENCY (kHz) 1 09646-026 CMRR (dB) 140 CMRR (dB) 140 ADA4610-2/ADA4610-4 Data Sheet 100 1 0.001 0.01 0.1 1 FREQUENCY (kHz) 10 100 10 1 0.001 09646-033 10 Figure 37. Voltage Noise Density vs. Frequency, VSY = 5 V 0.01 0.1 1 FREQUENCY (kHz) 10 09646-036 VOLTAGE NOISE DENSITY (nV/ Hz) VOLTAGE NOISE DENSITY (nV/ Hz) 100 Figure 39. Voltage Noise Density vs. Frequency, VSY = 15 V 50 50 40 40 OVERSHOOT (%) 30 20 OS- 10 20 OS- 10 0.1 LOAD CAPACITANCE (nF) 1 0 0.01 09646-034 0 0.01 OS+ 30 Figure 38. Overshoot vs. Load Capacitance, VSY = 5 V, AV = +1, RL = 2 k, VIN = 100 mV p-p 0.1 LOAD CAPACITANCE (nF) 1 09646-037 OVERSHOOT (%) OS+ Figure 40. Overshoot vs. Load Capacitance, VSY = 15 V, AV = +1, RL = 2 k, VIN = 100 mV p-p Rev. D | Page 14 of 22 Data Sheet ADA4610-2/ADA4610-4 COMPARATIVE VOLTAGE AND VARIABLE VOLTAGE GRAPHS 10 1 1 0.1 0.01 THD + N (%) THD + N (%) 0.1 0.01 0.001 0.001 0.1 0.01 0.00001 0.001 09646-205 1 AMPLITUDE (V rms) 1 1 0.1 0.1 0.01 80kHz BAND-PASS FILTER 500kHz BAND-PASS FILTER 0.001 0.01 1 10 80kHz BAND-PASS FILTER 500kHz BAND-PASS FILTER 0.001 0.0001 0.0001 1 0.1 10 100 FREQUENCY (kHz) 09646-204 0.00001 0.01 0.1 AMPLITUDE (V rms) Figure 44. THD + N vs. Amplitude VSY = 15 V THD + N (%) THD + N (%) Figure 41. THD + N vs. Amplitude VSY = 5 V 0.01 0.00001 0.01 0.1 1 100 10 FREQUENCY (kHz) 09646-141 0.00001 0.001 09646-040 0.0001 0.0001 Figure 45. THD + N vs. Frequency VSY = 15 V Figure 42. THD + N vs. Frequency VSY = 5 V 16 -40 12 8 VOLTAGE (V) -80 -100 4 0 -4 -120 -8 -140 -160 0.1 1 10 FREQUENCY (kHz) Figure 43. Channel Separation vs. Frequency 100 -16 0 0.1 0.2 0.3 0.4 0.5 0.6 TIME (ms) 0.7 0.8 0.9 1.0 09646-042 OUTPUT INPUT -12 09646-039 CHANNEL SEPARATION (dB) -60 Figure 46. No Phase Reversal, VSY = 15 V, AV = +1, RL = 2 k, CL = 100 pF Rev. D | Page 15 of 22 ADA4610-2/ADA4610-4 Data Sheet 200 ISY PER AMPLIFIER (mA) 0 -100 -200 -300 -500 0 1 2 3 4 5 6 TIME (sec) 7 8 9 10 09646-043 -400 +25C -40C 0 5 12 12 10 10 25 30 35 8 0.1% 6 0.01% 0.01% 0.1% 6 4 4 2 2 0 0.2 0.4 1.2 0.6 0.8 1.0 SETTLING TIME (s) 1.4 0 09646-044 0 0 0.2 18 1.4 4 2 OSCILLOSCOPE VSY+ R S VIN 0.9k PULSE GENERATOR 10 8 6 -2 VOUT VIN OSCILLOSCOPE -4 DUT RF 10k VOUT (V) 12 0 AVCL = 11 VIN = 1.5 x VOUT MAX RL RI 1k VSY- 4 VSY+ RS IN 0.9k -6 -8 -10 2 -12 VIN 0 -14 -2 -16 0.5 1.0 1.5 2.0 TIME (s) 2.5 3.0 -18 -0.5 09646-200 0 AVCL = 11 VIN = 1.5 x VOUT MAX OUT PULSE GENERATOR VOUT 14 -4 -0.5 1.2 0.8 1.0 0.6 SETTLING TIME (s) Figure 51. Negative Step Settling Time Figure 48. Positive Step Settling Time 16 0.4 09646-045 STEP SIZE (V) 8 VOUT (V) 15 20 VSY (V) 10 Figure 50. Supply Current (ISY) per Amplifier vs. Supply Voltage (VSY) at Various Temperatures Figure 47. Voltage Noise, 0.1 Hz to 10 Hz STEP SIZE (V) +125C +85C DUT RF 10k RL RI 1k VSY- VOUT 0 0.5 1.0 1.5 2.0 TIME (s) Figure 49. Positive Overload Recovery Figure 52. Negative Overload Recovery Rev. D | Page 16 of 22 2.5 3.0 09646-201 VOLTAGE (nV) 100 2.0 1.9 1.8 1.7 1.6 1.5 1.4 1.3 1.2 1.1 1.0 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 09646-047 300 Data Sheet ADA4610-2/ADA4610-4 5 15 4 VIN 10 3 VIN 5 1 VIN, VOUT (V) VIN, VOUT (V) 2 VOUT 0 -1 VOUT 0 -5 -2 -3 -10 0 0.2 0.4 0.6 0.8 1.0 TIME (s) 1.2 1.4 1.6 1.8 -15 -2.0 09646-203 -5 -0.2 -1.5 -1.0 -0.5 TIME (s) Figure 53. Positive and Negative Slew Rate (VSY = 5 V, AV = +1, RL = 2 k) 0 0.5 1.0 09646-202 -4 Figure 54. Positive and Negative Slew Rate (VSY = 15 V, AV = +1, RL = 2 k) Rev. D | Page 17 of 22 ADA4610-2/ADA4610-4 Data Sheet FUNCTIONAL DESCRIPTION The ADA4610-2/ADA4610-4 are manufactured using the Analog Devices, Inc. iPolar(R) process, a 36 V dielectrically isolated (DI) process with P-channel JFET technology. The unique architecture of the ADA4610x family makes it possible to combine high precision and high speed characteristics into a high voltage, low power op amp. A simplified schematic for the ADA4610-2/ADA4610-4 is shown in Figure 55. The JFET input stage architecture offers advantages of low input bias current, high bandwidth, high gain, low noise, and no phase reversal when the applied input signal exceeds the common voltage range. The output stage is rail to rail with high drive characteristics and low dropout voltage for both sinking and sourcing currents. offset and 4 V/C of offset drift; these characteristics are usually associated with very high precision bipolar input amplifiers. The gate current of a typical JFET doubles every 10C, resulting in a similar increase in input bias current over temperature. The low power consumption characteristic of the ADA4610x family minimizes the die temperature, which warrants low input bias currents even at elevated ambient temperatures, making the amplifiers ideal for applications that require low leakage specifications without active cooling. Give special care to the printed circuit board (PCB) layout to minimize leakage currents between PCB traces. Improper layout and board handling may generate leakage currents exceeding the bias currents of the op amp. The ADA4610x family is unconditionally stable for all gain configurations, even with capacitive loads well in excess of 1 nF. The devices have internal protective circuitry that allows voltages as high as 0.3 V beyond the supplies to be applied at the input of either terminal without causing damage (for higher input voltages, refer to the Input Overvoltage Protection section). The ADA4610-2 B grades achieve less than 0.4 mV of The ADA4610x family is fully specified with supply voltages from 5 V to 15 V over the extended industrial temperature range of -40C to +125C. The ADA4610-2 is offered in the 8-lead MSOP, 8-lead SOIC_N, and 8-lead LFCSP_VD, while the ADA4610-4 is offered in a 14-lead SOIC_N. All these packages are surface-mount type. V+ R6 D31 R7 C3 Q30 Q8 R16 Q29 Q9 Q28 + - 1+ Q12 Q14 A1 Q15 Q18 C2 RC4 DE5 C4 A2 DE1 R10 DE3 Q4 R2 VIN+ R11 Q5 Q1 J1 Q23 Q13 Q16 Q17 VOUT R3 J2 R5 DE6 VIN- C1 Q7 Q6 Q27 DE2 I2 I3 Q24 Q25 I4 R15 D26 V- Figure 55. Simplified Schematic Rev. D | Page 18 of 22 09646-054 DE4 Data Sheet ADA4610-2/ADA4610-4 APPLICATIONS INFORMATION INPUT OVERVOLTAGE PROTECTION such as polystyrene or polypropylene is required for C3. Reversing the diode directions causes the circuit to detect negative peaks. The ADA4610-2/ADA4610-4 have internal protective circuitry that allows voltages as high as 0.3 V beyond the supplies to be applied at the input of either terminal without causing damage. For higher input voltages, a series resistor is necessary to limit the input current. The resistor value can be determined by Photodiode Circuits Common applications for I to V conversion include photodiode circuits where the amplifier is used to convert a current emitted by a diode placed at the negative input terminal into an output voltage. 10 mA RS where: VIN is the input voltage. VS is the voltage of either V+ or V-. RS is the series resistor. The low input bias current, wide bandwidth, and low noise of the ADA4610-2/ADA4610-4 make them excellent choices for various photodiode applications, including fax machines, fiber optic controls, motion sensors, and bar code readers. With a very low bias current of <1.5 nA up to 125C, higher resistor values can be used in series with the inputs. A 5 k resistor protects the inputs from voltages as high as 25 V beyond the supplies and adds less than 10 V to the offset. The circuit shown in Figure 57 uses a silicon diode with zero bias voltage. This setup is a photovoltaic mode, which uses many large photodiodes. This configuration limits the overall noise and is suitable for instrumentation applications. PEAK DETECTOR CF The function of a peak detector is to capture the peak value of a signal and produce an output equal to it. By taking advantage of the dc precision and super low input bias current of the JFET input amplifiers, such as the ADA4610-2/ADA4610-4, a highly accurate peak detector can be built, as shown in Figure 56. + 2 ADA4610-2 8 5 U2A ADA4610-2 U2B 1 D3 1N4148 4 - VIN 2 +PEAK C4 50pF D4 1N4148 6 C3 1F R7 10k D2 1N448 RD CT 1/2 ADA4610-2 1 3 8 7 4 VCC VEE Figure 57. Equivalent Preamplifier Photodiode Circuit 09646-149 3 VEE 4 VCC 8 RF 09646-154 VIN - VS I TO V CONVERSION APPLICATIONS R6 1k Figure 56. Positive Peak Detector In this application, Diode D3 and Diode D4 act as unidirectional current switches, which open up when the output is kept constant (in hold mode). To detect a positive peak, U2A drives C3 through D3, and D4 until C3 is charged to a voltage equal to the input peak value. Feedback from the output of the U2B (+peak) through R6 limits the output voltage of U2A. After detecting the peak, the output of U2A swings low but is clamped by D2. Diode D3 reverses bias and the common node of D3, D4, and R7 is held to a voltage equal to +peak by R7. The voltage across D4 is zero; therefore, its leakage is small. The bias current of U2B is also small. With almost no leakage, C3 has a long hold time. The ADA4610-2, shown in Figure 56, is a perfect fit for building a peak detector because U2A requires dc precision and high output current during fast peaks, and U2B requires low input bias (IB) current to minimize capacitance discharge between peaks. A low leakage and low dielectric absorption capacitor A larger signal bandwidth can be attained at the expense of additional output noise. The total input capacitance (CT) consists of the sum of the diode capacitance (typically 30 pF to 40 pF) and the amplifier input capacitance (<10 pF), which includes external parasitic capacitance. CT creates a zero in the frequency response that can lead to an unstable system. To ensure stability and optimize the bandwidth of the signal, place a capacitor in the feedback loop of the circuit shown in Figure 57. The capacitor creates a pole and yields a bandwidth with a corner frequency of 1/(2(RFCF)) where: RF is the feedback resistor. CF is the feedback capacitor. The value of RF can be determined by the ratio V/ID where: V is the desired output voltage of the op amp. ID is the diode current. Rev. D | Page 19 of 22 ADA4610-2/ADA4610-4 Data Sheet For example, if ID is 100 A and a 10 V output voltage is desired, RF must be 100 k. The resistance of the photodiode (RD) is a junction resistance (see Figure 57). A typical value for RD is 1000 M. Because RD >> RF, the circuit behavior is not impacted by the effect of the junction resistance. The maximum signal bandwidth is ft 2R F CT where ft is the unity-gain frequency of the op amp. CF can be calculated by 9 CT 2RF ft COMPARATOR, VOUT = HIGH 8 where ft is the unity-gain frequency of the op amp, and it achieves a phase margin, M, of approximately 45. A higher phase margin can be obtained by increasing the value of CF. Setting CF to twice the previous value yields approximately M = 65 and a maximal flat frequency response, but it reduces the maximum signal bandwidth by 50%. Using the previous parameters with a CF 7 pF, the signal bandwidth is approximately 250 kHz. ISY FOR ALL CHANNELS (mA) CF = COMPARATOR, VOUT = LOW 7 6 FOLLOWER 5 4 3 2 1 0 COMPARATOR OPERATION 0 Although op amps are quite different from comparators, occasionally an unused section of a dual or a quad op amp can be used as a comparator; however, this is not recommended for any rail-to-rail output op amp. For rail-to-rail output op amps, the output stage is generally a ratioed current mirror with bipolar or MOSFET transistors. With the device operating open loop, Rev. D | Page 20 of 22 5 10 15 20 VSY (V) 25 30 35 40 Figure 58. Supply Current vs. Supply Voltage (ADA4610-4 Only) 09646-053 f MAX = the second stage increases the current drive to the ratioed mirror to close the loop. However, the second stage cannot close the loop, which results in an increase in supply current. With the ADA4610-2/ADA4610-4 op amps configured as comparators, the supply current can be significantly higher (see Figure 58 for supply current vs. supply voltage in the ADA4610-4). Configuring an unused section as a voltage follower with the noninverting input connected to a voltage within the input voltage range is recommended. The ADA4610-2/ADA4610-4 have a unique output stage design that reduces the excess supply current but does not entirely eliminate this effect when the op amp is operating open loop. Data Sheet ADA4610-2/ADA4610-4 OUTLINE DIMENSIONS 5.00 (0.1968) 4.80 (0.1890) 8 4.00 (0.1574) 3.80 (0.1497) 5 1 4 1.27 (0.0500) BSC 0.25 (0.0098) 0.10 (0.0040) 6.20 (0.2441) 5.80 (0.2284) 1.75 (0.0688) 1.35 (0.0532) 0.51 (0.0201) 0.31 (0.0122) COPLANARITY 0.10 SEATING PLANE 0.50 (0.0196) 0.25 (0.0099) 45 8 0 0.25 (0.0098) 0.17 (0.0067) 1.27 (0.0500) 0.40 (0.0157) 012407-A COMPLIANT TO JEDEC STANDARDS MS-012-AA CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. Figure 59. 8-Lead Standard Small Outline Package [SOIC_N] Narrow Body (R-8) Dimensions shown in millimeters and (inches) 3.20 3.00 2.80 8 3.20 3.00 2.80 1 5.15 4.90 4.65 5 4 PIN 1 IDENTIFIER 0.65 BSC 0.95 0.85 0.75 15 MAX 1.10 MAX 6 0 0.40 0.25 0.80 0.55 0.40 0.23 0.09 10-07-2009-B 0.15 0.05 COPLANARITY 0.10 COMPLIANT TO JEDEC STANDARDS MO-187-AA Figure 60. 8-Lead Mini Small Outline Package [MSOP] (RM-8) Dimensions shown in millimeters 0.60 MAX 5 2.95 2.75 SQ 2.55 PIN 1 INDICATOR 8 EXPOSED PAD 4 0.50 0.40 0.30 TOP VIEW 12 MAX 0.90 MAX 0.85 NOM SEATING PLANE 0.70 MAX 0.65 TYP 0.05 MAX 0.01 NOM 0.30 0.23 0.18 0.50 BSC 0.60 MAX 0.20 REF 1.60 1.50 1.40 1 BOTTOM VIEW 2.23 2.13 2.03 PIN 1 INDICATOR FOR PROPER CONNECTION OF THE EXPOSED PAD, REFER TO THE PIN CONFIGURATION AND FUNCTION DESCRIPTIONS SECTION OF THIS DATA SHEET. Figure 61. 8-Lead Lead Frame Chip Scale Package [LFCSP_VD] 3 mm x 3 mm Body, Very Thin, Dual Lead (CP-8-9) Dimensions shown in millimeters Rev. D | Page 21 of 22 04-06-2012-A 3.25 3.00 SQ 2.75 ADA4610-2/ADA4610-4 Data Sheet 8.75 (0.3445) 8.55 (0.3366) 8 14 1 7 1.27 (0.0500) BSC 0.25 (0.0098) 0.10 (0.0039) COPLANARITY 0.10 0.51 (0.0201) 0.31 (0.0122) 6.20 (0.2441) 5.80 (0.2283) 0.50 (0.0197) 0.25 (0.0098) 1.75 (0.0689) 1.35 (0.0531) SEATING PLANE 45 8 0 0.25 (0.0098) 0.17 (0.0067) 1.27 (0.0500) 0.40 (0.0157) COMPLIANT TO JEDEC STANDARDS MS-012-AB CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. 060606-A 4.00 (0.1575) 3.80 (0.1496) Figure 62. 14-Lead Standard Small Outline Package [SOIC_N] Narrow Body (R-14) Dimensions shown in millimeters and (inches) ORDERING GUIDE Model1 ADA4610-2ACPZ-R7 ADA4610-2ACPZ-RL ADA4610-2ARMZ ADA4610-2ARMZ-R7 ADA4610-2ARMZ-RL ADA4610-2ARZ ADA4610-2ARZ-R7 ADA4610-2ARZ-RL ADA4610-2BRZ ADA4610-2BRZ-R7 ADA4610-2BRZ-RL ADA4610-4ARZ ADA4610-4ARZ-R7 ADA4610-4ARZ-RL 1 Temperature Range -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C Package Description 8-Lead Lead Frame Chip Scale Package [LFCSP_VD] 8-Lead Lead Frame Chip Scale Package [LFCSP_VD] 8-Lead Mini Small Outline Package [MSOP] 8-Lead Mini Small Outline Package [MSOP] 8-Lead Mini Small Outline Package [MSOP] 8-Lead Standard Small Outline Package [SOIC_N] 8-Lead Standard Small Outline Package [SOIC_N] 8-Lead Standard Small Outline Package [SOIC_N] 8-Lead Standard Small Outline Package [SOIC_N] 8-Lead Standard Small Outline Package [SOIC_N] 8-Lead Standard Small Outline Package [SOIC_N] 14-Lead Standard Small Outline Package [SOIC_N] 14-Lead Standard Small Outline Package [SOIC_N] 14-Lead Standard Small Outline Package [SOIC_N] Z = RoHS Compliant Part. (c)2011-2014 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D09646-0-11/14(D) Rev. D | Page 22 of 22 Package Option CP-8-9 CP-8-9 RM-8 RM-8 RM-8 R-8 R-8 R-8 R-8 R-8 R-8 R-14 R-14 R-14 Branding A2U A2U A2U A2U A2U Mouser Electronics Authorized Distributor Click to View Pricing, Inventory, Delivery & Lifecycle Information: Analog Devices Inc.: ADA4610-2ARMZ ADA4610-2ARZ ADA4610-2BRZ ADA4610-2ACPZ-R7 ADA4610-2ACPZ-RL ADA4610-2ARMZR7 ADA4610-2ARMZ-RL ADA4610-2ARZ-R7 ADA4610-2ARZ-RL ADA4610-2BRZ-R7 ADA4610-2BRZ-RL