1
Features
Fast Read Access Time - 70 ns
Dual Voltage Range Operation
Low Voltage Power Supply Range, 3.0V to 3.6V
or Standard 5V ± 10% Supply Range
Compatible with JEDEC Standard AT27C512R
Low Powe r CMOS Operation
20 µA max. (less than 1 µA typical) Standby for VCC = 3.6V
29 mW max. Active at 5 MHz for VCC = 3.6V
JEDEC Standard Packages
32-Lead PLCC
28-Lead 330-mil SOIC
28-Lead TSOP
High Reliability CMOS Technology
2,000V ESD Protection
200 mA Latchup Immunity
Rapid™ Pr o gramm ing Algorith m - 100 µs/b y te (typic al)
CMOS and TTL Compatible Inputs and Outputs
JEDEC Standard for LVTTL
Integrated Product Identification Code
Commercial and Industrial Tempe ra ture Ranges
Description
The AT27LV512A is a high performance, low power, low voltage 524,288-bit one-time
programmable read only memory (OTP EPROM) organized as 64K by 8 bits. It
require s only one su pply in the r ange of 3.0V to 3. 6V in normal r ead mo de o peration ,
making it ideal for fast, portable systems using battery power.
512K (64K x 8)
Low Voltage
OTP EPROM
AT27LV512A
Rev. 0607B–10/98
Pin Configurations
Pin Name Function
A0 - A15 Addresses
O0 - O7 Outputs
CE Chip Enable
OE/VPP Output Enable/
Program Supply
NC No Connect
TSOP Top View
Type 1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
OE/VPP
A11
A9
A8
A13
A14
VCC
A15
A12
A7
A6
A5
A4
A3
A10
CE
O7
O6
O5
O4
O3
GND
O2
O1
O0
A0
A1
A2
PLCC Top View
Note: PLCC P ackage Pins 1 and 17
are DON’T CONNECT.
5
6
7
8
9
10
11
12
13
29
28
27
26
25
24
23
22
21
A6
A5
A4
A3
A2
A1
A0
NC
O0
A8
A9
A11
NC
OE/VPP
A10
CE
O7
O6
4
3
2
1
32
31
30
14
15
16
17
18
19
20
O1
O2
GND
NC
O3
O4
O5
A7
A12
A15
NC
VCC
A14
A13
(continued)
SOIC Top View
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
A15
A12
A7
A6
A5
A4
A3
A2
A1
A0
O0
O1
O2
GND
VCC
A14
A13
A8
A9
A11
OE/VPP
A10
CE
O7
O6
O5
O4
O3
AT27LV512A
2
Atmel’s inno vative design techn iques provide fast sp eeds
that rival 5V par ts while k eeping the low power c onsump-
tion of a 3.3V supply. At VCC = 3.0V, any byte can be
accessed in less than 70 ns. With a typical power dissipa-
tion of only 18 mW at 5 MHz and VCC = 3.3V, the
AT27LV512A consumes less than one fifth the power of a
standard 5V EPROM.
Standby mode supply current is typically less than 1 µA at
3.3V.
The AT27LV512A is availa ble in in dustr y standar d J EDEC-
approved one-time programmable (OTP) plastic PLCC,
SOIC, an d TSOP pac kages. All devices featu re two-line
control (CE, OE) to give designers the flexibility to prevent
bus contention.
The AT27LV512A operating with VCC at 3.0V produces TTL
level outputs that are compatible with standard TTL logic
devices operating at VCC = 5.0V. The device is also capa-
ble of standard 5-volt operation making it ideally suited for
dual supply range systems or card products that are plug-
gable in both 3-volt and 5-volt hosts.
Atmel’s AT27LV512A has additional features to ensure
high qua lity and eff icient p roduc tion us e. The Ra pid™ Pro-
gramming Algorithm reduces the time required to program
the part and guarantees reliable programming. Program-
ming time is typically only 100 µs/byte. The Integrated
Product Identificatio n Code electronically ident ifies the
device and manufacture r. This feature is used by industry
standar d programming equipment to s elect the pr oper pro-
gramm ing algor ithms an d voltag es. The A T27LV51 2A pro-
grams exactly the same way as a standard 5V AT27C512R
and uses the same programming equipment.
System Considerations
Switching between active and standby conditions via the
Chip Enabl e pi n may pr odu ce tra ns ien t vo ltag e ex cu rs ions .
Unless accommodated by the system design, these tran-
sients may exceed data sheet limits, resulting in device
non-c onforman ce. At a mi nimum, a 0. 1 µF high frequency,
low inherent inductance, ceramic capacitor should be uti-
lized for each device. T his capacitor should be connected
between the VCC and Ground terminals of the device, as
close to the device as possible. Additionally, to stabilize the
supply voltage level on printed circuit boards with large
EPROM arrays, a 4.7 µF bulk electrolytic capacitor should
be utilized, again connected between the VCC and Ground
terminals. This capacitor should be positioned as close as
possible to the point where the power supply is connected
to the array.
Bloc k Diagram
AT27LV512A
3
Note: 1. Minimum voltage is -0.6V dc which may undershoot to -2.0V for pulses of less than 20 ns.Maximum output pin voltage is
VCC + 0.75V dc which may be exceeded if certain precautions are observed (consult application notes) and which may
overshoot to +7.0 volts for pulses of less than 20 ns.
Notes: 1. X can be VIL or VIH.
2. R ead, output disable, an d standby modes require, 3.0V VCC 3.6V, or 4.5V VCC 5.5V.
3. R efer to Programming Characteristics. Programming modes require VCC = 6.5V.
4. VH = 12.0 ± 0.5V.
5. Two identifier bytes ma y be selected. All Ai inputs are held low (VIL), e xcept A9 which is set to VH and A0 which is toggled l ow
(VIL) to select the Manufacturer’s Identification byte and high (VIH) to select the Device Code byte.
Absolute Maximum Ratings*
Temperature Under Bias.................................. -40°C to +85°C *NOTICE: Stresses beyond those listed under “Absolute
Maximum Ratings” may cause permanent dam-
age t o the dev ice. T his is a stres s r atin g only an d
functio nal oper a tion of the dev ice at the se or an y
other conditions beyond those indicated in the
operational sections of this specifica tion is not
implied. Exposure to absolute maximum rating
conditions for extended periods may affect
device reli ability
Storage Temperature..................................... -65°C to +125°C
Voltage on Any Pin with
Respect to Ground .........................................-2.0V to +7.0V(1)
Vo ltage on A9 with
Respect to Ground ......................................-2.0V to +14.0V(1)
VPP Supply Voltage with
Respect to Ground .......................................-2.0V to +14.0V(1)
Operating Modes
Mode \ Pin CE OE/VPP Ai VCC Outputs
Read(2) VIL VIL Ai VCC(2) DOUT
Output Disable(2) VIL VIH X(1) VCC(2) High Z
Standby(2) VIH XXV
CC(2) High Z
Rapid Program(3) VIL VPP Ai VCC(3) DIN
PGM Inhibit(3) VIH VPP XV
CC(3) High Z
Product Identification(3)(5) VIL VIL
A9 = VH(4)
A0 = VIH or VIL
A1 - A15 = VIL
VCC(3) Identification Code
AT27LV512A
4
Notes: 1. VCC must be applied simultaneously with or before OE/VPP
, and removed simultaneously with or after OE/VPP
.
2. OE/VPP ma y be conne cted di rectly to VCC, exce pt during progr amm ing. Th e supp ly curre nt w ould th en be th e sum o f ICC an d
IPP
.
DC and AC Operating Conditions for Read Operation
AT27LV512A
-70 -90 -12 -15
Operating Temperature
(Case) Com. 0°C - 70°C 0°C - 70°C 0°C - 70°C 0°C - 70°C
Ind. -40°C - 85°C -40°C - 85°C -40°C - 85°C -40°C - 85°C
VCC Power Supply 3.0V to 3.6V 3.0V to 3.6V 3.0V to 3.6V 3.0V to 3.6V
5V ± 10% 5V ± 10% 5V ± 10% 5V ± 10%
DC and Operating Characteristics for Read Operation
Symbol Parameter Condition Min Max Units
VCC = 3.0V to 3.6V
ILI Input Load Current VIN = 0V to VCC ±1µA
ILO Output Leakage Current VOUT = 0V to VCC ±5µA
IPP1(2) VPP(1) Read/Standby Current VPP = VCC 10 µA
ISB VCC(1) Standby Current ISB1 (CMOS), CE = VCC ± 0.3V 20 µA
ISB2 (TTL), CE = 2.0 to VCC + 0.5V 100 µA
ICC VCC Active Current f = 5 MHz, IOUT = 0 mA, CE = VIL 8mA
V
IL Input Low Voltage -0.6 0.8 V
VIH Input High Voltage 2.0 VCC + 0.5 V
VOL Outp ut Low Voltage IOL = 2.0 mA 0.4 V
VOH Output High Voltage IOH = -2.0 mA 2.4 V
VCC = 4.5V to 5.5V
ILI Input Load Current VIN = 0V to VCC ±1µA
ILO Output Leakage Current VOUT = 0V to VCC ±5µA
IPP1(2) VPP(1) Read/Standby Current VPP = VCC 10 µA
ISB VCC(1) Standby Current ISB1 (CMOS), CE = VCC ± 0.3V 100 µA
ISB2 (TTL), CE = 2.0 to VCC + 0.5V 1 mA
ICC VCC Active Current f = 5 MHz, IOUT = 0 mA, CE = VIL 20 mA
VIL Input Low Voltage -0.6 0.8 V
VIH Input High Voltage 2.0 VCC + 0.5 V
VOL Outp ut Low Voltage IOL = 2.1 mA 0.4 V
VOH Output High Voltage IOH = -400 µA2.4V
AT27LV512A
5
AC Waveforms for Read Operation(1)
Notes: 1. Timing measurement references are 0.8V and 2.0V. Input AC drive levels are 0.45V and 2.4V, unless otherwise specified.
2. OE/VPP may be delayed up to tCE - tOE after the falling edge of CE without impact on tCE.
3. OE/VPP may be delayed up to tACC - tOE after the address is valid without impact on tACC.
4. This parameter is only sampled and is not 100% tested.
5. Output float is defined as the point when data is no longer driven.
AC Characteristics for Read Operation
VCC = 3.0V to 3.6V and 4.5V to 5.5V
AT27LV512A
UnitsSymbol Parameter Condition
-70 -90 -12 -15
Min Max Min Max Min Max Min Max
tACC(3) Address to Output Delay CE = OE/VPP = VIL 70 90 120 150 ns
tCE(2) CE to Output Delay OE/VPP = VIL 70 90 120 150 ns
tOE(2)(3) OE/VPP to Output Delay CE = VIL 40 50 50 60 ns
tDF(4)(5) OE/VPP or CE High to
Output Float, whichever
occurred first 35 40 40 50 ns
tOH
Output Hold from Address,
CE or OE/VPP
, whichever
occurred first 0000ns
AT27LV512A
6
Input Test Waveforms and
Measurement Levels Output Test Load
Note: 1. Typical values for nominal supply voltage. This parameter is only sampled and is not 100% tested.
tR, tF < 20 ns (10% to 90%)
Note: CL = 100 pF including
jig capacitance.
Pin Capacitance
f = 1 MHz, T = 2 5°C(1)
Symbol Typ Max Units Conditions
CIN 46pFV
IN = 0V
COUT 812pFV
OUT = 0V
AT27LV512A
7
Programming Waveforms(1)
Notes: 1. The Input Timing Reference is 0.8V for VIL and 2.0V for VIH.
2. tOE and tDFP are characteristics of the device but must be accommodated by the programmer.
DC Pr ogramming Characteristics
TA = 25 ± 5°C, VCC = 6.5 ± 0.25V, OE/VPP = 13.0 ± 0.25V
Symbol Parameter Test Conditions
Limits
UnitsMin Max
ILI Input Load Current VIN = VIL, VIH 10 µA
VIL Input Low Level -0.6 0.8 V
VIH Input High Level 2.0 VCC + 0.5 V
VOL Output Lo w Voltage IOL = 2.1 mA 0.4 V
VOH Output High Voltage IOH = -400 µA 2.4 V
ICC2 VCC Supply Current (Program and Ve rify) 25 mA
IPP2 OE/VPP Current CE = VIL 25 mA
VID A9 Product Identification Voltage 11.5 12.5 V
AT27LV512A
8
Notes: 1. VCC must be applied simultaneously or before OE/VPP and removed simultaneously or after OE/VPP
.
2. This para meter i s only sample d and i s not 1 00% te sted. O utput Flo at is defi ned as the po int wh ere dat a is no longe r driv en—
see timing diagram.
3. Program Pulse width tolerance is 100 µsec ± 5%.
Note: 1. The AT27LV512A has the same Product Identification Code as the AT27C512R. Both are programming compatible.
AC Programming Characteristics
TA = 25 ± 5°C, VCC = 6.5 ± 0.25V, OE/VPP = 13.0 ± 0.25V
Symbol Parameter Test Conditions(1)
Limits
UnitsMin Max
tAS Address Setup Time
Input Rise and Fall Times:
(10% to 90%) 20 ns
Input Pulse Levels: 0.45V to 2.4V
Input Timing Reference Level:
0.8V to 2.0 V
Output Timing Reference Level:
0.8V to 2.0 V
2µs
tOES OE/VPP Setup Time 2 µs
tOEH OE/VPP Hold Time 2 µs
tDS Data Setup Time 2 µs
tAH Address Hold Time 0 µs
tDH Data Hold Time 2 µs
tDFP CE High to Output Float Delay(2) 0 130 ns
tVCS VCC Setup Time 2 µs
tPW CE Program Pulse Width(3) 95 105 µs
tDV Data Valid from CE(2) 1µs
tVR OE/VPP Recovery Time 2 µs
tPRT OE/VPP Pulse Rise Time During
Programming 50 ns
Atmel’s 27LV512A Integrated Product Identification Code(1)
Codes
Pins Hex
DataA0 O7 O6 O5 O4 O3 O2 O1 O0
Manufacturer 0000111101E
Device Type 1000001010D
AT27LV512A
9
Rapid Programming Algorithm
A 100 µs C E pulse width is used to program. The address
is set to th e f irst locatio n. VCC is rais ed to 6 .5V an d O E /VPP
is raised to 13.0V. Each address is fi rst programmed wi th
one 100 µs CE pulse witho ut verificati on. Then a verifica-
tion / r eprogr ammi ng lo op is exec uted fo r each a ddress. In
the event a byte fails to pass verification, up to 10 succes-
sive 100 µs pulses are applied with a verification after each
pulse. If the byte fails to verify after 10 pulses have been
applied, th e par t is c on sider e d f ail ed . A fter the byte verif ies
properly, the next address is selected until all have been
checked. OE/VPP is then lowered to VIL and VCC to 5. 0V . All
bytes are read again and compared with the original data to
determine if the device passes or fails.
AT27LV512A
10
Ordering Information
tACC
(ns)
ICC (mA)
Ordering Code Package Operation RangeActive Standby
70 8 0.02 AT27LV512A-70JC
AT27LV512A-70RC
AT27LV512A-70TC
32J
28R
28T
Commercial
(0°C to 70°C)
8 0.02 AT27LV512A-70JI
AT27LV512A-70RI
AT27LV512A-70TI
32J
28R
28T
Industrial
(-40°C to 85°C)
90 8 0.02 AT27LV512A-90JC
AT27LV512A-90RC
AT27LV512A-90TC
32J
28R
28T
Commercial
(0°C to 70°C)
8 0.02 AT27LV512A-90JI
AT27LV512A-90RI
AT27LV512A-90TI
32J
28R
28T
Industrial
(-40°C to 85°C)
120 8 0.02 AT27LV512A-12JC
AT27LV512A-12RC
AT27LV512A-12TC
32J
28R
28T
Commercial
(0°C to 70°C)
8 0.02 AT27LV512A-12JI
AT27LV512A-12RI
AT27LV512A-12TI
32J
28R
28T
Industrial
(-40°C to 85°C)
150 8 0.02 AT27LV512A-15JC
AT27LV512A-15RC
AT27LV512A-15TC
32J
28R
28T
Commercial
(0°C to 70°C)
8 0.02 AT27LV512A-15JI
AT27LV512A-15RI
AT27LV512A-15TI
32J
28R
28T
Industrial
(-40°C to 85°C)
Package Type
32J 32-Lead, Plastic J-Leaded Chip Carrier (PLCC)
28R 28-Lead, 0.330" Wide, Plastic Gull Wing Small Outline (SOIC)
28T 28-Lead, Thin Small Outline Package (TSOP)
AT27LV512A
11
Packaging Information
.045(1.14) X 45˚ PIN NO. 1
IDENTIFY .025(.635) X 30˚ - 45˚
.012(.305)
.008(.203)
.021(.533)
.013(.330)
.530(13.5)
.490(12.4)
.030(.762)
.015(.381)
.095(2.41)
.060(1.52)
.140(3.56)
.120(3.05)
.032(.813)
.026(.660)
.050(1.27) TYP
.553(14.0)
.547(13.9)
.595(15.1)
.585(14.9)
.300(7.62) REF
.430(10.9)
.390(9.90)
AT CONTACT
POINTS
.022(.559) X 45˚ MAX (3X)
.453(11.5)
.447(11.4)
.495(12.6)
.485(12.3)
*Controlling dimension: millimeters
INDEX
MARK
AREA
0.55 (0.022)
BSC
0.20 (0.008)
0.10 (0.004)
7.15 (0.281)
REF
8.10 (0.319)
7.90 (0.311) 1.25 (0.049)
1.05 (0.041)
0.27 (0.011)
0.18 (0.007)
11.9 (0.469)
11.7 (0.461) 13.7 (0.539)
13.1 (0.516)
0
50.20 (0.008)
0.15 (0.006)
REF
0.70 (0.028)
0.30 (0.012)
32J, 32-Lead, Plastic J-Leaded Chip Carrier (PLCC)
Dimensions in Inches and (Millimeters)
JEDEC STANDARD MS-016 AE
28R, 28-Lead, 0.330" Wide, Plastic Gull Wing Small
Outline (SOIC)
Dimensions in Inches and (Millimeters)
28T, 28-Lead, Plastic Thin Small Outline Package
(TSOP)
Dimensions in Millimeters and (Inches)*
© Atmel Corporation 1998.
Atmel Corporation makes no warranty for the use of its products, other than those expressly contained in the Company’s standard war-
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Terms and product names in this document may be trademarks of others.
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Printed on recycled paper.
0607B–10/98/xM