NCV7441D20R2G - ON SEMICONDUCTOR - Datasheet.Directory

August, 2011 − Rev. 0

1Publication Order Number:

NCV7441/D

NCV7441

Dual High Speed Low

Power CAN Transceiver

The NCV7441, dual CAN transceiver offers two fully independent

high−speed CAN transceivers which can be individually connected to

two CAN protocol controllers. The CAN channels can be separately

put to normal or to standby mode, in which remote wakeup detection

from the bus is possible.

Due to the shared auxiliary circuitry and common package, this

circuit version can replace two standard high−speed CAN transceivers

while saving board space.

Features

•Compatible with the ISO 11898 Standard (ISO 11898−2, ISO

11898−5 and SAE J2284)

•Low Quiescent Current

•High Speed (up to 1 Mbps)

•Ideally Suited for 12 V and 24 V Industrial and Automotive

Applications

•Extremely Low Current Standby Mode with Wakeup Via the Bus

•Low EME without Common−mode Choke

•No Disturbance of the Bus Lines with an Un−powered Node

•Predictable Behavior Under All Supply Circumstances

•Transmit Data (TxD) Dominant Time−out Function

•Thermal Protection

•Bus Pins Protected Against Transients in an Automotive

Environment

•Power Down Mode in Which the Transmitter is Disabled

•Bus and VSPLIT Pins Short Circuit Proof to Supply Voltage and

Ground

•Input Logic Levels Compatible with 3.3 V Devices

•Up to 110 Nodes can be Connected to the Same Bus in Function of

Topology

•Pb−Free Packages are Available

Typical Applications

•Automotive

•Industrial Networks

MARKING

DIAGRAM

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See detailed ordering and shipping information in the

package dimensions section on page 9 of this data sheet.

ORDERING INFORMATION

SOIC−14 NB

CASE 751A

NCV7441−0

AWLYWWG

XXXXX = Specific Device Code

A = Assembly Location

WL = Wafer Lot

Y = Year

WW = Work Week

G = Pb−Free Package

TxD1

RxD1

GND

VCC

GND

RxD2

TxD2

STB1

CANH1

CANL1

TEST/GND

CANH2

CANL2

STB2

PIN CONNECTIONS

NCV7441

Dual CAN

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BLOCK DIAGRAM

STB1

TxD1

RxD1

GND

CANH2

CANL2

CHANNEL 2

CONTROL LOGIC

Transmitter

Receiver

Low−power

receiver

NCV7441

Dual CAN

CANH1

CANL1

CHANNEL 1

CONTROL LOGIC

Transmitter

Receiver

Low−power

receiver

STB2

TxD2

RxD2

SUPPLY

MONITOR

THERMAL

MONITOR

PD20100615.01

TEST/

GND

Figure 1. NCV7441 Dual CAN: Block Diagram

VCC VCC

VCC

VCC VCC

Table 1. PIN FUNCTION DESCRIPTION

Number

Name Pin Type Description

1 TxD1 digital input;

internal pull−up

transmit data for the 1st CAN channel in normal mode; ignored in standby

mode

2 RxD1 digital output received data from the 1st CAN channel in normal mode; 1st CAN channel

remote wakeup indication in standby mode

3 GND ground ground connection

4 VCC supply input 5 V supply connection

5 GND ground ground connection

6 RxD2 digital output received data from the 2nd CAN channel; 2nd CAN channel remote wakeup

indication in standby mode

7 TxD2 digital input;

internal pull−up

transmit data for the 2nd CAN channel

8 STB2 digital input;

internal pull−up

mode control input for the 2nd CAN channel; STB2 = High puts the 2nd CAN

channel into standby mode

9 CANL2 high−voltage analog

input/output

CANL−wire connection of the 2nd CAN channel

10 CANH2 high−voltage analog

input/output

CANH−wire connection of the 2nd CAN channel

11 TEST /

GND

test/ground The pin is used for test purposes during device production. It’s recommended

to connect to ground in the end−application.

12 CANL1 high−voltage analog

input/output

CANL−wire connection of the 1st CAN channel

13 CANH1 high−voltage analog

input/output

CANH−wire connection of the 1st CAN channel

14 STB1 digital input;

internal pull−up

mode control input for the 1st CAN channel;

STB1 = High puts the 1st CAN channel into standby mode

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TYPICAL APPLICATION DIAGRAM

NCV7441−0

Dual CAN

CANH1

CANL1

CANH2

CANL2

GND

STB1

TxD1

RxD1

STB2

TxD2

RxD2

CAN1

CAN2

LDO

VBAT

PD20100615.03

MCU + CAN ctrl.

GND TEST/

GND

Figure 2. NCV7441 Dual CAN: Example Application Diagram

VCC

FUNCTIONAL DESCRIPTION

Dual CAN device behaves identically to two independent CAN transceivers. The representative signal dependencies are

shown in Figure 4 and further functional description is given in Table 2.

Table 2. FUNCTIONAL DESCRIPTION

VCC STB1/2 TxD1/2 RxD1/2 Transceiver on CANH1/2/CANL1/2 Comment

< VCC_UV X X HZ Deactivated; unbiased The entire chip in

under−voltage

> VCC_UV High X Low−power receiver

output

Transmitter deactivated;

Bus biased to GND through the input circuitry;

Receiver monitoring CAN1/2 wakeup

CAN1/2 in standby

mode

Low High Indicates the signal

received on CAN1/2

Recessive signal transmitted on CAN1/2;

Bus biased to VCC/2 through the input circuitry

CAN1/2 in normal

mode

Low Low Dominant signal transmitted on CAN1/2;

Bus biased to VCC/2 through the input circuitry

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If the main power supply VCC (nominal 5 V) is above its under−voltage (VCC_UV) level, each CAN channel can enter either

normal mode (when the corresponding STB1/2 digital input is pulled Low) or standby mode (when the corresponding STB1/2

signal is left High):

•In the normal mode:

♦The bus transceiver is ready to transmit and receive CAN bus signals with the full CAN communication speed (up to

1 Mbps) and thus interconnect the CAN bus with the corresponding CAN controller through digital pins TxD1/2 and

RxD1/2

♦The bus pins are internally biased to typically VCC/2 through the input circuitry

♦TxD1/2 input pin is monitored by a timeout in order to prevent a permanent dominant being forced to the bus thus

preventing other nodes from communicating. If TxD1/2 is Low for longer than tcnt(timeout), the transmitter switches

back to recessive. Only when TxD1/2 returns to High, the timeout counter is reset and the transmitter is ready to

transmit dominant symbols again. The TxD1/2 timeout protection is implemented individually for both CAN

transceivers.

♦A common thermal monitoring circuit compares the circuit junction temperatures with threshold TJ(sd). If the thermal

shutdown level is exceeded, dominant transmission is disabled. The circuit remains biased and ready to transmit but

the logical path from TxD1/2 pin(s) is blocked. The transmission is again enabled when the junction temperature

decreases below the shutdown level and the TxD1/2 pin returns to the High level, thus avoiding thermal oscillations.

•In the standby mode:

♦The respective transmitter is disabled and the current consumption of the channel is fundamentally reduced. Only the

low−power receiver on the channel remains active in order to detect potential CAN bus wakeups. The logical signal

on TxD1/2 input is ignored.

♦The bus pins are biased to GND through the input circuitry

♦Digital output RxD1/2 signals the output of the low−power receiver and can be used as a wakeup signal in the

application. A filtering time tdBUS is applied between the bus activity and the RxD1/2 signal in order to ensure that

only sufficiently long dominant signals on the bus will be propagated to the digital output. In addition, dominant bus

signals are ignored in case they were present during normal−to−standby mode transition; in this way unwanted

wakeups are avoided in case of permanent dominant failure on the bus. Example waveforms illustrating bus activity

detection in standby mode are shown in Figure 3.

In order to ensure a safe device state, the digital inputs STB1/2 and TxD1/2 are connected through internal pull−up resistors

to VCC thus ensuring that both channels remain in standby mode and/or no dominant can be transmitted in case any of the digital

inputs gets disconnected.

PD20100209.08

STB1

STB2

RxD1

RxD2

CANH/L1

CANH/L2

dbus w tdbus <t

dbus

w tdbus

dbus w tdbus

Figure 3. NCV7441 Dual CAN: Bus Activity Detection in Standby Mode

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PD20100209.03

Legend: re ceive d

domina nt

transmitted

dominant

STB1

STB2

TxD1

TxD2

RxD1

RxD2

CANH/L1

CANH/L2

Re mo te

wakeup

Re mo te

wakeup

Figure 4. NCV7441 Dual CAN: Functional Graphs

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Table 3. ABSOLUTE MAXIMUM RATINGS

Symbol Parameter Min Max Unit

Vmax_VCC Supply voltage −0.3 6 V

Vmax_digIn Voltage at digital inputs. TxD1, TxD2, STB1, STB2 −0.3 6 V

Vmax_digOut Voltage at digital outputs. RxD1, RxD2, TEST/GND −0.3 (VCC

+ 0.3)

Vmax_CANH1/2 Voltage on CANH1/2 pin; no time limit −50 +50 V

Vmax_CANL1/2 Voltage on CANL1/2 pin ; no time limit −50 +50 V

Vmax_diffCAN Absolute voltage difference between CAN pins: |V(CANH1)−V(CANL1)|;

|V(CANH2)−V(CANL2)|

0 50 V

TJ(max) Junction temperature −40 170 °C

ESD System ESD on CANH1/2 and CANL1/2 as per IEC 61000−4−2: 330 W / 150 pF −8 8 kV

Human body model on CANH1/2 and CANL1/2 as per JESD22−A114 / AEC−

Q100−002

−8 8 kV

Human body model on other pins as per JESD22−A114 / AEC−Q100−002 −4 4 kV

Charge device model on all pins as per JESD22−C101 / AEC−Q100−011 −500 500 V

Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the

Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect

device reliability.

Table 4. OPERATING RANGES

Symbol Parameter Min Max Unit

Vop_VCC Supply voltage 4.75 5.25 V

Vop_digIn Voltage at digital inputs. Dual CAN: TxD1, TxD2, STB1, STB2 0 VCC V

Vop_digOut Voltage at digital outputs. RxD1, RxD2 0 VCC V

Vop_CANH1/2 Voltage on CANH1/2 pin

Guaranteed receiver function

−35 35 V

Vop_CANL1/2 Voltage on CANL1/2 pin

Guaranteed receiver function

35 35 V

Vop_diffCAN Absolute voltage difference between CAN pins:

|V(CANH1) − V(CANL1)|; |V(CANH2) − V(CANL2)|

Guaranteed receiver function

0 35 V

TJ_op Junction temperature −40 150 °C

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Table 5. ELECTRICAL CHARACTERISTICS

The characteristics defined in this section are guaranteed within the operating ranges listed in Figure 4, unless stated otherwise. Positive

currents flow into the respective pin.

Symbol Parameter Conditions Min Typ Max Unit

VCC SUPPLY ELECTRICAL CHARACTERISTICS

VCC_UV VCC under voltage level 2.5 3.5 4.5 V

IVCC_stdby VCC consumption Both channels in standby mode;

no wakeup detected;

both buses recessive

TxD1 = TxD2 = High

20 30 mA

IVCC_norm1 One channel in normal mode;

TxD1 = TxD2 = High

3 5 11 mA

IVCC_norm2 Both channels in normal mode;

TxD1 = TxD2 = High

6 10 20 mA

DIGITAL INPUTS ELECTRICAL CHARACTERISTICS – PINS TxD1, TxD2

VTxX_L Low level input voltage −0.3 0.8 V

VTxX_H High level input voltage 2 VCC +

0.3

ITxX_L Low level input current VCC = 5 V

V(TxX) = GND

−75 −200 −350 mA

ITxX_H High level input current VCC = 0 ... 5.25 V

V(TxX) = 5 V

−0.5 0.5 mA

DIGITAL INPUTS ELECTRICAL CHARACTERISTICS – PINS STB1, STB2

VSTBX_L Low level input voltage −0.3 0.8 V

VSTBX_H High level input voltage 2 VCC +

0.3

ISTBX_L Low level input current VCC = 5 V

V(STBX) = GND

−1−4−10 mA

ISTBX_H High level input current VCC = 0 ... 5.25 V

V(STBX) = 5 V

−0.5 0.5 mA

DIGITAL OUTPUTS ELECTRICAL CHARACTERISTICS – PINS RxD1, RxD2

IdigOut_L Output current at Low out-

put level

V(digOut) = 0.4 V 2 6 12 mA

IdigOut_H Output current at High out-

put level

at least one channel enabled

V(digOut) = VCC − 0.4 V

−0.1 −0.4 −1 mA

VdigOut_stdby Output level in standby

mode

both channels in standby;

I(digOut) = −100 mA

VCC −

1.1

VCC −

0.7

VCC −

0.4

IdigOut_HZ Output current in High−im-

pedance state

during VCC undervoltage;

V(digOut) = 0 V ... VCC

−2 0 2 mA

CAN TRANSMITTER CHARACTERISTICS

Vo(reces)(CANH1/2) recessive bus voltage at

pin CANH1/2

VTxD1/2 = VCC;

no load on the bus, normal mode

2.0 2.5 3.0 V

no load on the bus;

standby mode

−0.1 0 0.1

Vo(reces)(CANL1/2) recessive bus voltage at

pin CANL1/2

VTxD1/2 = VCC;

no load on the bus, normal mode

2.0 2.5 3.0 V

no load on the bus;

standby mode

−0.1 0 0.1

Io(reces)(CANH1/2) recessive output current at

pin CANH1/2

−35 V < VCANH1/2 < 35 V;

0 V < VCC < 5.25 V

−2.5 −2.5 mA

Io(reces)(CANL1/2) recessive output current at

pin CANL1/2

−35 V < VCANL1/2 < 35 V;

0 V < VCC < 5.25 V

−2.5 −2.5 mA

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Table 5. ELECTRICAL CHARACTERISTICS

The characteristics defined in this section are guaranteed within the operating ranges listed in Figure 4, unless stated otherwise. Positive

currents flow into the respective pin.

Symbol UnitMaxTypMinConditionsParameter

CAN TRANSMITTER CHARACTERISTICS

Vo(dom)(CANH1/2) dominant output voltage at

pin CANH1/2

VTXD1/2 = 0 V 3.0 3.6 4.25 V

Vo(dom)(CANL1/2) dominant output voltage at

pin CANL1/2

VTXD1/2 = 0 V 0.5 1.4 1.75 V

Vo(dif)(BUS_dom) differential bus output

voltage

(VCANH1/2 – VCANL1/2)

VTXD1/2 = 0 V, dominant;

bus differential load:

42.5 W < RL < 60 W

1.5 2.25 3.0 V

Vo(dif)(BUS_rec) differential bus output

voltage

(VCANH1/2 – VCANL1/2)

VTXD1/2 = VCC

Recessive,

no load on the bus

−120 0 50 mV

Io(SC)(CANH1/2) short−circuit output current

at pin CANH1/2

VCANH1/2 = 0 V,

VTXD1/2 = 0 V

−100 −70 −45 mA

Io(SC)(CANL1/2) short−circuit output current

at pin CANL1/2

VCANL1/2= 36 V,

VTXD1/2 = 0 V

45 70 100 mA

CAN RECEIVER AND CAN PINS ELECTRICAL CHARACTERISTICS

Vi(dif)(th) Differential receiver

threshold voltage

normal mode

−12 V < VCANH1/2 < 12 V

−12 V < VCANL1/2 < 12 V

0.5 0.7 0.9 V

standby mode

−12 V < VCANH1/2 < 12 V

−12 V < VCANL1/2 < 12 V

0.4 0.8 1.15

Vihcm(dif)(th) Differential receiver

threshold voltage for high

common mode

normal mode

−35 V < VCANH1/2 < 35 V

−35 V < VCANL1/2 < 35 V

0.4 0.7 1 V

Vihcm(dif)(hys) Differential receiver input

voltage hysteresis for high

common mode

normal mode

−35 V < VCANH1/2 < 35 V

−35 V < VCANL1/2 < 35 V

20 70 100 mV

Ri(cm)CANH1/2 Common mode input res-

istance at pin CANH1/2

15 26 37 kW

Ri(cm)CANL1/2 Common mode input res-

istance at pin CANL1/2

15 26 37 kW

Ri(cm)(m) Matching between pin

CANH1/2 and pin

CANL1/2 common mode

input resistance

VCANH1/2= VCANL1/2 −3 0 3 %

Ri(dif) Differential input resist-

ance

25 50 75 kW

CI(CANH1/2) input capacitance at pin

CANH1/2

VTxD1/2 = VCC

not tested in production

−7.5 20 pF

CI(CANL1/2) input capacitance at pin

CANL1/2

VTxD1/2 = VCC

not tested in production

−7.5 20 pF

CI(dif) differential input capacit-

ance

VTxD1/2 = VCC

not tested in production

−3.75 10 pF

ILICANH1/2 Input leakage current to

pin CANH1/2

VCC = 0 V;

VCANL1/2 = VCANH1/2 = 5 V

−10 0 10 mA

ILICANL1/2 Input leakage current to

pin CANL1/2

VCC = 0 V;

VCANL1/2 = VCANH1/2 = 5 V

−10 0 10 mA

THERMAL MONITORING ELECTRICAL CHARACTERISTICS

TJ(sd) Thermal shutdown

threshold

Junction temperature rising 150 185 °C

Junction temperature falling 145 °C

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Table 5. ELECTRICAL CHARACTERISTICS

The characteristics defined in this section are guaranteed within the operating ranges listed in Figure 4, unless stated otherwise. Positive

currents flow into the respective pin.

Symbol UnitMaxTypMinConditionsParameter

DYNAMIC ELECTRICAL CHARACTERISTICS

td(TXD1/2−BUSOn) delay TxD1/2 to CAN1/2

bus active

bus differential load 100 pF/60 W20 85 120 ns

td(TXD1/2−BUSOff) delay TxD1/2 to CAN1/2

bus inactive

bus differential load 100 pF/60 W30 105 ns

td(BUSOn−RXD1/2) delay CAN1/2 bus active

to RxD1/2

CRxD1/2 = 15 pF 25 55 105 ns

td(BUSOff−RX0) delay CAN1/2 bus inactive

to RxD1/2

CRxD1/2 = 15 pF 30 100 105 ns

tdPD(TXD1/2−RXD1/2)dr propagation delay TxD1/2

to RxD1/2;

dominant−to−recessive

bus differential load 100 pF/60 W30 245 ns

tdPD(TXD1/2−RXD1/2)rd propagation delay TxD1/2

to RxD1/2;

recessive−to−dominant

bus differential load 100 pF/60 W75 230 ns

tdBUS low−power receiver filter-

ing time

standby mode

Vdif(dom) > 1.4 V

0.5 2.5 5 ms

standby mode

Vdif(dom) > 1.2 V

0.5 3 5.8

tdWAKE delay to flag bus wakeup;

time from CAN bus domin-

ant start to RxDx falling

edge

standby mode; dominant longer than

tdBUS

10 ms

td(nrm−stb) transition delay from

STB1/2 rising edge to

CAN1/2 standby mode

10 ms

td(stb−nrm) transition delay from

STB1/2 falling edge to

CAN1/2 normal mode

10 ms

tcnt(timeout) TxD1/2 dominant time out VTXD1/2 = 0 V 300 650 1000 ms

IdigOut_HZ Output current in High−im-

pedance state

pins RxD1,2 during VCC under−voltage;

V(digOut) = 0 V ... VCC

−2 0 2 mA

ORDERING INFORMATION

Device Description Temperature Range Package Shipping†

NCV7441D20G Dual HS−CAN Transceiver *40°C to 125°C SOIC−14

(Pb−Free)

55 Tube / Tray

NCV7441D20R2G 3000 / Tape & Reel

†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging

Specifications Brochure, BRD8011/D.

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PACKAGE DIMENSIONS

SOIC−14 NB

CASE 751A−03

ISSUE K

NOTES:

1. DIMENSIONING AND TOLERANCING PER

ASME Y14.5M, 1994.

2. CONTROLLING DIMENSION: MILLIMETERS.

3. DIMENSION b DOES NOT INCLUDE DAMBAR

PROTRUSION. ALLOWABLE PROTRUSION

SHALL BE 0.13 TOTAL IN EXCESS OF AT

MAXIMUM MATERIAL CONDITION.

4. DIMENSIONS D AND E DO NOT INCLUDE

MOLD PROTRUSIONS.

5. MAXIMUM MOLD PROTRUSION 0.15 PER

SIDE.

14 8

0.25 B M

X 45

SEATING

PLANE

0.25 B S

13X

DETAIL A

DIM MIN MAX MIN MAX

INCHESMILLIMETERS

D8.55 8.75 0.337 0.344

E3.80 4.00 0.150 0.157

A1.35 1.75 0.054 0.068

b0.35 0.49 0.014 0.019

L0.40 1.25 0.016 0.049

e1.27 BSC 0.050 BSC

A3 0.19 0.25 0.008 0.010

A1 0.10 0.25 0.004 0.010

M0 7 0 7

H5.80 6.20 0.228 0.244

h0.25 0.50 0.010 0.019

__ __

6.50

14X

0.58

14X

1.18

1.27

DIMENSIONS: MILLIMETERS

PITCH

SOLDERING FOOTPRINT*

*For additional information on our Pb−Free strategy and soldering

details, please download the ON Semiconductor Soldering and

Mounting Techniques Reference Manual, SOLDERRM/D.

ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice

to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability

arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.

“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All

operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights

nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications

intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should

Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,

and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death

associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal

Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.

PUBLICATION ORDERING INFORMATION

N. American Technical Support: 800−282−9855 Toll Free

USA/Canada

Europe, Middle East and Africa Technical Support:

Phone: 421 33 790 2910

Japan Customer Focus Center

Phone: 81−3−5773−3850

NCV7441/D

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