0S2280/DS2281 DALLAS SEMICONDUCTOR DS2280/DS2281 T1 Line Card Stik CEPT Line Card Stik FEATURES * Pretesied, snap-in T1 or CEPT line card * DS2280 T1 Line Card DS2281-075 75 ohm CEPT Line Card DS$2281-120 120 ohm CEPT Line Card * Consumes only 2 square inches or board space Performs four functions: line interface framing monitoring buffering * DS2280 and DS2281 share the same pinout * Includes line interface transformers and termination resistors * Connects to both 1.544 MHz and 2.048 MHz back- planes * Operates off a single +5V supply DESCRIPTION The DS2280 and DS2281 are T1 and CEPT line cards that consume only two square inches of printed circuit board space. The cards are designed to plug into stan- dard 68pin single in-line connectors. They have been arranged for maximum flexibility and contain all the nec- essary hardware to connect directly to either Tt, CEPT 75 ohms lines, or CEPT 120 ohm lines. The line inter- face function is performed by the DS2187 and DS2186. MB 2614130 OO08b47? 24) mm PIN ASSIGNMENT O DS2175 DS2180A DS2181A XFMR DS2186 DS2187 68 The monitoring and framing functions are performed by the DS2180A on the DS2280 and by the DS2181A on the DS2281. The buffering function is handled by the DS2175. The DS2280 and DS2281 provide all standard alarm indications as well as two different levels of carrier loss (32 zero and 192 zero). They also provide indica- tion of frame errors, CRC6 or CRC-4 errors, and bipo- lar violations. 031594 1/12 466 Copyright 1993 Dallas Semiconductor Corporation Printed in U.S.A,OVERVIEW The DS2280 contains four of Dallas Semiconductors T1 integrated circuits: the DS2187 Receive Line Inter- face, the DS2186 Transmit Line Interface, the DS2180A T1 Transceiver, and the DS2175 Elastic Store. The DS2281 replaces the DS2180A with the DS2181A CEPT Transceiver. The operational specifics of each of these devices can be found in their individual data sheets. On the Line Card Stiks, the DS2187 connects to the receive signal through a 1:2 transformer. On the DS2280, the T1 line is properly terminated by two 200ohm resistors (R1 and R2}. On the DS2281-075, R1 and R2 are set to 150 ohms so that the CEPT lines can be properly terminated at 75 ohms. And on the DS2281-120, R1 and R2 are set at 240 ohms. The DS2187 recovers clock and data from the T1 or CEPT line and provides it to the DS2180A or DS2181A. The transceiver frames to the incoming data stream and pro- vides status information on the received data. The DS2180A and DS2181A transceivers can be used in ei- ther the software or hardware modes. In the software mode, an external controller is used to access a set of internal registers via a serial port. These registers are used to configure the device and to retrieve monitoring information. In the hardware mode, the Stiks can be used without an external controller. In this mode, the se- rial port pins are redefined as device configuration pins. Please consult the DS2180A and DS2181A data sheets for full details on both the software and hardware modes. The DS2280 and DS2281 also contain an elastic store, the DS2175. The DS2175 can perform two functions. First, it can be used to absorb clock rate and phase dif- ferences between the clock recovered by the DS2187 and a system backplane clock. It can also be used to DS2280/DS2281 connect the DS2280 to 2.048 MHz backplanes or to connect the DS2281 to 1.544 MHz backplanes. The DS2187, DS2180A, and DS2175 form the receive section of the DS2280. On the DS2281, the receive section is formed by the DS2187, DS2181A, and DS2175. The transmit section of the DS2280 and DS2181 is formed by the transceiver and the transmit line interface, the DS2186. Datathatis to be transmitted onto the transmit T1 twisted wire pair or CEPT lines is clocked into the DS2180A or DS2181A transceivers via the transmit clock (TCLK). The transceivers format the data stream and add any additional information (signal- ing, CRC-6 or CRC-+4, etc.) that might be necessary. The transceiver also transforms the data stream froma unipolar to a bipolar format and, if selected, it will per- form B8ZS or HDB3 encoding. Bipolar data from the DS2180A or DS2181A is clocked into the DS2186 where it is level shifted and driven onto the transmit T1 twisted pair or CEPT line via a 1:1.4 transformer. On the DS2280, the waveshape of the transmitted pulses is se- lected via the line build out pins, LENO to LEN2. Asche- matic of the DS2280 is shown in Figure 1 and a sche- matic of the DS2281 is shown in Figure 2. The DS2280 and DS2281 are arranged for maximum flexibility. One possible configuration for each is shown in Figures 3 and 4. The DS2280 and DS2281 are designed to connect into a standard 68-pin single in-line connector with a pin spacing pitch of 0.050 inches. Both inclined and vertical connectors are available from connector vendors such as AMP. Aright angle connector will be offered by AMP in the near future. Table 1 lists a set of suitable connec- tors from AMPs MicroEdge line. 68 PIN CONNECTORS FOR DS2280 AND DS2281 Table 1 DESCRIPTION VENDOR PART # Vertical Single Row with Center Posts (Tin) AMP 821824-2 Vertical Single Row without Center Posts (Tin) AMP 821824-7 Inclined Single Row with Center Posts (Tin) AMP 821907-2 Inclined Single Row without Center Posts (Tin) AMP 821907-6 Rt Angle Single Row with Center Post (Tin) AMP 89-1439-35-68 2614130 OO08b48 1463 031594 2/12 467DS2280/DS82281 DS2280 SCHEMATIC Figure 1 310 HUM G4SS8vdAg Suv S31 TT ALON SSA rs a s BS aaa cee ey MOHOS ass NIv ONASAS ONASWS Yass MIOSAS as0s dns Js Jano ONASWHY wasY ~19Y olin epee yey Ceol IS isu sds 4NI wos aoavy 7asoIsY HADISH 1018 NN WIOHOW aA Ag uadu ze1ou sold ONASWY yasy Isai DaNL Ir SOdL WIL | MTOHOL WSL | OWL TaSSISL yHIDISL qogvi ANOIL WIOML ONASWL ONASAL ONASSY b| O3NY SOdY WTO" || Teaaseassoas 3YOLS OILSVIa $2280 - #n HAAIZOSNVHL LL vostesd n BE 261eSd In SOVIYALNI ANI AAIZO3Y TASMIOL sivi }-< 01] Nasoz a} oan ntc] SOdL 2naz1 |-< $F ] WIOL LNa1 -< 1 ] 93N1 oN31 |__< St ] we S0d1 ONIEL [YH +> any 101 BNINA LL [2 Jdiin Tt ' ZL ZOW4YALNI SINT LINSNVEL gelesd 2n Long NaSOZ avort * 7asy1OH 4901 |{6 > 261108 IL{ HF svi {> 5, sive Ontuy 3NY 002 zu t<_s ] SOdu | sou 002 te r~<F] dl tL 031594 3/12 468 M@ 2614330 0008649 O14DS2280/DS2281 031594 4/12 Bb 469 ee O=Py ObZ=ZH=14 OZI-182 HOS Naso7 OL=bY OSL=ZH=1H 'S20-192 HO [~=> sivi L<0F] dN 1-0 HLIM GASSVdAd SHV SOI Tv LON [ve > las | 4 51 CoH) [= >s0 sal mee 2} [4> 1su OaNL DANL a1} -< 2 | < ee} oas SOdL SOdL 2Na1 A [3*>J sas OL be wot INS SSA 6t] < te }_+ NI = SN ON31 10s SOd1 ney Cty [sk > WIOHOL |-{ SE ONIHL ihe o <es}__, ase wass }-<_$] w107 ONIN Ch] <05}|_ _| onasou ow. +1 82> LLL | Gan Cz] Cs} susy axi |} { > lL at <5] av S1St [82> BOVAUSLINI INIT LINSNYELL Bq snOHOS < 6h} vay asi +< 08] CH] ass raenou | <5} M9HOU GNIL CTE] | > snot 1 99 [Zs> Now < 8%} va avi }{ 28> NASOZ avor{-] * id ee [62> onasas CH ns ONASINA C8 89708 9001-6 > (#5 }-_] ONASWS < or} wad ONASAL |-< ZB] zeriou |__{ TF > <9 } Yass Cah] ee1od (= SIV ler N < 66} so1u ONASSY sivy 2 [28> 10sas SONIMY 9aNY 53Nd if [s9> 788198 onaswu be ONASWH zy SOdu sOdu oO 3s} als YASH hq uasy EE [3>ais (3 G 108 108 Wy = uw WOH lag bk dite 5 EL on AYNO1S OLLSVIA HAAIOSNVHL 1d SOVIHAINI ANN AAISOSY = GZl2Sd on viglesa n 284zSa In Ol a a 2614130 0008650 834DS2280/DS2281 TYPICAL DS2280 APPLICATION Figure 3 eS T_T RX RST ALN s/s SPS SFSYNC ke FRAME SYNC TIP SYSCLK M@- 1.544 MHz CLOCK RRING SSER }- RECEIVE DATA DSX-1 TCLK @ 1.544 MHz CLOCK INTERFACE DS2280 TSER TRANSMIT DATA TUNK oe Tip TABCD TRING TMSYNC M4- MULTIFRAME SYNG LENO __ __ LENi TFSYNC INT SCLK CS SDO SDI LEN2 TAIS LB SCLKSEL PULLUP tf 3 MICROCONTROLLER (DSs000) TYPICAL DS2281 APPLICATION Figure 4 AX __ _ RST ALN S/P SCLKSEL SPS SFSYNC keg FRAME SYNC OX RTIP SYSCLK M-~ 2.048 MHz CLOCK RRING SSER [RECEIVE DATA CEPT TCLK k 2.048 MHz CLOCK INTERFACE ps2281 TSER TRANSMIT DATA TIND XX TTIP TSO TRING TXD Xx TMSYNG 4- >MULTIFRAME SYNG INT SCLK CS SDO SDI TAS LB TFSYNG 7 PULLUP a tf > v MICROCONTROLLER (DS5000) 031594 5/12 470 MH 2614130 0008651 7720S2280/DS2281 PIN DESCRIPTION Table 2 PIN SYMBOL TYPE DEVICE DESCRIPTION 1 Vss ~ - Ground. Connect to 0.0 volt. 2 Vpp - - Positive Supply. Connect to 5.0 volts. 3 NC - - No Connect. Do not connect to this pin. 4 RTIP | DS2187 Receive Tip and Ring. Connects directly to the receiver T1 5 RRING twisted pair or CEPT lines. 6 NC - - No Connect. Do not connect to this pin. 7 NG - - No Connect. Do not connect to this pin. 8 NG - - No Connect. Do not connect to this pin. 9 LOCK oO DS2187 Frequency Lock Indication. High state indicates that the DS2187 is phase and frequencylocked to the incoming signal at RTIP and RRING. 10 TAIS | DS2186 Transmit Alarm Indication Signal. When strapped high, an unframed all ones signal is transmitted at TTIP and TRING at the TCLK rate. 11 RCL192 0 DS2187 Receive Carrier Loss. High state indicates that at least 192 consecutive zeros have been received at RTIP and RRING. 12 Als Oo DS2187 Recelve Alarm Indication Signal. High state indicates that the receive data stream at RTIP and RRING contains less than three zeros over two full frames of incoming data. 13 | LENO(2280) I DS2186 Line Length Select. State of these three pins determines the 14 | LEN1(2280) output T1 waveform shape. See Table 3. 15 | LEN2(2280) 13 NC(2281) - - No Connect. Do not connect to this pin. 14 | NC(2281) 15 NC(2281) 16 RPOS oO DS2187 Receive Positive and Negative Data. Data extracted from 17 RNEG the T1 or CEPT line by the DS2187. 18 Vop - - Positive Supply. Connect to 5.0 volts. 19 Vsg - - Ground. Connect to 0.0 volt. 20 NC - - No Connect. Do not connect to this pin. 21 TRING 0 DS2186 Transmit Tip and Ring. Connects directly to the transmit T1 22 TTIP twisted pair or CEPT line. 23 NC - - No Connect. Do not connect to this pin. 24 LB I DS2186 Line Loopback. When strapped high, clock and data re- DS2187 ceived at RTIP and RRING is looped back to TTIP and TRING. 25 TSER | DS2180A | Transmit Seriat Data. NRZ data input, sampled on the falling DS2181A | edge of TCLK. 26 TMO oO DS2180A | Transmit Multiframe Out. Output of the internal multiframe DS2181A | counter; indicates multiframe boundaries. MB 2614130 0008452 09 031594 6/12 4710S2280/D82281 PIN SYMBOL TYPE DEVICE DESCRIPTION 27 TSIGSEL oO DS2180A__| Transmit Signaling Select. A .667 KHz clock which identifies (2280) signaling frames A and C in 193E framing; a 1.33 KHz clock in 193S framing. TXD | DS2181A | Transmit Extra Data. Sampled on falling edge of TCLK during (2281) bit times 5, 7, and 8 of timeslot 16 in frame 0 when CAS is en- abled. 28 LF oO DS2186 Line Fault. Open collector; active low output. Held low during an output driver fault or failure; 3-stated otherwise. 29 TSIGFR QO DS2180A_ | Transmit Signaling Frame. High during signaling frames, (2280) low otherwise. TSTS oO DS2181A_ | Transmit Signaling Timeslot. High during timeslot 16 of ev- (2281) ery frame, low otherwise. 30 TABCD I DS2180A_ | Transmit ABCD Signaling Data. When enabled via TCR.4 (2280) inthe DS2180A, the LSB time of each channel will be sampled in signaling frames on falling edge of TCLK. TSD I DS2181A_ | Transmit Signaling Data. CAS signaling data input; sampled (2281) on falling edge of TCLK for insertion into outgoing timeslot 16 when enabled. 31 TLINK | DS2180A_ | TransmitLink Data. Sampled during the Fbit time on the fal- (2280) ling edge of TCLK. Sampled in odd frames in 193E framing and in even frames for 193S if enabled via TCR.2 in the DS2180A. TIND I DS2181A_ | Transmit international and National Data. Sampled on the (2281) falling edge of TCLK during bit 1 of timeslot 0 of every frame (international) and/or during bit times 4 through 8 of timeslot 0 during nonalign frames (national) when enabled. 32 TCLK oO DS2180A_ | Transmit Link Clock. A 4 KHz demand clock for the TLINK (2280) input. TAF 0 DS2181A_ | Transmit Alignment Frame. High during frames containing (2281) the frame alignment signal, low otherwise. 33 INT Oo DS2180A | Receive Alarm Interrupt. Flags host controller during alarm DS2181A_ | conditions. Active low, open drain output. 34 SDI I DS2180A_ | Serial Data In. Data for onboard registers. Sampled on the DS2181A_ | rising edge of SCLK. 35 TCHCLK oO DS2180A_ | Transmit Channel Clock. 192 KHz or 256 KHz clock which DS2181A | identifies timeslot (channel) boundaries. 36 TCLK I DS2186 Transmit Clock. A 1.544 MHz or 2.048 MHz clock with the DS2180A | proper accuracy and jitter characteristics should be applied DS2181A | here. 37 TFSYNG l DS21804 | Transmit Frame Sync. Rising edge identifies frame bound- DS2181A | ary; may be pulsed every frame to reinforce internal frame counter, or tied low, allowing TMSYNC to establish multiframe and frame alignment. 38 TMSYNC I DS2180A_ | Transmit Multiframe Sync. May be pulsed high at multiframe DS2181A_ | boundaries to reinforce multiframe alignment, or tied low, which allows the internal multiframe counter to run free. 031594 7/12 MH 2614130 0008653 S45 472DS2280/DS2281 PIN SYMBOL | TYPE DEVICE DESCRIPTION 39 RLOS 0 DS2180A_ | Receive Loss of Sync. Indicates sync status; high when are- DS2181A | sync is in progress, low otherwise. 40 RFER oO DS2180A | Receive Frame Error. Transitions high when either a frame DS2181A | or CRC or CAS multiframe error event occurs. 4 RBV oO DS2180A_ | Receive Bipolar Violation. Transitions high when a bipolar DS2181A | violation is detected. 42 RCL32 oO DS2180A_ | Receive Carrier Loss. High state indicates that at least 32 DS2181A | consecutive zeros have been received at RTIP and RRING. 43 SDO oO DS2180A | Serlal Data Out. Control and status information from the on- DS2181A | board registers. Updated on falling edge of SCLK, 3-stated during serial port write or when CS is high. 44 ts I DS2180A | Chip Select. Must be low to write to or read from the serial DS2181A | port. 45 SCLK | DS2180A | Serial Data Clock. Used to read or write serial port registers. DS2181A 46 SPS I DS2180A_ | Sertal Port Select. Tie to Vpp to select the serial port (soft- DS2181A | ware mode). Tie to Vgs to select the hardware mode. 47 RST ! DS2180A_ | Reset. A highiow transition clears ail internal registers and DS2181A | resets the receive side counters. A hightlow-high transition will initiate a resync. 48 RYEL oO DS2180A | Receive Yellow Alarm. High state indicates that a yellow (2280) alarm has been detected in the T1 data stream received at RTIP and RRING. RRA oO DS2181A | Receive Remote Alarm. Transitions high when alarm de- (2281) tected, low when alarm cleared. 49 RLINK oO DS2180A_ | Receive Link Data. in 193E framing mode, updated with ex- (2280) tracted FDL data one RCLK before the start of odd frames and held until the next update. In 193S framing mode, updated with extracted Sbit data one RCLK before the start of even frames and held until the next update. RDMA 0 DS2181A | Receive Distant Multiframe Alarm. Transitions high when (2281) alarm detected, low when alarm cleared. 50 RSIGSEL oO DS2180A | Receive Signaling Select. A 0.667 KHz clock which identi- (2280) fies signaling frames A and C in 193 framing; a 1.33 KHz clock in 1935 framing. RCSYNC o DS2181A | Receive CRC4 Sync. Low-high transition indicates start of (2281) CRC4 multiframe, held high during CRC4 frames 0 through 7 and low during frames 8 through 15. 51 RLCLK 0 DS2180A | Receive Link Clock. A 4 KHz demand clock for RLINK. (2280) RAF oO DS2181A | Receive Alignment Frame. High during frames containing (2281) the frame alignment signal, low otherwise. MB 2614130 0008654 4461 031594 8/12 473DS2280/0S82281 PIN SYMBOL | TYPE DEVICE DESCRIPTION 52 RCLK oO DS2187 Receive clock. A 1.544 MHz or 2.048 MHz clock thatis recov- ered from the incoming data stream at RTIP and RRING by the DS2187. Fed to all the other devices on the DS2280 and DS2281. 53 RABCD O DS2180A_ | Receive ABCD Signaling. Extracted signaling data output, (2280) valid for each channel time in signaling frames. In nonsignal- ing frames, RABCD outputs the LSB of each channel word. RSD O DS2181A_ | Receive Signaling Data. Extracted timeslot 16 data. (2281) 54 RCHCLK 0 DS2180A_ | Receive channel Clock. 192 KHz or 256 KHz clock which DS2181A | identifies timeslot (channel) boundaries. 55 RFSYNC 0 DS2180A_ | Receive Frame Syne. Extracted 8 KHz signal that indicates DS2181A_ | the beginning of each frame. 56 RSIGFR 0 DS2180A | Recelve Signaling Frame. High during signaling frames, low (2280) during resync and non-signaling frames. RSTS oO DS2181A_ | Receive Signaling Timeslot. High during timeslot 16 of every (2281) frame, low otherwise. 57 ALN t DS2175 | Align. When forced low, ALN recenters the buffer on the next system side frame sync boundary as determined by SFSYNC. 58 SLIP oO DS2175 Frame Slip. Held low for 65 SYSCLK cycles when a slip oc- curs. Active low, open drain output. 59 FSD oO DS2175 Frame Slip Direction. State indicates direction of the last slip; latched ona slip occurrence. Low state indicates that the buff- er is empty and a frame was repeated. High state indicates that the buffer is full and a frame was deleted. 60 RMSYNC oO DS2180A | Receive Multiframe Syne. Extracted multiframe sync; rising DS2181A_ | edge indicates the start of a multiframe. 61 RSER 0 DS2180A_ | Receive Serial Data. Received NRZ serial data, updated on DS2181A_ | the rising edge of RCLK. 62 SYSCLK l DS2175 System Clock. A 1.544 MHz or 2.048 MHz data clock. 63 SSER oO DS2175 System Serial Data. Updated on the rising edge of SYSCLK. 64 SMSYNG 0 DS2175 System Multiframe Sync. Slip-compensated multiframe output; used with RMSYNC to monitor depth of the DS2175 buffer real time. 65 SCLKSEL I DS2175 System Clock Select. Tie to Vgg for 1.544 MHz backpiane applications; tie to Vpp for 2.048 MHz backplane applications. 66 s/P | DS2175 Serial/Parallel Select. Tie to Vsg for parallel backplane ap- plications; tie to Vpp for serial backplane applications. 67 SCHCLK 0 DS2175 System Channel Clock. Transitions high on channel bound- aries. 68 SFSYNC I DS2175 System Frame Sync. Rising edge establishes system side frame boundaries. 031594 9/12 MM 26134130 0008655 318 474DBS2280/D$2281 T1 TRANSMIT LINE LENGTH SELECTION Table 3 LEN2 LEN1 LENO WAVEFORM SELECTED 0 0 0 Do not use 0 0 1 Do not use 0 1 0 Do not use 0 1 1 DSX-1 Crossconnect; 0 to 133 feet 1 0 0 DSX1 Crossconnect; 133 to 266 feet 1 0 1 DSX-1 Crossconnect; 266 to 399 feet 1 1 0 DSX-1 Crossconnect; 399 to 533 feet DSX-1 Crossconnect; 533 to 655 feet MB 2614130 OO08b5b 254 475 031594 10/12DS2280/DS2281 ABSOLUTE MAXIMUM RATINGS* Voltage on Any Pin Relative to Ground -0.3V to Voc + 0.3V Operating Temperature , 0C to +70C Storage Temperature 55C to 125C * This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operation sections of this specification is not implied. Exposure to absolute maxi- mum rating conditions for extended periods of time may affect reliability. RECOMMENDED DC OPERATING CONDITIONS (0C to 70C) PARAMETER SYMBOL MIN TYP MAX UNITS NOTES Logic 1 Vin 2.0 Voct0.3 Vv 1 Logic 0 Vit 0.3 +0.8 v 1 Supply Vop 4,75 5.25 Vv CAPACITANCE (ta=25C) PARAMETER SYMBOL MIN TYP MAX UNITS NOTES Input Capacitance Cin 20 pF 1 Output Capacitance Cout 40 pF 1 DC ELECTRICAL CHARACTERISTICS (0C to 70C; Vpp=5V + 5%) PARAMETER SYMBOL MIN TYP MAX UNITS NOTES Supply Current lbp 70 90 mA 2 Input Leakage I -1.0 +1.0 pA 3, 5 Output Leakage lo -1.0 +1.0 pA ? Output Current @ 2.4V lon -1.0 mA 6 Output Current @ 0.4V lo +4.0 mA 6 NOTES: 1. Does not apply to RTIP, RRING, TTIP, or TRING. . Vpp=5.25V and TCLK=2.048 MHz. . Vgs<Vin<Vop- . Allinputs except RTIP and RRING. 2 3 4. Applies to open collector outputs (LF, SLIP, INT). . 5 6. All outputs except TTIP and TRING. NOTE: All AC Electrical Parametrics can be found in the individual data sheets on the DS2187, DS2186, DS2180A, DS2181A, and 0S2175. 031594 11/12 476 MH 2614130 OO08bS? 19500S2280/DS2281 DS2280 T1 LINE CARD STIK DS2281 CEPT LINE CARD STIK We toe | SIDE B | oO | t L | A io SEA A J B oy + K PKG 68-PIN DIM MIN MAX AIN. 4.045 | 4.055 BIN. 3.779 | 3.789 CIN. 0.845 ) 0.855 DIN. 0.395 | 0.405 EIN. 0.245 ] 0.255 FIN. 0.050 BSC GIN. 0.075 | 0.085 HIN. 0.245 | 0.255 LIN. 1.650 BSC JIN. 0.120 | 0.130 KIN. 1.850 | 1.950 LIN. 2.020 | 2.030 MIN. 0.057 | 0.067 NIN. 0.225, O IN. 0.290 PIN. 0.054 031594 12/12 477 MB 26141350 0004658 Oc?