High Precision Shunt Mode
Voltage References
ADR520/ADR525/ADR530/ADR540/ADR550
Rev. E
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FEATURES
Ultracompact SC70 and SOT-23-3 packages
Temperature coefficient: 40 ppm/°C (maximum)
2× the temperature coefficient improvement over the
LM4040
Pin compatible with the LM4040/LM4050
Initial accuracy: ±0.2%
Low output voltage noise: 14 μV p-p @ 2.5 V output
No external capacitor required
Operating current range: 50 μA to 15 mA
Industrial temperature range: −40°C to +85°C
APPLICATIONS
Portable, battery-powered equipment
Automotive
Power supplies
Data acquisition systems
Instrumentation and process control
Energy measurement
Table 1. Selection Guide
Part Voltage (V)
Initial
Accuracy (%)
Temperature
Coefficient
(ppm/°C)
ADR520A 2.048 ±0.4 70
ADR520B 2.048 ±0.2 40
ADR525A 2.5 ±0.4 70
ADR525B 2.5 ±0.2 40
ADR530A 3.0 ±0.4 70
ADR530B 3.0 ±0.2 40
ADR540A 4.096 ±0.4 70
ADR540B 4.096 ±0.2 40
ADR550A 5.0 ±0.4 70
ADR550B 5.0 ±0.2 40
PIN CONFIGURATION
ADR520/
ADR525/
ADR530/
ADR540/
ADR550
V
+
1
V–
2
TRIM
3
04501-001
Figure 1. 3-Lead SC70 (KS) and 3-Lead SOT-23-3 (RT)
GENERAL DESCRIPTION
Designed for space-critical applications, the ADR520/ADR525/
ADR530/ADR540/ADR550 are high precision shunt voltage
references, housed in ultrasmall SC70 and SOT-23-3 packages.
These references feature low temperature drift of 40 ppm/°C,
an initial accuracy of better than ±0.2%, and ultralow output
noise of 14 μV p-p.
Available in output voltages of 2.048 V, 2.5 V, 3.0 V, 4.096 V,
and 5.0 V, the advanced design of the ADR520/ADR525/
ADR530/ADR540/ADR550 eliminates the need for compensa-
tion by an external capacitor, yet the references are stable with
any capacitive load. The minimum operating current increases
from a mere 50 μA to a maximum of 15 mA. This low operating
current and ease of use make these references ideally suited for
handheld, battery-powered applications.
A trim terminal is available on the ADR520/ADR525/ADR530/
ADR540/ADR550 to allow adjustment of the output voltage
over a ±0.5% range, without affecting the temperature coefficient
of the device. This feature provides users with the flexibility to
trim out any system errors.
ADR520/ADR525/ADR530/ADR540/ADR550
Rev. E | Page 2 of 16
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
Pin Configuration ............................................................................. 1
General Description ......................................................................... 1
Revision History ............................................................................... 2
Specifications ..................................................................................... 3
ADR520 Electrical Characteristics ............................................. 3
ADR525 Electrical Characteristics ............................................. 3
ADR530 Electrical Characteristics ............................................. 4
ADR540 Electrical Characteristics ............................................. 4
ADR550 Electrical Characteristics ............................................. 5
Absolute Maximum Ratings ............................................................6
Thermal Resistance .......................................................................6
ESD Caution...................................................................................6
Parameter Definitions .......................................................................7
Temperature Coefficient...............................................................7
Thermal Hysteresis .......................................................................7
Typical Performance Characteristics ..............................................8
Theory of Operation ...................................................................... 11
Applications ................................................................................ 11
Outline Dimensions ....................................................................... 13
Ordering Guide .......................................................................... 14
REVISION HISTORY
6/08—Rev. D to Rev. E
Changes to Table 3 ............................................................................ 3
Changes to Table 4 and Table 5 ....................................................... 4
Changes to Table 6 ............................................................................ 5
Changes to Figure 4 .......................................................................... 8
Changes to Applications Section .................................................. 11
12/07—Rev. C to Rev. D
Changes to Figure 3 and Figure 5 ................................................... 8
Changes to Figure 15, Figure 16, and Figure 17 Captions ........ 10
Changes to Figure 23 ...................................................................... 12
Updated Outline Dimensions ....................................................... 13
8/07—Rev. B to Rev. C
Changes to Figure 21 ...................................................................... 11
Updated Outline Dimensions ....................................................... 13
Changes to Ordering Guide .......................................................... 14
1/06—Rev. A to Rev. B
Updated Formatting ........................................................... Universal
Changes to Features Section ............................................................ 1
Changes to General Description Section ....................................... 1
Updated Outline Dimensions ....................................................... 13
Changes to Ordering Guide .......................................................... 14
12/03—Data Sheet Changed from Rev. 0 to Rev. A
Updated Outline Dimensions ....................................................... 13
Change to Ordering Guide ............................................................ 14
11/03—Revision 0: Initial Version
ADR520/ADR525/ADR530/ADR540/ADR550
Rev. E | Page 3 of 16
SPECIFICATIONS
ADR520 ELECTRICAL CHARACTERISTICS
IIN = 50 μA to 15 mA, TA = 25°C, unless otherwise noted.
Table 2.
Parameter Symbol Conditions Min Typ Max Unit
Output Voltage VOUT
Grade A 2.040 2.048 2.056 V
Grade B 2.044 2.048 2.052 V
Initial Accuracy VOERR
Grade A ±0.4% −8 +8 mV
Grade B ±0.2% −4 +4 mV
Temperature Coefficient1 TCVO −40°C < TA < +85°C
Grade A 25 70 ppm/°C
Grade B 15 40 ppm/°C
Output Voltage Change vs. IIN ∆VR IIN = 0.1 mA to 15 mA 1 mV
−40°C < TA < +85°C 4 mV
I
IN = 1 mA to 15 mA
−40°C < TA < +85°C 2 mV
Dynamic Output Impedance (∆VR/∆IR) IIN = 0.1 mA to 15 mA 0.27 Ω
Minimum Operating Current IIN −40°C < TA < +85°C 50 μA
Voltage Noise eN p-p 0.1 Hz to 10 Hz 14 μV p-p
Turn-On Settling Time tR 2 μs
Output Voltage Hysteresis ∆VOUT_HYS I
IN = 1 mA 40 ppm
1 Guaranteed by design; not production tested.
ADR525 ELECTRICAL CHARACTERISTICS
IIN = 50 μA to 15 mA, TA = 25°C, unless otherwise noted.
Table 3.
Parameter Symbol Conditions Min Typ Max Unit
Output Voltage VOUT
Grade A 2.490 2.500 2.510 V
Grade B 2.495 2.500 2.505 V
Initial Accuracy VOERR
Grade A ±0.4% −10 +10 mV
Grade B ±0.2% −5 +5 mV
Temperature Coefficient1
TCVO −40°C < TA < +85°C
Grade A 25 70 ppm/°C
Grade B 15 40 ppm/°C
Output Voltage Change vs. IIN ∆VR IIN = 0.1 mA to 15 mA 1 mV
−40°C < TA < +85°C 4 mV
I
IN = 1 mA to 15 mA
−40°C < TA < +85°C 2 mV
Dynamic Output Impedance (∆VR/∆IR) IIN = 0.1 mA to 15 mA 0.2 Ω
Minimum Operating Current IIN −40°C < TA < +85°C 50 μA
Voltage Noise eN p-p 0.1 Hz to 10 Hz 18 μV p-p
Turn-On Settling Time tR 2 μs
Output Voltage Hysteresis ∆VOUT_HYS IIN = 1 mA 40 ppm
1 Guaranteed by design; not production tested.
ADR520/ADR525/ADR530/ADR540/ADR550
Rev. E | Page 4 of 16
ADR530 ELECTRICAL CHARACTERISTICS
IIN = 50 μA to 15 mA, TA = 25°C, unless otherwise noted.
Table 4.
Parameter Symbol Conditions Min Typ Max Unit
Output Voltage VOUT
Grade A 2.988 3.000 3.012 V
Grade B 2.994 3.000 3.006 V
Initial Accuracy VOERR
Grade A ±0.4% −12 +12 mV
Grade B ±0.2% −6 +6 mV
Temperature Coefficient1
TCVO −40°C < TA < +85°C
Grade A 25 70 ppm/°C
Grade B 15 40 ppm/°C
Output Voltage Change vs. IIN ∆VR IIN = 0.1 mA to 15 mA 1 mV
−40°C < TA < +85°C 4 mV
I
IN = 1 mA to 15 mA
−40°C < TA < +85°C 2 mV
Dynamic Output Impedance (∆VR/∆IR) IIN = 0.1 mA to 15 mA 0.2 Ω
Minimum Operating Current IIN −40°C < TA < +85°C 50 μA
Voltage Noise eN p-p 0.1 Hz to 10 Hz 22 μV p-p
Turn-On Settling Time tR 2 μs
Output Voltage Hysteresis ∆VOUT_HYS IIN = 1 mA 40 ppm
1 Guaranteed by design; not production tested.
ADR540 ELECTRICAL CHARACTERISTICS
IIN = 50 μA to 15 mA, TA = 25°C, unless otherwise noted.
Table 5.
Parameter Symbol Conditions Min Typ Max Unit
Output Voltage VOUT
Grade A 4.080 4.096 4.112 V
Grade B 4.088 4.096 4.104 V
Initial Accuracy VOERR
Grade A ±0.4% −16 +16 mV
Grade B ±0.2% −8 +8 mV
Temperature Coefficient1
TCVO −40°C < TA < +85°C
Grade A 25 70 ppm/°C
Grade B 15 40 ppm/°C
Output Voltage Change vs. IIN ∆VR IIN = 0.1 mA to 15 mA 1 mV
−40°C < TA < +85°C 5 mV
I
IN = 1 mA to 15 mA
−40°C < TA < +85°C 2 mV
Dynamic Output Impedance (∆VR/∆IR) IIN = 0.1 mA to 15 mA 0.2 Ω
Minimum Operating Current IIN −40°C < TA < +85°C 50 μA
Voltage Noise eN p-p 0.1 Hz to 10 Hz 30 μV p-p
Turn-On Settling Time tR 2 μs
Output Voltage Hysteresis ∆VOUT_HYS I
IN = 1 mA 40 ppm
1 Guaranteed by design; not production tested.
ADR520/ADR525/ADR530/ADR540/ADR550
Rev. E | Page 5 of 16
ADR550 ELECTRICAL CHARACTERISTICS
IIN = 50 μA to 15 mA, TA = 25°C, unless otherwise noted.
Table 6.
Parameter Symbol Conditions Min Typ Max Unit
Output Voltage VOUT
Grade A 4.980 5.000 5.020 V
Grade B 4.990 5.000 5.010 V
Initial Accuracy VOERR
Grade A ±0.4% −20 +20 mV
Grade B ±0.2% −10 +10 mV
Temperature Coefficient1 TCVO −40°C < TA < +85°C
Grade A 25 70 ppm/°C
Grade B 15 40 ppm/°C
Output Voltage Change vs. IIN ∆VR IIN = 0.1 mA to 15 mA 1 mV
−40°C < TA < +85°C 5 mV
I
IN = 1 mA to 15 mA
−40°C < TA < +85°C 2 mV
Dynamic Output Impedance (∆VR/∆IR) IIN = 0.1 mA to 15 mA 0.2 Ω
Minimum Operating Current IIN −40°C < TA < +85°C 50 μA
Voltage Noise eN p-p 0.1 Hz to 10 Hz 38 μV p-p
Turn-On Settling Time tR 2 μs
Output Voltage Hysteresis ∆VOUT_HYS IIN = 1 mA 40 ppm
1 Guaranteed by design; not production tested.
ADR520/ADR525/ADR530/ADR540/ADR550
Rev. E | Page 6 of 16
ABSOLUTE MAXIMUM RATINGS
Ratings apply at 25°C, unless otherwise noted.
Table 7.
Parameter Rating
Reverse Current 25 mA
Forward Current 20 mA
Storage Temperature Range −65°C to +150°C
Industrial Temperature Range −40°C to +85°C
Junction Temperature Range −65°C to +150°C
Lead Temperature (Soldering, 60 sec) 300°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
THERMAL RESISTANCE
Table 8.
Package Type θJA1 θ
JC Unit
3-Lead SC70 (KS) 580.5 177.4 °C/W
3-Lead SOT-23-3 (RT) 270 102 °C/W
1 θJA is specified for worst-case conditions, such as for devices soldered on
circuit boards for surface-mount packages.
ESD CAUTION
ADR520/ADR525/ADR530/ADR540/ADR550
Rev. E | Page 7 of 16
PARAMETER DEFINITIONS
TEMPERATURE COEFFICIENT
Temperature coefficient is defined as the change in output
voltage with respect to operating temperature changes and is
normalized by the output voltage at 25°C. This parameter is
expressed in ppm/°C and is determined by the following
equation:
6
12
12 10
)(C)25(
)()(
C
ppm ×
×°
=
°TTV
TVTV
TCV
OUT
OUTOUT
O (1)
where:
VOUT(T2) = VOUT at Temperature 2.
VOUT(T1) = VOUT at Temperature 1.
VOUT(25°C) = VOUT at 25°C.
THERMAL HYSTERESIS
Thermal hysteresis is defined as the change in output voltage
after the device is cycled through temperatures ranging from
+25°C to −40°C, then to +85°C, and back to +25°C. The
following equation expresses a typical value from a sample of
parts put through such a cycle:
6
_
_
__
10
C)25(
C)25(
[ppm]
C)25(
×
°
°
=
°=
OUT
ENDOUTOUT
HYSOUT
ENDOUTOUTHYSOUT
V
VV
V
VVV
(2)
where:
VOUT(25°C) = VOUT at 25°C.
VOUT_END = VOUT at 25°C after a temperature cycle from +25°C to
−40°C, then to +85°C, and back to +25°C.
ADR520/ADR525/ADR530/ADR540/ADR550
Rev. E | Page 8 of 16
TYPICAL PERFORMANCE CHARACTERISTICS
MINIMUM OPERATING CURRENT (µA)
REVERSE VOLTAGE (V)
025
5.5
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
050 75 100
ADR550
ADR540
ADR530
ADR525
ADR520
T
A
= 25°C
04501-006
Figure 2. Reverse Characteristics and Minimum Operating Current
I
IN
(mA)
REVERSE VOLTAGE CHANGE (mV)
063
8
1
2
3
4
5
6
7
091215
T
A
= +85°C
T
A
= +25°C
T
A
= –40°C
04501-007
Figure 3. ADR520 Reverse Voltage vs. Operating Current
I
IN
(mA)
REVERSE VOLTAGE CHANGE (mV)
03
8
T
A
= –40°C
T
A
= +85°C
T
A
= +25°C
0
2
4
6
–2 915
612
04501-008
Figure 4. ADR525 Reverse Voltage vs. Operating Current
I
IN
(mA)
REVERSE VOLTAGE CHANGE (mV)
06
8
T
A
= +85°C
T
A
= +25°C
1
2
3
4
5
6
7
012 15
39
T
A
= –40°C
04501-009
Figure 5. ADR550 Reverse Voltage vs. Operating Current
V
IN
= 2V/DIV
V
OUT
= 1V/DIV
4µs/DIV
I
IN
= 10mA
TIME (µs)
04501-010
Figure 6. ADR525 Turn-On Response
TIME (µs)
04501-011
V
OUT
= 1V/DIV
4µs/DIV
I
IN
= 100µA
V
IN
= 2V/DIV
Figure 7. ADR525 Turn-On Response
ADR520/ADR525/ADR530/ADR540/ADR550
Rev. E | Page 9 of 16
V
IN
= 2V/DIV
V
OUT
= 1V/DIV
4µs/DIV
I
IN
= 10mA
TIME (µs)
04501-012
Figure 8. ADR520 Turn-On Response
V
IN
= 2V/DIV
V
OUT
= 1V/DIV
10µs/DIV
I
IN
= 100µA
TIME (µs)
04501-013
Figure 9. ADR520 Turn-On Response
V
IN
= 2V/DIV
V
OUT
= 2V/DIV
4µs/DIV
I
IN
= 10mA
TIME (µs)
04501-014
Figure 10. ADR550 Turn-On Response
V
IN
= 2V/DIV
V
OUT
= 2V/DIV
20µs/DIV
I
IN
= 100µA
TIME (µs)
04501-015
Figure 11. ADR550 Turn-On Response
5µs/DIV
PEAK-TO-PEAK
13.5µV
RMS
2.14µV
TIME (µs)
04501-021
Figure 12. ADR520 Voltage Noise 0.1 Hz to 10 Hz
V
OUT
= 50mV/DIV
10µs/DIV
V GEN = 2V/DIV
I
IN
= 1mA
TIME (µs)
04501-016
Figure 13. ADR525 Load Transient Response
ADR520/ADR525/ADR530/ADR540/ADR550
Rev. E | Page 10 of 16
V
OUT
= 50mV/DIV
10µs/DIV
V GEN = 2V/DIV
I
IN
= 10mA
TIME (µs)
04501-017
Figure 14. ADR550 Load Transient Response
2.5030
2.5025
2.5020
2.5015
2.5010
2.5005
2.5000
2.4995
2.4990
2.4985
2.4980
–40 –15 10 35 60 85
TEMPERATURE (°C)
V
OUT
(V)
04501-018
Figure 15. Data for Five Parts of ADR525 VOUT over Temperature
3.0055
3.0050
3.0045
3.0040
3.0035
3.0030
3.0025
3.0020
3.0015
3.0010
3.0005
3.0000
TEMPERATURE (°C)
VOUT (V)
–40 –15 10 35 60 85
04501-019
Figure 16. Data for Five Parts of ADR530 VOUT over Temperature
5.008
5.006
5.004
5.002
5.000
4.998
4.996
4.994
4.992
4.990
4.988
TEMPERATURE (°C)
VOUT (V)
–40 –15 10 35 60 85
04501-020
Figure 17. Data for Five Parts of ADR550 VOUT over Temperature
ADR520/ADR525/ADR530/ADR540/ADR550
Rev. E | Page 11 of 16
THEORY OF OPERATION
The ADR520/ADR525/ADR530/ADR540/ADR550 use the
band gap concept to produce a stable, low temperature coefficient
voltage reference suitable for high accuracy data acquisition
components and systems. The devices use the physical nature of a
silicon transistor base-emitter voltage (VBE) in the forward-biased
operating region. All such transistors have approximately a
−2 mV/°C temperature coefficient (TC), making them unsuitable
for direct use as low temperature coefficient references. Extra-
polation of the temperature characteristics of any one of these
devices to absolute zero (with the collector current proportional
to the absolute temperature), however, reveals that its VBE
approaches approximately the silicon band gap voltage. Thus,
if a voltage develops with an opposing temperature coefficient
to sum the VBE, a zero temperature coefficient reference results.
The ADR520/ADR525/ADR530/ADR540/ADR550 circuit
shown in Figure 18 provides such a compensating voltage (V1)
by driving two transistors at different current densities and
amplifying the resultant VBE difference (ΔVBE, which has a
positive temperature coefficient). The sum of VBE and V1
provides a stable voltage reference over temperature.
V
BE
+
Δ
V
BE
+
V1
V–
V+
+
04501-002
Figure 18. Circuit Schematic
APPLICATIONS
The ADR520/ADR525/ADR530/ADR540/ADR550 are a
series of precision shunt voltage references. They are designed
to operate without an external capacitor between the positive
and negative terminals. If a bypass capacitor is used to filter the
supply, the references remain stable.
All shunt voltage references require an external bias resistor (RBIAS)
between the supply voltage and the reference (see Figure 19).
RBIAS sets the current that flows through the load (IL) and the
reference (IIN). Because the load and the supply voltage can vary,
RBIAS needs to be chosen based on the following considerations:
RBIAS must be small enough to supply the minimum IIN
current to the ADR520/ADR525/ADR530/ADR540/
ADR550, even when the supply voltage is at its minimum
value and the load current is at its maximum value.
RBIAS must be large enough so that IIN does not exceed
15 mA when the supply voltage is at its maximum value
and the load current is at its minimum value.
VOUT
VS
ADR550
IL
IIN
RIIN + IL
04501-003
Figure 19. Shunt Reference
Given these conditions, RBIAS is determined by the supply
voltage (VS), the load and operating currents (IL and IIN) of
the ADR520/ADR525/ADR530/ADR540/ADR550, and the
output voltage (VOUT) of the ADR520/ADR525/ADR530/
ADR540/ADR550.
INL
OUT
S
BIAS II
VV
R+
= (3)
Precision Negative Voltage Reference
The ADR520/ADR525/ADR530/ADR540/ADR550 are suit-
able for applications where a precise negative voltage is desired.
Figure 20 shows the ADR525 configured to provide a negative
output.
V
S
–2.5V
ADR525
R
04501-004
Figure 20. Negative Precision Reference Configuration
Output Voltage Trim
The trim terminal of the ADR520/ADR525/ADR530/ADR540/
ADR550 can be used to adjust the output voltage over a range
of ±0.5%. This allows systems designers to trim system errors
by setting the reference to a voltage other than the preset output
voltage. An external mechanical or electrical potentiometer can
be used for this adjustment. Figure 21 illustrates how the output
voltage can be trimmed using the AD5273, an Analog Devices,
Inc., 10 kΩ potentiometer.
R1
470k
POTENTIOMETER
10k
ADR530
AD5273
R
V
OUT
V
S
04501-005
Figure 21. Output Voltage Trim
ADR520/ADR525/ADR530/ADR540/ADR550
Rev. E | Page 12 of 16
Stacking the ADR520/ADR525/ADR530/ADR540/ADR550
for User-Definable Outputs
Multiple ADR520/ADR525/ADR530/ADR540/ADR550 parts
can be stacked to allow the user to obtain a desired higher voltage.
Figure 22 shows three ADR550s configured to give 15 V. The bias
resistor, RBIAS, is chosen using Equation 3; note that the same
bias current flows through all the shunt references in series.
Figure 23 shows three ADR550s stacked to give −15 V. RBIAS
is calculated in the same manner as before. Parts of different
voltages can also be added together. For example, an ADR525
and an ADR550 can be added together to give an output of
+7.5 V or −7.5 V, as desired. Note, however, that the initial
accuracy error is now the sum of the errors of all the stacked
parts, as are the temperature coefficients and output voltage
change vs. input current.
ADR550
+V
DD
+15V
R
ADR550
ADR550
GND
04501-022
Figure 22. +15 V Output with Stacked ADR550s
ADR550
ADR550
ADR550
GND
–15V
R
–V
DD
04501-024
Figure 23. −15 V Output with Stacked ADR550s
Adjustable Precision Voltage Source
The ADR520/ADR525/ADR530/ADR540/ADR550, combined
with a precision low input bias op amp, such as the AD8610,
can be used to output a precise adjustable voltage. Figure 24
illustrates the implementation of this application using the
ADR520/ADR525/ADR530/ADR540/ADR550. The output
of the op amp, VOUT, is determined by the gain of the circuit,
which is completely dependent on the resistors, R1 and R2.
VOUT = VREF (1 + R2/R1)
An additional capacitor, C1, in parallel with R2, can be added to
filter out high frequency noise. The value of C1 is dependent on
the value of R2.
ADR5xx
V
S
GND
R
R1
R2
C1
(OPTIONAL)
V
REF
AD8610
V
OUT
= V
REF
(1+R2/R1)
04501-023
Figure 24. Adjustable Voltage Source
ADR520/ADR525/ADR530/ADR540/ADR550
Rev. E | Page 13 of 16
OUTLINE DIMENSIONS
ALL DIMENSIONS COMPLIANT WITH EIAJ SC70
0.40
0.25
0.10 MAX
1.00
0.80
SEATING
PLANE
1.10
0.80
0.40
0.10
0.26
0.10
0.30
0.20
0.10
21
3
PIN 1
0.65 BSC
2.20
2.00
1.80
2.40
2.10
1.80
1.35
1.25
1.15
0.10 COPLANARITY
111505-0
Figure 25. 3-Lead Thin Shrink Small Outline Transistor Package [SC70]
(KS-3)
Dimensions shown in millimeters
COMPLIANT TO JEDEC STANDARDS TO-236-AB
092707-A
12
3
SEATING
PLANE
2.64
2.10
3.04
2.80
1.40
1.20
2.05
1.78
0.100
0.013
1.03
0.89
0.60
0.45
0.51
0.37
1.12
0.89
0.180
0.085
0.55
REF
Figure 26. 3-Lead Small Outline Transistor Package [SOT-23-3]
(RT-3)
Dimensions shown in millimeters
ADR520/ADR525/ADR530/ADR540/ADR550
Rev. E | Page 14 of 16
ORDERING GUIDE
Model
Output
Voltage (V)
Initial
Accuracy
(mV)
Tempco
Industrial
(ppm/°C)
Package
Description
Package
Option Branding
Number
of Parts
per Reel
Temperature
Range
ADR520ART-R2 2.048 8 70 3-Lead SOT-23-3 RT-3 RQA 250 −40°C to +85°C
ADR520ART-REEL7 2.048 8 70 3-Lead SOT-23-3 RT-3 RQA 3,000 −40°C to +85°C
ADR520ARTZ-REEL71
2.048 8 70 3-Lead SOT-23-3 RT-3 R1S 3,000 −40°C to +85°C
ADR520BKS-R2 2.048 4 40 3-Lead SC70 KS-3 RQB 250 −40°C to +85°C
ADR520BKS-REEL7 2.048 4 40 3-Lead SC70 KS-3 RQB 3,000 −40°C to +85°C
ADR520BKSZ-REEL71
2.048 4 40 3-Lead SC70 KS-3 R1T 3,000 −40°C to +85°C
ADR520BRT-R2 2.048 4 40 3-Lead SOT-23-3 RT-3 RQB 250 −40°C to +85°C
ADR520BRT-REEL7 2.048 4 40 3-Lead SOT-23-3 RT-3 RQB 3,000 −40°C to +85°C
ADR520BRTZ-REEL71
2.048 4 40 3-Lead SOT-23-3 RT-3 R1T 3,000 −40°C to +85°C
ADR525ART-R2 2.5 10 70 3-Lead SOT-23-3 RT-3 RRA 250 −40°C to +85°C
ADR525ART-REEL7 2.5 10 70 3-Lead SOT-23-3 RT-3 RRA 3,000 −40°C to +85°C
ADR525ARTZ-R21
2.5 10 70 3-Lead SOT-23-3 RT-3 R1W 250 −40°C to +85°C
ADR525ARTZ-REEL71
2.5 10 70 3-Lead SOT-23-3 RT-3 R1W 3,000 −40°C to +85°C
ADR525BKS-R2 2.5 5 40 3-Lead SC70 KS-3 RRB 250 −40°C to +85°C
ADR525BKS-REEL7 2.5 5 40 3-Lead SC70 KS-3 RRB 3,000 −40°C to +85°C
ADR525BKSZ-REEL71
2.5 5 40 3-Lead SC70 KS-3 R1N 3,000 −40°C to +85°C
ADR525BRT-R2 2.5 5 40 3-Lead SOT-23-3 RT-3 RRB 250 −40°C to +85°C
ADR525BRT-REEL7 2.5 5 40 3-Lead SOT-23-3 RT-3 RRB 3,000 −40°C to +85°C
ADR525BRTZ-REEL71
2.5 5 40 3-Lead SOT-23-3 RT-3 R1N 3,000 −40°C to +85°C
ADR530ART-R2 3.0 12 70 3-Lead SOT-23-3 RT-3 RSA 250 −40°C to +85°C
ADR530ART-REEL7 3.0 12 70 3-Lead SOT-23-3 RT-3 RSA 3,000 −40°C to +85°C
ADR530ARTZ-REEL71
3.0 12 70 3-Lead SOT-23-3 RT-3 R1X 3,000 −40°C to +85°C
ADR530BKS-R2 3.0 6 40 3-Lead SC70 KS-3 RSB 250 −40°C to +85°C
ADR530BKS-REEL7 3.0 6 40 3-Lead SC70 KS-3 RSB 3,000 −40°C to +85°C
ADR530BKSZ-REEL71
3.0 6 40 3-Lead SC70 KS-3 R1Y 3,000 −40°C to +85°C
ADR530BRT-R2 3.0 6 40 3-Lead SOT-23-3 RT-3 RSB 250 −40°C to +85°C
ADR530BRT-REEL7 3.0 6 40 3-Lead SOT-23-3 RT-3 RSB 3,000 −40°C to +85°C
ADR530BRTZ-REEL71
3.0 6 40 3-Lead SOT-23-3 RT-3 R1Y 3,000 −40°C to +85°C
ADR540ART-R2 4.096 16 70 3-Lead SOT-23-3 RT-3 RTA 250 −40°C to +85°C
ADR540ART-REEL7 4.096 16 70 3-Lead SOT-23-3 RT-3 RTA 3,000 −40°C to +85°C
ADR540ARTZ-REEL71
4.096 16 70 3-Lead SOT-23-3 RT-3 R1U 3,000 −40°C to +85°C
ADR540BKS-R2 4.096 8 40 3-Lead SC70 KS-3 RTB 250 −40°C to +85°C
ADR540BKS-REEL7 4.096 8 40 3-Lead SC70 KS-3 RTB 3,000 −40°C to +85°C
ADR540BKSZ-REEL71
4.096 8 40 3-Lead SC70 KS-3 R1V 3,000 −40°C to +85°C
ADR540BRT-R2 4.096 8 40 3-Lead SOT-23-3 RT-3 RTB 250 −40°C to +85°C
ADR540BRT-REEL7 4.096 8 40 3-Lead SOT-23-3 RT-3 RTB 3,000 −40°C to +85°C
ADR540BRTZ-REEL71
4.096 8 40 3 Lead SOT-23-3 RT-3 R1V 3,000 −40°C to +85°C
ADR550ART-R2 5.0 20 70 3-Lead SOT-23-3 RT-3 RVA 250 −40°C to +85°C
ADR550ART-REEL7 5.0 20 70 3-Lead SOT-23-3 RT-3 RVA 3,000 −40°C to +85°C
ADR550ARTZ-REEL71
5.0 20 70 3-Lead SOT-23-3 RT-3 R1Q 3,000 −40°C to +85°C
ADR550BKS-R2 5.0 10 40 3-Lead SC70 KS-3 RVB 250 −40°C to +85°C
ADR550BKS-REEL7 5.0 10 40 3-Lead SC70 KS-3 RVB 3,000 −40°C to +85°C
ADR550BKSZ-REEL71
5.0 10 40 3-Lead SC70 KS-3 R1P 3,000 −40°C to +85°C
ADR550BRT-R2 5.0 10 40 3-Lead SOT-23-3 RT-3 RVB 250 −40°C to +85°C
ADR550BRT-REEL7 5.0 10 40 3-Lead SOT-23-3 RT-3 RVB 3,000 −40°C to +85°C
ADR550BRTZ-REEL71
5.0 10 40 3-Lead SOT-23-3 RT-3 R1P 3,000 −40°C to +85°C
1 Z = RoHS Compliant Part.
ADR520/ADR525/ADR530/ADR540/ADR550
Rev. E | Page 15 of 16
NOTES
ADR520/ADR525/ADR530/ADR540/ADR550
Rev. E | Page 16 of 16
NOTES
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registered trademarks are the property of their respective owners.
D04501-0-6/08(E)