INTEGRATED CIRCUITS SA572 Programmable analog compandor Product specification IC17 Data Handbook 1998 Nov 03 Philips Semiconductors Product specification Programmable analog compandor SA572 DESCRIPTION PIN CONFIGURATION The SA572 is a dual-channel, high-performance gain control circuit in which either channel may be used for dynamic range compression or expansion. Each channel has a full-wave rectifier to detect the average value of input signal, a linearized, temperature-compensated variable gain cell (G) and a dynamic time constant buffer. The buffer permits independent control of dynamic attack and recovery time with minimum external components and improved low frequency gain control ripple distortion over previous compandors. D1, N, Packages TRACK TRIM A 1 16 RECOV. CAP A 2 15 TRACK TRIM B RECT. IN A 3 14 RECOV. CAP B ATTACK CAP A 4 13 RECT. IN B G OUT A 5 12 ATTACK CAP B 11 G OUT B THD TRIM A 6 The SA572 is intended for noise reduction in high-performance audio systems. It can also be used in a wide range of communication systems and video recording applications. VCC G IN A 7 10 THD TRIM B GND 8 9 G IN B NOTE: 1. D package released in large SO (SOL) package only. FEATURES SR00694 * Independent control of attack and recovery time * Improved low frequency gain control ripple * Complementary gain compression and expansion with Figure 1. Pin Configuration external op amp APPLICATIONS * Wide dynamic range--greater than 110dB * Temperature-compensated gain control * Low distortion gain cell * Low noise--6V typical * Wide supply voltage range--6V-22V * System level adjustable with external components * Dynamic noise reduction system * Voltage control amplifier * Stereo expandor * Automatic level control * High-level limiter * Low-level noise gate * State variable filter ORDERING INFORMATION DESCRIPTION TEMPERATURE RANGE ORDER CODE DWG # 16-Pin Plastic Small Outline (SOL) -40 to +85C SA572D SOT162-1 16-Pin Plastic Dual In-Line Package (DIP) -40 to +85C SA572N SOT38-4 ABSOLUTE MAXIMUM RATINGS SYMBOL PARAMETER VCC Supply voltage TA Operating temperature range SA572 PD Power dissipation 1998 Nov 03 2 RATING UNIT 22 VDC -40 to +85 C 500 mW 853-0813 20294 Philips Semiconductors Product specification Programmable analog compandor SA572 BLOCK DIAGRAM R1 (5,11) (7,9) 6.8k G (6,10) 500 GAIN CELL (1,15) - - (3,13) + + 10k 270 RECTIFIER (16) BUFFER 10k P.S. (8) (4,12) (2,14) SR00695 Figure 2. Block Diagram DC ELECTRICAL CHARACTERISTICS Standard test conditions (unless otherwise noted) VCC=15V, TA=25C; Expandor mode (see Test Circuit). Input signals at unity gain level (0dB) = 100mVRMS at 1kHz; V1 = V2; R2 = 3.3k; R3 = 17.3k. SA572 SYMBOL PARAMETER TEST CONDITIONS UNIT Min VCC Supply voltage ICC Supply current VR Internal voltage reference THD THD THD Total harmonic distortion (untrimmed) Total harmonic distortion (trimmed) Total harmonic distortion (trimmed) No signal output noise DC level shift (untrimmed) 6 No signal 2.3 Tracking error (measured relative to value at unity i ) [VO-V VO ((unity it gain)]dB i )]dB -V V2dB gain)= Channel crosstalk PSRR 1998 Nov 03 Max 22 VDC 6.3 mA 2.5 2.7 VDC 1kHz CA=1.0F 1kHz CR=10F 100Hz 0.2 0.05 0.25 1.0 % % % Input to V1 and V2 grounded (20-20kHz) 6 25 V Input change from no signal to 100mVRMS 20 50 mV 0 +1.5 dB V1=V2=400mV 0.7 3 % Rectifier input V2=+6dB V1=0dB V2=-30dB V1=0dB 0.2 0.5 -2.5, +1.6 dB dB Unity gain level Large-signal distortion Typ -1.5 200mVRMS into channel A, measured output on channel B Power supply rejection ratio 120Hz 3 60 dB 70 dB Philips Semiconductors Product specification Programmable analog compandor SA572 TEST CIRCUIT 100 1F -15V 22F 2.2F (7,9) 6.8k V1 G + 1% R3 (5,11) 17.3k 82k - 5 270pF (2,14) NE5234 V0 2.2k = 10F (6,10) + BUFFER 1k + 2.2F (4,12) (8) (1,15) 2.2F V2 3.3k (3,13) RECTIFIER +15V (16) + R2 1% .1F 22F SR00696 Figure 3. Test Circuit amp for current-to-voltage conversion, the VCA features low distortion, low noise and wide dynamic range. AUDIO SIGNAL PROCESSING IC COMBINES VCA AND FAST ATTACK/SLOW RECOVERY LEVEL SENSOR The novel level sensor which provides gain control current for the VCA gives lower gain control ripple and independent control of fast attack, slow recovery dynamic response. An attack capacitor CA with an internal 10k resistor RA defines the attack time tA. The recovery time tR of a tone burst is defined by a recovery capacitor CR and an internal 10k resistor RR. Typical attack time of 4ms for the high-frequency spectrum and 40ms for the low frequency band can be obtained with 0.1F and 1.0F attack capacitors, respectively. Recovery time of 200ms can be obtained with a 4.7F recovery capacitor for a 100Hz signal, the third harmonic distortion is improved by more than 10dB over the simple RC ripple filter with a single 1.0F attack and recovery capacitor, while the attack time remains the same. In high-performance audio gain control applications, it is desirable to independently control the attack and recovery time of the gain control signal. This is true, for example, in compandor applications for noise reduction. In high end systems the input signal is usually split into two or more frequency bands to optimize the dynamic behavior for each band. This reduces low frequency distortion due to control signal ripple, phase distortion, high frequency channel overload and noise modulation. Because of the expense in hardware, multiple band signal processing up to now was limited to professional audio applications. With the introduction of the Signetics SA572 this high-performance noise reduction concept becomes feasible for consumer hi fi applications. The SA572 is a dual channel gain control IC. Each channel has a linearized, temperature-compensated gain cell and an improved level sensor. In conjunction with an external low noise op 1998 Nov 03 The SA572 is assembled in a standard 16-pin dual in-line plastic package and in oversized SOL package. It operates over a wide supply range from 6V to 22V. Supply current is less than 6mA. The SA572 is designed for applications from -40C to +85C. 4 Philips Semiconductors Product specification Programmable analog compandor SA572 where I IN V IN R1 SA572 BASIC APPLICATIONS V TI n Description The SA572 consists of two linearized, temperature-compensated gain cells (G), each with a full-wave rectifier and a buffer amplifier as shown in the block diagram. The two channels share a 2.5V common bias reference derived from the power supply but otherwise operate independently. Because of inherent low distortion, low noise and the capability to linearize large signals, a wide dynamic range can be obtained. The buffer amplifiers are provided to permit control of attack time and recovery time independent of each other. Partitioned as shown in the block diagram, the IC allows flexibility in the design of system levels that optimize DC shift, ripple distortion, tracking accuracy and noise floor for a wide range of application requirements. V TI n 1 1 I IO 2 2 G IS where I IN V TI n 2 1 I IN I G I 2 2I 1 I G I2 I2 V IN R1 R1 = 6.8k I1 = 140A I2 = 280A V+ 1 1 I I 2 O 2 G I1 140A A1 IO - + Q3 Q1 Q2 R1 6.8k I2 280A IG VREF THD TRIM VIN Figure 4. Basic Gain Cell Schematic 1998 Nov 03 (3) The residual distortion is third harmonic distortion and is caused by gain control ripple. In a compandor system, available control of fast attack and slow recovery improve ripple distortion significantly. At the unity gain level of 100mV, the gain cell gives THD (total harmonic distortion) of 0.17% typ. Output noise with no input signals is only 6V in the audio spectrum (10Hz-20kHz). The output current IO must feed the virtual ground input of an operational amplifier with a resistor from output to inverting input. The non-inverting input of the operational amplifier has to be biased at VREF if the output current IO is DC coupled. 1 1 I IO 2 2 G IS Q4 (2) The first term of Equation 3 shows the multiplier relationship of a linearized two quadrant transconductance amplifier. The second term is the gain control feedthrough due to the mismatch of devices. In the design, this has been minimized by large matched devices and careful layout. Offset voltage is caused by the device mismatch and it leads to even harmonic distortion. The offset voltage can be trimmed out by feeding a current source within 25A into the THD trim pin. Q1Q2 (VBE = VT IIN IC/IS) I 2 I 1 I IN IS If all transistors Q1 through Q4 are of the same size, equation (2) can be simplified to: IO BE IO is the differential output current of the gain cell and IG is the gain control current of the gain cell. Figure 4 shows the circuit configuration of the gain cell. Bases of the differential pairs Q1-Q2 and Q3-Q4 are both tied to the output and inputs of OPA A1. The negative feedback through Q1 holds the VBE of Q1-Q2 and the VBE of Q3-Q4 equal. The following relationship can be derived from the transistor model equation in the forward active region. Q3Q4 V TI n R1 = 6.8k I1 = 140A I2 = 280A Gain Cell V BE I 1 I IN IS 5 SR00697 Philips Semiconductors Product specification Programmable analog compandor SA572 Rectifier Buffer Amplifier The rectifier is a full-wave design as shown in Figure 5. The input voltage is converted to current through the input resistor R2 and turns on either Q5 or Q6 depending on the signal polarity. Deadband of the voltage to current converter is reduced by the loop gain of the gain block A2. If AC coupling is used, the rectifier error comes only from input bias current of gain block A2. The input bias current is typically about 70nA. Frequency response of the gain block A2 also causes second-order error at high frequency. The collector current of Q6 is mirrored and summed at the collector of Q5 to form the full wave rectified output current IR. The rectifier transfer function is In audio systems, it is desirable to have fast attack time and slow recovery time for a tone burst input. The fast attack time reduces transient channel overload but also causes low-frequency ripple distortion. The low-frequency ripple distortion can be improved with the slow recovery time. If different attack times are implemented in corresponding frequency spectrums in a split band audio system, high quality performance can be achieved. The buffer amplifier is designed to make this feature available with minimum external components. Referring to Figure 6, the rectifier output current is mirrored into the input and output of the unipolar buffer amplifier A3 through Q8, Q9 and Q10. Diodes D11 and D12 improve tracking accuracy and provide common-mode bias for A3. For a positive-going input signal, the buffer amplifier acts like a voltage-follower. Therefore, the output impedance of A3 makes the contribution of capacitor CR to attack time insignificant. Neglecting diode impedance, the gain Ga(t) for G can be expressed as follows: IR V IN V REF R2 (4) If VIN is AC-coupled, then the equation will be reduced to: I RAC V IN(AVG) R2 t The internal bias scheme limits the maximum output current IR to be around 300A. Within a 1dB error band the input range of the rectifier is about 52dB. V+ IR Ga(t) (Ga INT Ga FNL e tA Ga FNL GaINT=Initial Gain GaFNL=Final Gain V IN V REF A=RA * CA=10k * CA R2 where A is the attack time constant and RA is a 10k internal resistor. Diode D15 opens the feedback loop of A3 for a negative-going signal if the value of capacitor CR is larger than capacitor CA. The recovery time depends only on CR * RR. If the diode impedance is assumed negligible, the dynamic gain GR (t) for G is expressed as follows. + VREF A2 - t Q5 G R(t) (G RINT G RFNL e tR G RFNL GR(t)=(GR INT-GR FNL) e +GR FNL R=RR * CR=10k * CR D7 where R is the recovery time constant and RR is a 10k internal resistor. The gain control current is mirrored to the gain cell through Q14. The low level gain errors due to input bias current of A2 and A3 can be trimmed through the tracking trim pin into A3 with a current source of 3A. Q6 R2 VIN SR00698 Figure 5. Simplified Rectifier Schematic 1998 Nov 03 6 Philips Semiconductors Product specification Programmable analog compandor SA572 V+ Q8 Q9 Q10 IQ = 2IR2 Q17 IR2 X2 Q16 IR 10k V IN R - D15 D13 A3 + 10k IR1 X2 Q18 Q14 D11 D12 CR CA TRACKING TRIM SR00699 Figure 6. Buffer Amplifier Schematic error. However, an impedance buffer A1 may be necessary if the input is voltage drive with large source impedance. Basic Expandor Figure 7 shows an application of the circuit as a simple expandor. The gain expression of the system is given by V OUT V IN 2 I1 R 3 V IN(AVG) R2 R1 The gain cell output current feeds the summing node of the external OPA A2. R3 and A2 convert the gain cell output current to the output voltage. In high-performance applications, A2 has to be low-noise, high-speed and wide band so that the high-performance output of the gain cell will not be degraded. The non-inverting input of A2 can be biased at the low noise internal reference Pin 6 or 10. Resistor R4 is used to bias up the output DC level of A2 for maximum swing. The output DC level of A2 is given by (5) (I1=140A) Both the resistors R1 and R2 are tied to internal summing nodes. R1 is a 6.8k internal resistor. The maximum input current into the gain cell can be as large as 140A. This corresponds to a voltage level of 140A * 6.8k=952mV peak. The input peak current into the rectifier is limited to 300A by the internal bias system. Note that the value of R1 can be increased to accommodate higher input level. R2 and R3 are external resistors. It is easy to adjust the ratio of R3/R2 for desirable system voltage and current levels. A small R2 results in higher gain control current and smaller static and dynamic tracking 1998 Nov 03 V ODC V REF 1 R3 R4 VB R3 (6) R4 VB can be tied to a regulated power supply for a dual supply system and be grounded for a single supply system. CA sets the attack time constant and CR sets the recovery time constant. *5COL 7 Philips Semiconductors Product specification Programmable analog compandor SA572 R4 R3 +VB 17.3k - CIN2 A1 CIN1 VIN R1 (7,9) + (5,11) G 6.8k VOUT A2 (6,10) R6 2.2F VREF 1k (2,14) R5 100k C1 2.2F (4,12) BUFFER CIN3 2.2F R2 3.3k CA CR 1F 10F (3,13) (8) (16) +VCC SR00700 Figure 7. Basic Expandor Schematic Basic Compressor R4 RDC1 Figure 8 shows the hook-up of the circuit as a compressor. The IC is put in the feedback loop of the OPA A1. The system gain expression is as follows: V OUT V IN R2 R1 I1 2 R 3 V IN(AVG) C2 1 2 VIN VB R4 R DC1 R DC2 R4 .1F CIN1 (7) R DC1 R DC2 9.1k CDC 10F D1 2.2F D2 - R3 17.3k RDC1, RDC2, and CDC form a DC feedback for A1. The output DC level of A1 is given by V ODC V REF 1 RDC2 9.1k VOUT A1 + C1 (8) 1k R5 (6,10) VREF R1 G (7,9) 6.8k The zener diodes D1 and D2 are used for channel overload protection. CIN2 2.2F (5,11) (2,14) (4,12) CIN3 2.2F BUFFER 3.3k R2 CR 10F CA 1F (3,13) (8) VCC (16) Figure 8. Basic Compressor Schematic 1998 Nov 03 8 SR00701 Philips Semiconductors Product specification Programmable analog compandor SA572 bandlimiting, band splitting, pre-emphasis, de-emphasis and equalization are easy to incorporate. The IC is a versatile functional block to achieve a high performance audio system. Figure 9 shows the system level diagram for reference. Basic Compandor System The above basic compressor and expandor can be applied to systems such as tape/disc noise reduction, digital audio, bucket brigade delay lines. Additional system design techniques such as 1 2 VRMS 3.0V 2 REL LEVEL COMPRESSION IN EXPANDOR OUT INPUT TO G AND RECT dB ABS LEVEL dBM +29.54 +11.76 +14.77 +12.0 -3.00 -5.78 100MV 0.0 -17.78 10MV -20 -37.78 1MV -40 -57.78 100V -60 -77.78 10V -80 -97.78 547.6MV 400MV SR00702 Figure 9. SA572 System Level 1998 Nov 03 9 Philips Semiconductors Product specification Programmable analog compandor SA572 SO16: plastic small outline package; 16 leads; body width 7.5 mm 1998 Nov 03 10 SOT162-1 Philips Semiconductors Product specification Programmable analog compandor SA572 DIP16: plastic dual in-line package; 16 leads (300 mil) 1998 Nov 03 11 SOT38-4 Philips Semiconductors Product specification Programmable analog compandor SA572 Data sheet status Data sheet status Product status Definition [1] Objective specification Development This data sheet contains the design target or goal specifications for product development. Specification may change in any manner without notice. Preliminary specification Qualification This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make chages at any time without notice in order to improve design and supply the best possible product. Product specification Production This data sheet contains final specifications. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. [1] Please consult the most recently issued datasheet before initiating or completing a design. Definitions Short-form specification -- The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition -- Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information -- Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Disclaimers Life support -- These products are not designed for use in life support appliances, devices or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes -- Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Copyright Philips Electronics North America Corporation 1998 All rights reserved. Printed in U.S.A. Philips Semiconductors 811 East Arques Avenue P.O. Box 3409 Sunnyvale, California 94088-3409 Telephone 800-234-7381 Date of release: 11-98 Document order number: 1998 Nov 03 12 9397 750 04749