1
2
3
45
6
7
8
NC
OUT
V+
NC
V–
+IN
–IN
REF
D PACKAGE
(TOP VIEW)
NC – No internal connection
INA148-Q1
www.ti.com
SBOS472A –MARCH 2009–REVISED OCTOBER 2011
±
200-V COMMON-MODE VOLTAGE DIFFERENCE AMPLIFIER
Check for Samples: INA148-Q1
1FEATURES APPLICATIONS
•Qualified for Automotive Applications •Current-Shunt Measurements
•High Common-Mode Voltage •Differential Sensor Amplifiers
–75 V at VS=5V •Line Receivers
– ±200 V at VS=±15 V •Battery-Powered Systems
•Fixed Differential Gain = 1 V/V •Automotive Instrumentation
•Low Quiescent Current: 260 µA•Stacked-Cell Monitors
•Wide Supply Range
–Single Supply: 2.7 V to 36 V
–Dual Supplies: ±1.35 V to ±18 V
•Low Gain Error: 0.075% Max
•Low Nonlinearity: 0.002% Max
•High CMR: 86 dB
•Surface-Mount SO-8 (D) Package
DESCRIPTION
The INA148 is a precision low-power unity-gain difference amplifier with a high common-mode input voltage
range. It consists of a monolithic precision bipolar operational amplifier with a thin-film resistor network.
The on-chip resistors are laser trimmed for an accurate 1-V/V differential gain and high common-mode rejection.
Excellent temperature tracking of the resistor network maintains high gain accuracy and common- mode rejection
over temperature. The INA148 operates on single or dual supplies.
The INA148 is available in a small SO-8 surface-mount package, and it is specified for operation over the
temperature range of –40°C to 125°C.
ORDERING INFORMATION(1)
TAPACKAGE(2) ORDERABLE PART NUMBER TOP-SIDE MARKING
–40°C to 125°C SOIC –D Reel of 2500 INA148QDRQ1 148Q1
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
web site at www.ti.com.
(2) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.
1Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date. Copyright ©2009–2011, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
INA148-Q1
SBOS472A –MARCH 2009–REVISED OCTOBER 2011
www.ti.com
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
ABSOLUTE MAXIMUM RATINGS(1)
over operating free-air temperature range (unless otherwise noted)
VSSupply voltage, V+ to V–36 V
Continuous ±200 V
VIN Input voltage Peak (0.1 second) ±500 V
tSS Short circuit to ground duration Continuous
θJA Package thermal impedance, junction to free air 97.1°C/W
TAOperating free-air temperature range –40°C to 125°C
TJMaximum operating virtual-junction temperature 150°C
Tstg Storage temperature range –65°C to 150°C
Tlead Lead temperature range (soldering, 10 seconds) 300°C
Human-Body Model (HBM) 1500 V
ESD Electrostatic discharge rating Machine Model (MM) 150 V
Charged-Device Model (CDM) 2000 V
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
RECOMMENDED OPERATING CONDITIONS
MIN MAX UNIT
Single supply 2.7 36
VSSupply voltage V
Dual supply ±1.35 ±18
TAOperating free-air temperature –40 125 °C
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INA148-Q1
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SBOS472A –MARCH 2009–REVISED OCTOBER 2011
ELECTRICAL CHARACTERISTICS
VS=±5 V to ±15 V (dual supply), RL= 10 kΩto ground, VREF = 0 V, TA= 25°C (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
VS=±15 V ±1±5
VOS Input offset voltage(1) (2) VCM = 0 V mV
VS=±5 V ±1±5
ΔVOS/ΔT Input offset voltage drift(1) TA=–40°C to 125°C±10 μV/°C
PSRR Power supply ripple rejection(1) VS=±1.35 V to ±18 V, VCM = 0 V ±50 ±400 μV/V
VS=±15 V –200 200
VCM Common-mode voltage range V+IN –V–IN = 0 V
VS=±5 V –100 80
VS=±15 V, VCM =–200 V to 200 V, RS= 0 Ω70 86
CMRR Common-mode rejection ratio dB
VS=±5 V, VCM =–100 V to 80 V, RS= 0 Ω70 86
Differential input impedance 2 MΩ
Common-mode input impedance 1 MΩ
VnVoltage noise(1) (3) f = 0.1 Hz to 10 Hz 17 μVp-p
Voltage noise density(1) (3) f = 1 kHz 880 nV/√Hz
Initial gain(1) 1 V/V
Gain error VO= (V–+ 0.5) to (V+ –1.5) ±0.01 ±0.075 %
Gain error over temperature ±3±10 ppm/°C
±0.00
VS=±15 V ±0.002 %FSR
1
Gain nonlinearity VO= (V–+ 0.5) to (V+ –1.5) ±0.00
VS=±5 V %FSR
1
Small signal bandwidth frequency 100 kHz
response
SR Slew rate 1 V/μs
0.1% 21
VS=±15 V, 10-V step 0.01% 25
tsSettling time μs
0.1% 21
VS=±5 V, 6-V step 0.01% 25
Overload recovery 50% input overload 24 μs
RL= 100 kΩV–+ 0.25 V+ –1
VOOutput voltage V
RL= 10 kΩV–+ 0.5 V+ –1.5
IOOutput current Short-circuit current, continuous to common ±13 mA
CLLoad capacitance Stable operation 10 nF
ISSupply current VIN = 0, IO= 0 ±260 ±300 μA
(1) Overall difference amplifier configuration. Referred to input pins (V+IN and V–IN ), gain = 1 V/V.
(2) Includes effects of amplifier's input bias and offset currents.
(3) Includes effects of input current noise and thermal noise contribution of resistor network.
Copyright ©2009–2011, Texas Instruments Incorporated Submit Documentation Feedback 3
Product Folder Link(s): INA148-Q1
INA148-Q1
SBOS472A –MARCH 2009–REVISED OCTOBER 2011
www.ti.com
ELECTRICAL CHARACTERISTICS
VS= 5 V (single supply), RL= 10 kΩto VS/2, VREF = VS/2, TA= 25°C (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
VOS Input offset voltage(1) (2) VCM = VS/2 ±1±5 mV
ΔVOS/ΔT Input offset voltage drift(1) TA=–40°C to 125°C±10 μV/°C
PSRR Power supply ripple rejection(1) VS= 2.7 V to 36 V, VCM = VS/2 ±50 ±400 μV/V
VREF = 0.25 V –4 75
VCM Common-mode voltage range V+IN –V–IN = 0 V
VREF = VS/2 –47.5 32.5
CMRR Common-mode rejection ratio VCM =–47.5 V to 32.5 V, RS= 0 Ω70 86 dB
Differential input impedance 2 MΩ
Common-mode input impedance 1 MΩ
VnVoltage noise(1) (3) f = 0.1 Hz to 10 Hz 17 μVp-p
Voltage noise density(1) (3) f = 1 kHz 880 nV/√Hz
Initial gain(1) 1 V/V
Gain error VO= 0.5 V to 3.5 V ±0.01 ±0.075 %
Gain error over temperature ±3±10 ppm/°C
±0.00
Gain nonlinearity VO= 0.5 V to 3.5 V %FSR
1
Small signal bandwidth 100 kHz
SR Slew rate 1 V/μs
0.1% 21
tsSettling time VS= 5 V, 3-V step μs
0.01% 25
Overload recovery 50% input overload 13 μs
RL= 100 kΩV–+ 0.25 V+ –1
VOOutput voltage V
RL= 10 kΩV–+ 0.5 V+ –1.5
IOOutput current Short-circuit current, continuous to common ±8 mA
CLLoad capacitance Stable operation 10 nF
IQQuiescent current VIN = 0, IO= 0 260 300 μA
(1) Overall difference amplifier configuration. Referred to input pins (V+IN and V–IN ), gain = 1 V/V.
(2) Includes effects of amplifier's input bias and offset currents.
(3) Includes effects of input current noise and thermal noise contribution of resistor network.
4Submit Documentation Feedback Copyright ©2009–2011, Texas Instruments Incorporated
Product Folder Link(s): INA148-Q1
5
0
–5
–10
–20
–25
–30
–35
10 100 1k 10k 100k 1M
Voltage Gain (dB)
Frequency (Hz)
GAIN vs FREQUENCY
V
S
= ±1.35 V
V
S
= 15 V±
100
80
60
40
20
0
10 100 1k 10k 100k 1M
Voltage Gain (dB)
Frequency (Hz)
COMMON-MODE REJECTION vs FREQUENCY
= V
S
= ±15 V
= V
S
= 1.35 V±
110
100
90
80
70
60
50
40
30
20
10
110 100 1k 10k 100k
Power Supply Rejection (dB)
POWER SUPPLY REJECTION vs FREQUENCY
PSR+
(V = ±18 V)
S
PSR+
(V = 1.35 V)
S±
PSR–
(V = 18 V)
S±
PSR–
(V = 1.35 V)
S±
Frequency (Hz)
800
1000
600
400
200
100
10 100 1k 10k 100k
INPUT VOLTAGE NOISE SPECTRAL DENSITY
Input Noise Spectral Density (nV/ Hz)Ö
Frequency (Hz)
1 s/div
5 µV/div
VOLTAGE NOISE (RTI)
0.1 Hz to 10 Hz
290
280
270
260
250
240
230
220
210
–60 –40 –20 0 20 40 60 80 100 120 140
Temperature (°C)
IQ
QUIESCENT CURRENT vs TEMPERATURE
V = 2.5 V
S±
V = ±15 V
S
(µA)
INA148-Q1
www.ti.com
SBOS472A –MARCH 2009–REVISED OCTOBER 2011
TYPICAL CHARACTERISTICS
VS=±15 V, RL= 10 kΩto common, VREF = 0 V, TA= 25°C (unless otherwise noted)
Copyright ©2009–2011, Texas Instruments Incorporated Submit Documentation Feedback 5
Product Folder Link(s): INA148-Q1
20
15
10
5
0
–5
–10
–15
–20
–60 –40 –20 020 40 60 80 100 120 140
+SC
–SC
SHORT-CIRCUIT CURRENT vs TEMPERATURE
Temperature (°C)
Short-Circuit Current (mA)
5 V/div
25 µs/div
125°C 125°C
–55°C–55°C
LARGE-SIGNAL STEP RESPONSE
vs TEMPERATURE
5 V/div
R = 1 k
LW
R = 10 k
LW
R = 100 k
LW
R = 1 k
LW
R = 10 k
LW
R = 100 k
LW
OUTPUT VOLTAGE SWING vs RL
1 ms/div
25 ms/div
LARGE-SIGNAL STEP RESPONSE
(R = 10 k , C = 10 pF)
L L
W
5 V/div
10 ms/div
50 mV/div
SMALL-SIGNAL STEP RESPONSE
(R = 10 k , C = 10 pF)
L L
W
5 V/div
100 µs/div
LARGE-SIGNAL CAPACITIVE LOAD RESPONSE
(C = 1 nF and 10 nF)
L
VIN
C = 1 nF
LC = 10 nF
LG = +1 V/V
INA148-Q1
SBOS472A –MARCH 2009–REVISED OCTOBER 2011
www.ti.com
TYPICAL CHARACTERISTICS (continued)
VS=±15 V, RL= 10 kΩto common, VREF = 0 V, TA= 25°C (unless otherwise noted)
6Submit Documentation Feedback Copyright ©2009–2011, Texas Instruments Incorporated
Product Folder Link(s): INA148-Q1
24
18
12
6
0
–5.0
–4.0
–3.0
–2.0
–1.0
0.0
1.0
2.0
3.0
4.0
5.0
Offset Voltage, RTI (mV)
Percent of Amplifiers (%)
V = ±15 V
S
OFFSET VOLTAGE PRODUCTION DISTRIBUTION
20
15
10
5
0
–30.0
–24.0
–18.0
–12.0
–6.0
0.0
6.0
12.0
18.0
24.0
30.0
Offset Voltage Drift, RTI (µV/°C)
Percent of Amplifiers (%)
OFFSET VOLTAGE DRIFT
PRODUCTION DISTRIBUTION
V
S
= 15 V±
–30.0
–24.0
–18.0
–12.0
–6.0
0.0
6.0
12.0
18.0
24.0
30.0
Offset Voltage Drift, RTI (µV/°C)
Percent of Amplifiers (%)
OFFSET VOLTAGE DRIFT
PRODUCTION DISTRIBUTION
V
S
= 2.5 V±
20
15
10
5
0
40
30
20
10
0
–10.0
–8.0
–6.0
–4.0
–2.0
0.0
2.0
4.0
6.0
8.0
10.0
Gain Drift (ppm/°C)
Percent of Amplifiers (%)
GAIN DRIFT PRODUCTION DISTRIBUTION
V = ±2.5 V
S
INA148-Q1
www.ti.com
SBOS472A –MARCH 2009–REVISED OCTOBER 2011
TYPICAL CHARACTERISTICS (continued)
VS=±15 V, RL= 10 kΩto common, VREF = 0 V, TA= 25°C (unless otherwise noted)
Copyright ©2009–2011, Texas Instruments Incorporated Submit Documentation Feedback 7
Product Folder Link(s): INA148-Q1
5 ms/div
5 V/div
NON-INVERTING INPUT
50% OVERLOAD RECOVERY TIME
V+IN
VOUT
0 V
VS= ±15V
5 ms/div
INVERTING INPUT
50% OVERLOAD RECOVERY TIME
VS= ±15 V
V–IN
VOUT
0 V
0 V
5 V/div
INA148-Q1
SBOS472A –MARCH 2009–REVISED OCTOBER 2011
www.ti.com
TYPICAL CHARACTERISTICS (continued)
VS=±15 V, RL= 10 kΩto common, VREF = 0 V, TA= 25°C (unless otherwise noted)
8Submit Documentation Feedback Copyright ©2009–2011, Texas Instruments Incorporated
Product Folder Link(s): INA148-Q1
1 MW50 kW
52.6316 kW
50 kW
2.7778 kW
1 MW
V+IN
7
3
2
6
4 1
A1
INA148
–V
S
V
O
V–IN
0.1 µF
+V
S
0.1 µF
V = (V – V )
O+IN –IN
INA148-Q1
www.ti.com
SBOS472A –MARCH 2009–REVISED OCTOBER 2011
APPLICATION INFORMATION
The INA148 is a unity-gain difference amplifier with a high common-mode input voltage range. A basic diagram
of the circuit and pin connections is shown in Figure 1.
Figure 1. Basic Circuit Connections
To achieve its high common-mode voltage range, the INA148 features a precision laser-trimmed thin-film resistor
network with a 20:1 input voltage divider ratio. High input voltages are thereby reduced in amplitude, allowing the
internal operational amplifier (op amp) to "see" input voltages that are within its linear operating range. A "Tee"
network in the op amp feedback network places the amplifier in a gain of 20 V/V, thus restoring the circuit's
overall gain to unity (1 V/V).
External voltages can be summed into the amplifier's output by using the REF pin, making the differential
amplifier a highly versatile design tool. Voltages on the REF pin also influence the INA148's common-mode
voltage range.
In accordance with good engineering practice for linear integrated circuits, the INA148's power-supply bypass
capacitors should be connected as close to pins 4 and 7 as practicable. Ceramic or tantalum types are
recommended for use as bypass capacitors.
The input impedances are unusually high for a difference amplifier and this should be considered when routing
input signal traces on a PC board. Avoid placing digital signal traces near the difference amplifier's input traces to
minimize noise pickup.
Operating Voltage
The INA148 is specified for ±15-V and ±5-V dual supplies and 5-V single supplies. The INA148 can be operated
with single or dual supplies with excellent performance.
The INA148 is fully characterized for supply voltages from ±1.35 V to ±18 V and over temperatures of –40°C to
125°C. Parameters that vary significantly with operating voltage, load conditions, or temperature are shown in the
Typical Characteristics section.
Gain Equation
An internal on-chip resistor network sets the overall differential gain of the INA148 to precisely 1 V/V. Output is
accordance with Equation 1.
VOUT = (V+IN –V–IN) + VREF (1) (1)
Copyright ©2009–2011, Texas Instruments Incorporated Submit Documentation Feedback 9
Product Folder Link(s): INA148-Q1
1 MW50 kW
52.6316 kW
50 kW
10 kW
10 kW
+15 V
–15 V
10 W
2.7778 kW
1 MW190 W
7
3
2
6
4 1
A1
INA148
–V
S
V
O
+V
S
±15-mV Offset Trim Range, RTI
V
REF
V+IN
V–IN
V = (V – V )
O +IN –IN
INA148-Q1
SBOS472A –MARCH 2009–REVISED OCTOBER 2011
www.ti.com
Common-Mode Range
The 20:1 input resistor ratio of the INA148 provides an input common-mode range that extends well beyond its
power supply rails.
The exact input voltage range depends on the amplifier's power-supply voltage and the voltage applied to the
REF terminal (pin 1). Typical input voltage ranges at different power supply voltages can be found in the
applications circuits section.
Offset Trim
The INA148 is laser-trimmed for low offset voltage and drift. Most applications require no external offset
adjustment.
Because a voltage applied to the reference (REF) pin (pin 1) is summed directly into the amplifier's output signal,
this technique can be used to null the amplifier's input offset voltage. Figure 2 shows an optional circuit for
trimming the offset voltage.
Figure 2. Optional Offset Trim Circuit
To maintain high common-mode rejection (CMR), the source impedance of any signal applied to the REF
terminal should be very low (≤5Ω).
A source impedance of only 10 Ωat the REF pin reduces the INA148's CMR to approximately 74 dB. High CMR
can be restored if a resistor is added in series with the amplifier's positive input terminal (pin 3). This resistor
should be 19 times the source impedance that drives the REF pin. For example, if the REF pin sees a source
impedance of 10 Ω, a resistor of 190 Ωshould be added in series with pin 3.
Preferably, the offset trim voltage applied to the REF pin should be buffered with an amplifier such as an
OPA237 (see Figure 3). In this case, the op amp output impedance is low enough that no external resistor is
needed to maintain the INA148's excellent CMR.
10 Submit Documentation Feedback Copyright ©2009–2011, Texas Instruments Incorporated
Product Folder Link(s): INA148-Q1
1 MW50 kW
52.6316 kW
50 kW
2.7778 kW
1 MW
7
3
2
6
41
A1
INA148
–15 V
V
O
+15 V
±15-mV Offset Trim Range, RTI
100 kW
100 kW
100 W
+15 V
–15 V
V
REF
OPA237
V+IN
V–IN
V = (V – V )
O +IN –IN
1 MW50 kW
52.6316 kW
50 kW
2.7778 kW
1 MWR
C
R
S
I
L
V
CM
7
3
200 V
2
6
4 1
A1
INA148
–15 V
V
O
+15 V
Load
V
O
= I
L
× R
S
Make R
C
= R
S
if R
S
100³ W
INA148-Q1
www.ti.com
SBOS472A –MARCH 2009–REVISED OCTOBER 2011
Figure 3. Preferred Offset Trim Circuit
Input Impedance
The input resistor network determines the impedance of each of the INA148 inputs. It is approximately 1 MΩ.
Unlike an instrumentation amplifier, signal source impedances at the two input terminals must be nearly equal to
maintain good common-mode rejection.
A mismatch between the two inputs' source impedances causes a differential amplifier's common-mode rejection
to be degraded. With a source impedance imbalance of only 500 Ω, CMR can fall to approximately 66 dB.
Figure 4 shows a common application—measuring power supply current through a shunt resistor (RS). A shunt
resistor creates an unbalanced source resistance condition that can degrade a differential amplifier's common
mode rejection.
Figure 4. Shunt-Resistor Current Measurement Circuit
Unless the shunt resistor is less than approximately 100 Ω, an additional equal compensating resistor (RC) is
recommended to maintain input balance and high CMR.
Copyright ©2009–2011, Texas Instruments Incorporated Submit Documentation Feedback 11
Product Folder Link(s): INA148-Q1
1 MW50 kW
52.6316 kW
50 kW
2.7778 kW
1 MW
7
3
2
6
4 1
A1
INA148
–15 V
V
O
+15 V
Typical CMR: 50 Hz = 59 dB
60 Hz = 61 dB
400 Hz = 78 dB
NOTE: (1) Metallized polypropylene, ±5% tolerance.
C1
4.7 µF
250 V
(1)
C2
4.7 µF
250 V
(1)
V
CM
= 200 Vpk
V+IN
V–IN
V = (V – V )
O+IN –IN
1 MW50 kW
52.6316 kW
50 kW
2.7778 kW
1 MW
–VS
V+IN
4
3
2
6
A1
INA148
VO
V–IN
0.22 µF
1
VREF
+VS
–VS
+VS
7
U2:
OPA132 for VS= ±5 V to ±15 V
OPA340 for VS= ±2.5 V
1 MW
U1
fC»0.75 Hz HPF
2
3
U2 4
7
6
VO= (V+IN – V–IN) + VREF
INA148-Q1
SBOS472A –MARCH 2009–REVISED OCTOBER 2011
www.ti.com
Source impedances (or shunts) greater than 5 kΩare not recommended, even if they are "perfectly"
compensated. This is because the internal resistor network is laser-trimmed for accurate voltage divider ratios,
but not necessarily to absolute values. Input resistors are shown as 1 MΩ, however, this is only their nominal
value.
In practice, the input resistors' absolute values may vary by as much as 30%. The two input resistors match to
about 5%, so adding compensating resistors greater than 5 kΩcan cause a serious mismatch in the resulting
resistor network voltage divider ratios, thus degrading CMR.
Attempts to extend the INA148 input voltage range by adding external resistors is not recommended for the
reasons described in the previous paragraph. CMR suffers serious degradation unless the resistors are carefully
trimmed for CMR and gain. This is an iterative adjustment and can be tedious and time consuming.
Typical Application Circuits
Figure 5 through Figure 9 show typical application circuits for the INA148.
Figure 5. AC-Coupled Difference Amplifier
Figure 6. Quasi-AC-Coupled Differential Amplifier
12 Submit Documentation Feedback Copyright ©2009–2011, Texas Instruments Incorporated
Product Folder Link(s): INA148-Q1
1 MW50 kW
52.6316 kW
50 kW
2.7778 kW
1 MW
V+IN
3
2
6
4 1
A1
INA148
VO
+5 V
V–IN
7
0.1 µF+5 V
VCM = –23 V to +56 V
VO= (V+IN – V–IN) + 1.235V
REF1004-1.2
10 µF
5W34 kW
+
1 MW50 kW
52.6316 kW
50 kW
2.7778 kW
1 MW
3
2
6
1
A1
INA148
REF1004-1.2
10 Fµ
5W
7
0.1 µF
4
0.01 W
+
+
–
28-V
Supply
I
C
271 kW
V
O
= 1.235 V + (I
C
× R
S
)
R
S
V
O
INA148-Q1
www.ti.com
SBOS472A –MARCH 2009–REVISED OCTOBER 2011
Figure 7. Single-Supply Differential Amplifier
Figure 8. Battery Monitor Circuit
Copyright ©2009–2011, Texas Instruments Incorporated Submit Documentation Feedback 13
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1 MW50 kW
52.6316 kW
50k W
2.7778 kW
1 MW
3
2
6
1
A1
INA148
7
4
VO
200 kW
RS
50 mV
shunt
2
3
7
4
6
–VISO
+VISO
1 kW
OPA277
I
VCM = –200V max
–15 V
–50-mV Input = –10-V Output
IN5245
IN5245
+VISO
–VISO
6
5
7
+15
C
–15
+VS
O
DCP011515D
2
1
0.47 F ceramic (all)µ
+15 V
+15 V
0.1 Fµ
0.1 µF
INA148-Q1
SBOS472A –MARCH 2009–REVISED OCTOBER 2011
www.ti.com
Figure 9. 50-mV Current-Shunt Amplifier with ±200-V Common-Mode Voltage Range
SPACER REVISION HISTORY
Changes from Original (March 2009) to Revision A Page
•Features Bullet From: Low Quiescent Current: 260 mA To: Low Quiescent Current: 260 µA ............................................. 1
14 Submit Documentation Feedback Copyright ©2009–2011, Texas Instruments Incorporated
Product Folder Link(s): INA148-Q1
PACKAGE OPTION ADDENDUM
www.ti.com 25-Oct-2011
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status (1) Package Type Package
Drawing Pins Package Qty Eco Plan (2) Lead/
Ball Finish MSL Peak Temp (3) Samples
(Requires Login)
INA148QDRQ1 ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-3-260C-168 HR
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF INA148-Q1 :
•Catalog: INA148
NOTE: Qualified Version Definitions:
•Catalog - TI's standard catalog product
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
INA148QDRQ1 SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 14-Jul-2012
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
INA148QDRQ1 SOIC D 8 2500 367.0 367.0 35.0
PACKAGE MATERIALS INFORMATION
www.ti.com 14-Jul-2012
Pack Materials-Page 2
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