©2002 Fairchild Semiconductor Corporation
www.fairchildsemi.com
www.fairchildsemi.comwww.fairchildsemi.com
www.fairchildsemi.com
Rev. 1.0.3
Features
FeaturesFeatures
Features
• High Current Drive Capability (200mA)
• Adjustable Duty Cycle
• Temperature Stability of 0.005%/°C
• Timing From µSec to Hours
• Turn off Time Less Than 2µSec
Applications
ApplicationsApplications
Applications
• Precision Timing
• Pulse Generation
• Time Delay Generation
• Sequential Timing
Description
DescriptionDescription
Description
The LM555/NE555/SA555 is a highly stable controller
capable of producing accurate timing pulses. With a
monostable operation, the time delay is controlled by one
external resistor and one capacitor. With an astable
operation, the frequency and duty cycle are accurately
controlled by two external resistors and one capacitor.
8-DIP
8-DIP8-DIP
8-DIP
8-SOP
8-SOP8-SOP
8-SOP
1
1
Internal Block Diagram
Internal Block DiagramInternal Block Diagram
Internal Block Diagram
F/F
F/FF/F
F/F
OutPut
OutPutOutPut
OutPut
Stage
StageStage
Stage
1
11
1
7
77
7
5
55
5
2
22
2
3
33
3
4
44
4
6
66
6
8
88
8
R
RR
RR
RR
RR
RR
R
Comp.
Comp.Comp.
Comp.
Comp.
Comp.Comp.
Comp.
Discharging Tr.
Discharging Tr.Discharging Tr.
Discharging Tr.
Vref
VrefVref
Vref
Vcc
VccVcc
Vcc
Discharge
DischargeDischarge
Discharge
Threshold
ThresholdThreshold
Threshold
Control
ControlControl
Control
Voltage
VoltageVoltage
Voltage
GND
GNDGND
GND
Trigger
TriggerTrigger
Trigger
Output
OutputOutput
Output
Reset
ResetReset
Reset
LM555/NE555/SA555
Single Timer
LM555/NE555/SA555
2
22
2
Absolute Maximum Ratings (T
Absolute Maximum Ratings (TAbsolute Maximum Ratings (T
Absolute Maximum Ratings (TA
AA
A = 25
= 25 = 25
= 25°
°°
°C)
C)C)
C)
Parameter
ParameterParameter
Parameter Symbol
SymbolSymbol
Symbol Value
ValueValue
Value Unit
UnitUnit
Unit
Supply Voltage VCC 16 V
Lead Temperature (Soldering 10sec) TLEAD 300 °C
Power Dissipation PD600 mW
Operating Temperature Range
LM555/NE555
SA555 TOPR 0 ~ +70
-40 ~ +85 °C
Storage Temperature Range TSTG -65 ~ +150 °C
LM555/NE555/SA555
3
33
3
Electrical Characteristics
Electrical CharacteristicsElectrical Characteristics
Electrical Characteristics
(TA = 25°C, VCC = 5 ~ 15V, unless otherwise specified)
Notes:
Notes:Notes:
Notes:
1. When the output is high, the supply current is typically 1mA less than at VCC = 5V.
2. Te sted at VCC = 5.0V and VCC = 15V.
3. This will de termine the ma ximum value of RA + RB for 15V operation, the max. total R = 20MΩ, and for 5V operatio n, the max.
total R = 6.7MΩ.
4. These parameters, although guaranteed, are not 100% tested in production.
Parameter
ParameterParameter
Parameter Symbol
SymbolSymbol
Symbol Conditions
ConditionsConditions
Conditions Min.
Min.Min.
Min. Typ.
Typ.Typ.
Typ. Max.
Max.Max.
Max. Unit
UnitUnit
Unit
Supply Voltage VCC -4.5-16V
Supply Current (Low Stable) (Note1) ICC VCC = 5V, RL = ∞-36mA
VCC = 15V, RL = ∞-7.515mA
Timing Error (Monostable)
Initial Accuracy (Note2)
Drift with Temperature (Note4)
Drift with Supply Voltage (Note4)
ACCUR
∆t/∆T
∆t/∆VCC
RA = 1kΩ to100kΩ
C = 0.1µF
-1.0
50
0.1
3.0
0.5
%
ppm/°C
%/V
Timing Error (Astable)
Intial Accuracy (Note2)
Drift with Temperature (Note4)
Drift with Supply Voltage (Note4)
ACCUR
∆t/∆T
∆t/∆VCC
RA = 1kΩ to 100kΩ
C = 0.1µF
-2.25
150
0.3
-%
ppm/°C
%/V
Control Voltage VCVCC = 15V 9.0 10.0 11.0 V
VCC = 5V 2.6 3.33 4.0 V
Threshold Voltage VTH VCC = 15V - 10.0 - V
VCC = 5V - 3.33 - V
Threshold Current (Note3) ITH -
--
--0.10.25 µA
Trigger Voltage VTR VCC = 5V 1.1 1.67 2.2 V
VCC = 15V 4.5 5 5.6 V
Trigger Current ITR VTR = 0V 0.01 2.0 µA
Reset Voltage VRST -
--
-0.40.71.0V
Reset Current IRST -
--
-0.10.4mA
Low Output Voltage VOL
VCC = 15V
ISINK = 10mA
ISINK = 50mA -0.06
0.3 0.25
0.75 V
V
VCC = 5V
ISINK = 5mA -0.050.35 V
High Output Voltage VOH
VCC = 15V
ISOURCE = 200mA
ISOURCE = 100mA 12.75 12.5
13.3 -V
V
VCC = 5V
ISOURCE = 100mA 2.75 3.3 - V
Rise Time of Output (Note4) tR-
--
- - 100 - ns
Fall Time of Output (Note4) tF-
--
- - 100 - ns
Discharge Leakage Current ILKG -
--
- - 20 100 nA
LM555/NE555/SA555
4
44
4
Application Information
Application InformationApplication Information
Application Information
Table 1 below is the basic operating table of 555 timer:
When the low signal input is applied to the reset terminal, the timer output remains low regardless of the threshold voltage or
the trigger voltage. Only when the high signal is applied to the reset terminal, the timer's output changes according to
threshold voltage and trigger voltage.
When the threshold voltage exceeds 2/3 of the supply voltage while the timer output is high, the time r's inter na l discharge Tr.
turns on, lowering the threshold voltage to below 1/3 of the supply voltage. During this time, the timer output is maintained
low. Later, if a low signal is applied to the trigger voltage so that it becomes 1/3 of the supply voltage, the timer's internal
discharge Tr. turns off, increasing the threshold voltage and driving the timer output again at high.
1. Monostable Operation
1. Monostable Operation1. Monostable Operation
1. Monostable Operation
Table 1. Basic Operating Table
Table 1. Basic Operating TableTable 1. Basic Operating Table
Table 1. Basic Operating Table
Threshold Voltage
Threshold Voltage Threshold Voltage
Threshold Voltage
(V
(V(V
(Vth
thth
th)(PIN 6)
)(PIN 6))(PIN 6)
)(PIN 6) Trigger Voltage
Trigger VoltageTrigger Voltage
Trigger Voltage
(V
(V(V
(Vtr
trtr
tr)(PIN 2)
)(PIN 2))(PIN 2)
)(PIN 2) Reset(PIN 4)
Reset(PIN 4)Reset(PIN 4)
Reset(PIN 4) Output(PIN 3)
Output(PIN 3)Output(PIN 3)
Output(PIN 3) Discharging Tr.
Discharging Tr.Discharging Tr.
Discharging Tr.
(PIN 7)
(PIN 7)(PIN 7)
(PIN 7)
Don't care Don't care Low Low ON
Vth > 2Vcc / 3 Vth > 2Vcc / 3 High Low ON
Vcc / 3 < Vth < 2 Vcc / 3 Vcc / 3 < Vth < 2 Vcc / 3 High - -
Vth < Vcc / 3 Vth < Vcc / 3 High High OFF
10
1010
10-5
-5-5
-5 10
1010
10-4
-4-4
-4 10
1010
10-3
-3-3
-3 10
1010
10-2
-2-2
-2 10
1010
10-1
-1-1
-1 10
1010
100
00
010
1010
101
11
110
1010
102
22
2
10
1010
10-3
-3-3
-3
10
1010
10-2
-2-2
-2
10
1010
10-1
-1-1
-1
10
1010
100
00
0
10
1010
101
11
1
10
1010
102
22
2
10M
10M10M
10MΩ
ΩΩ
Ω
1M
1M1M
1MΩ
ΩΩ
Ω
10k
10k10k
10kΩ
ΩΩ
Ω
100k
100k100k
100kΩ
ΩΩ
Ω
R
RR
RA
AA
A=1k
=1k=1k
=1kΩ
ΩΩ
Ω
Capacitance(uF)
Capacitance(uF)Capacitance(uF)
Capacitance(uF)
Ti m e D el a y(s)
Ti m e D el a y(s)Ti m e D el a y(s)
Ti m e D el a y(s)
Figure 1. Monoatable Circuit
Figure 1. Monoatable CircuitFigure 1. Monoatable Circuit
Figure 1. Monoatable Circuit Figure 2. Resistance and Capacitance vs.
Figure 2. Resistance and Capacitance vs.Figure 2. Resistance and Capacitance vs.
Figure 2. Resistance and Capacitance vs.
Time delay(t
Time delay(tTime delay(t
Time delay(td
dd
d)
))
)
Figure 3. Waveforms of Monostable Operation
Figure 3. Waveforms of Monostable OperationFigure 3. Waveforms of Monostable Operation
Figure 3. Waveforms of Monostable Operation
1
5
6
7
8
4
2
3
RESET Vcc
DISCH
THRES
CONT
GND
OUT
TRIG
+Vcc
RA
C1
C2RL
Trigger
LM555/NE555/SA555
5
55
5
Figure 1 illustrates a monostable circuit. In this mode, the timer generates a fixed pulse whenever the trigger voltage falls
below Vcc/3. When the trigger pulse voltage applied to the #2 pin falls below Vcc/3 while the timer output is low, the timer's
internal flip-flop turns the discharging T r. off and causes the timer output to become high by charging the external capacitor C1
and setting the flip-flop output at the same time.
The voltage across the external capacitor C1, VC1 increases exponentially with the time constant t=RA*C and reaches 2Vcc/3
at td=1.1RA*C. Hence, capacitor C1 is charged through resistor RA. The greater the time constant RAC, the longer it takes
for the VC1 to reach 2Vcc/3. In other words, the time constant RAC controls the output pulse width.
When the applied voltage to the capacitor C1 reaches 2Vcc/3, the comparator on the trigger terminal resets the flip-flop,
turning the discharging Tr. on. At this time, C1 begins to discharge and the timer output converts to low.
In this way, the timer operating in the monostable repeats the above process. Figure 2 shows the time constant relationship
based on RA and C. Figure 3 shows the general waveforms during the monostable operation.
It must be not ed that , for a norma l oper ati on, the trig ger pul se vo ltage needs to ma intai n a min imum of Vcc/ 3 befor e the time r
output turns low. That is, although the output remains unaffected even if a dif ferent trigger pulse is applied while the o utput is
high, it may be affected and the waveform does not operate properly if the tr igger pulse voltag e at the end of the output pulse
remains at below Vcc/3. Figure 4 shows such a timer output abnormality.
2. Astable Operation
2. Astable Operation2. Astable Operation
2. Astable Operation
Figure 4. Waveforms of Monostable Operation (abnormal)
Figure 4. Waveforms of Monostable Operation (abnormal)Figure 4. Waveforms of Monostable Operation (abnormal)
Figure 4. Waveforms of Monostable Operation (abnormal)
100m
100m100m
100m 1
11
110
1010
10 100
100100
100 1k
1k1k
1k 10k
10k10k
10k 100k
100k100k
100k
1E-3
1E-31E-3
1E-3
0.01
0.010.01
0.01
0.1
0.10.1
0.1
1
11
1
10
1010
10
100
100100
100
10M
10M10M
10MΩ
ΩΩ
Ω
1M
1M1M
1MΩ
ΩΩ
Ω
100k
100k100k
100kΩ
ΩΩ
Ω
10k
10k10k
10kΩ
ΩΩ
Ω
1k
1k1k
1kΩ
ΩΩ
Ω
(R
(R(R
(RA
AA
A+2R
+2R+2R
+2RB
BB
B)
))
)
Capacitance(uF)
Capacitance(uF)Capacitance(uF)
Capacitance(uF)
Frequency(Hz)
Frequency(Hz)Frequency(Hz)
Frequency(Hz)
Figure 5. Astable Circuit
Figure 5. Astable CircuitFigure 5. Astable Circuit
Figure 5. Astable Circuit Figure 6. Capacitance and Resistance vs. Frequency
Figure 6. Capacitance and Resistance vs. FrequencyFigure 6. Capacitance and Resistance vs. Frequency
Figure 6. Capacitance and Resistance vs. Frequency
1
5
6
7
8
4
2
3
RESET Vcc
DISCH
THRES
CONT
GND
OUT
TRIG
+Vcc
RA
C1
C2RL
RB
LM555/NE555/SA555
6
66
6
An astable timer operation is achieved by adding resistor RB to Fig ur e 1 and configuri ng as sh ow n o n Fi g ur e 5. I n th e a st abl e
operation, the trigger terminal and the threshold terminal are connecte d so that a self-trigger is formed, operating as a multi
vibrator. When the timer output is high, its internal discharging Tr. turns off and the VC1 increases by exponential
function with the time constant (RA+RB)*C.
When the VC1, or the threshold voltage, reaches 2Vcc/3, the comparator output on the trigger terminal be com es high,
resetting the F/F and causing the timer output to become low. This in turn turns on the discharging Tr. and the C1 discharges
through the discharging channel formed by RB and the discharging Tr. When the VC1 falls below Vcc/3, the comparator
output on the trigger terminal becomes high and the timer output becomes high again. The discha rging Tr. turns off and the
VC1 rises again.
In the above process, the section where the timer output is high is the time it takes for the VC1 to rise from Vcc/3 to 2Vcc/3,
and the section where the timer output is low is the time it takes for the VC1 to d rop from 2Vcc /3 t o Vcc /3. Wh en t imer outpu t
is high, the equivalent circuit for charging capacitor C1 is as follows:
Since the duration of the timer output high state(tH) is the amount of time it takes for the VC1(t) to reach 2Vcc/3,
Figure 7. Waveforms of Astable Operation
Figure 7. Waveforms of Astable OperationFigure 7. Waveforms of Astable Operation
Figure 7. Waveforms of Astable Operation
Vcc
RARB
C1 Vc1(0-)=Vcc/
3
C1dvc1
dt
------------- Vcc V0-()–
RARB
+
-------------------------------=1()
VC1 0+() VCC 3⁄=2()
VC1 t() VCC 12
3
---e
-t
RARB
+()C1
------------------------------------–
–
=3()
LM555/NE555/SA555
7
77
7
The equivalent circuit fo r discharging capacitor C1, when timer output is low is, as follows:
Since the duration of the timer output low state(tL) is the amount of time it takes for the VC1(t) to reach Vcc/3,
Since RD is normally RB>>RD although related to the size of discharging Tr.,
tL=0.693RBC1(10)
Consequently, if th e timer operates in astable, the period is the same with
'T=tH+tL=0.693(RA+RB)C1+0.693RBC1=0.693(RA+2RB)C1' because the period is the sum of the charge time and discharge
time. And since frequency is the reciprocal of the period, the following applies.
3. Frequency divider
3. Frequency divider3. Frequency divider
3. Frequency divider
By adjusting the length of the timing cycle, the basic circuit of Figure 1 can be made to operate as a frequency divider. Figure
8. illustrates a divide-by-three circu it that makes use of the fact that retrig gering cannot occur during the timing cycle.
VC1 t() 2
3
---VCC V=CC 12
3
---e
-tH
RARB
+()C1
------------------------------------–
–
=4()
tHC1RARB
+()In2 0.693 RARB
+()C1
== 5()
C1
RB
RD
VC1(0-)=2Vcc/3
C1dvC1
dt
-------------- 1
RARB
+
----------------------- VC1 0=+ 6()
VC1 t() 2
3
---VCCe
-t
RARD
+()C1
-------------------------------------
=7()
1
3
---VCC 2
3
---VCCe
-tL
RARD
+()C1
-------------------------------------
=8()
tLC1RBRD
+()In2 0.693 RBRD
+()C1
== 9()
frequency, f 1
T
--- 1.44
RA2RB
+()C1
----------------------------------------== 11()
LM555/NE555/SA555
8
88
8
4. Pulse Wid t h Mo du lat ion
4. Pulse Wid t h Mo du lat ion4. Pulse Wid t h Mo du lat ion
4. Pulse Wid t h Mo du lat ion
The timer output waveform may be changed by modulating the control voltage applied to the timer's pin 5 and changing the
reference of the timer's inter nal comp arators. Figure 9 illustrates the pulse width modulation circuit.
When the continuous trigger pulse train is applied in the monostable mode, the timer output width is modulated according to
the signal applied to the control terminal. Sine wave as well as other waveforms may be applied as a signal to the control
terminal. Figure 10 shows the example of pulse width modulation waveform.
5. Pulse Position Modulation
5. Pulse Position Modulation5. Pulse Position Modulation
5. Pulse Position Modulation
If the modulating signal is applied to the control terminal while the timer is connected for the astable operation as in Figure 11,
the timer becom es a pulse position mod ulator.
In the pulse position modulator, the reference of the timer's internal compara tors is modulated which in turn modulates the
timer output according to the modulation signal applied to the contro l terminal.
Figure 12 illustrates a sine wave for modulation signal and the resulting output pulse position modulation : however, an y wave
shape could be used .
Figure 8. Waveforms of Frequency Divider Operation
Figure 8. Waveforms of Frequency Divider OperationFigure 8. Waveforms of Frequency Divider Operation
Figure 8. Waveforms of Frequency Divider Operation
Figure 9. Circuit for Pulse Width Modulation
Figure 9. Circuit for Pulse Width ModulationFigure 9. Circuit for Pulse Width Modulation
Figure 9. Circuit for Pulse Width Modulation Figure 10. Waveforms of Pulse Widt h Modulation
Figure 10. Waveforms of Pulse Widt h ModulationFigure 10. Waveforms of Pulse Widt h Modulation
Figure 10. Waveforms of Pulse Widt h Modulation
84
7
1
2
3
5
6
CONT
GND
Vcc
DISCH
THRES
RESET
TRIG
OUT
+Vcc
+Vcc+Vcc
+Vcc
Trigger
TriggerTrigger
Trigger
R
RR
RA
AA
A
C
CC
C
Output
OutputOutput
Output Input
InputInput
Input
LM555/NE555/SA555
9
99
9
6. Linear Ramp
6. Linear Ramp6. Linear Ramp
6. Linear Ramp
When the pull-up resistor RA in the monostable circuit shown in Figure 1 is replaced with constant current source, the VC1
increases linearly, generating a linear ramp. Figure 13 shows the linear ramp generating circuit and Figure 14 illustrates the
generated linear ramp wave forms.
In Figure 13, current source is created by PNP transistor Q1 and resistor R1, R2, and RE.
For example, if Vcc= 15 V, RE=20kΩ, R1=5kW, R2 =10k Ω, and VBE=0.7V,
VE=0.7V+10V=10.7V
Ic=(15-10.7)/20k=0.215mA
84
7
1
2
3
5
6
CONT
GND
Vcc
DISCH
THRES
RESET
TRIG
OUT
+Vcc
+Vcc+Vcc
+Vcc
R
RR
RA
AA
A
C
CC
C
R
RR
RB
BB
B
Modulation
ModulationModulation
Modulation
Output
OutputOutput
Output
Figure 11. Circuit for Pulse Position Modulation
Figure 11. Circuit for Pulse Position ModulationFigure 11. Circuit for Pulse Position Modulation
Figure 11. Circuit for Pulse Position Modulation Figure 12. Waveforms of pulse position modulation
Figure 12. Waveforms of pulse position modulationFigure 12. Waveforms of pulse position modulation
Figure 12. Waveforms of pulse position modulation
Figure 13. Circuit for Linear Ramp
Figure 13. Circuit for Linear RampFigu re 13. Cir cuit for Linear Ramp
Figure 13. Circuit for Linear Ramp Figure 14. Waveforms of Linear Ram p
Figure 14. Waveforms of Linear Ram pFigure 14. Waveforms of Linear Ram p
Figure 14. Waveforms of Linear Ram p
1
5
6
7
8
4
2
3
RESET Vcc
DISCH
THRES
CONT
GND
OUT
TRIG
+Vcc
C2
R1
R2
C1
Q1
Output
RE
ICVCC VE
–
RE
---------------------------=12()
Here, VE is
VEVBE R2
R1R2
+
----------------------VCC
+= 13()
LM555/NE555/SA555
10
1010
10
When the trigger starts in a timer configured as shown in Figure 13, the current flowing through capacitor C1 becomes a
constant current generated by PNP transistor and resistors.
Hence, the VC is a linear ramp function as shown in Figure 14. The gradient S of the linear ramp function is defined as
follows:
Here the Vp-p is the peak-to-peak voltage.
If the electric charge amount accumulated in the capacitor is divided by the capacitan ce, the VC comes out as foll ow s :
V=Q/C (15)
The above equation divided on both sides by T gives us
and may be simplified into the following equation.
S=I/C (17)
In other words, the gradient of the linear ramp fun ctio n appearing across the capacitor can be obtained by using the constan t
current f lowin g thro ugh th e capa citor.
If the constant current flow through the capacitor is 0.215mA and the capacitance is 0.02µF, the gradient of the ramp function
at both ends of the capacitor is S = 0.215m/0.022µ = 9.77V/ms.
SVpp–
T
----------------=14()
V
T
----QT⁄
C
------------= 16()
LM555/NE555/SA555
11
1111
11
Mechanical Dimensions
Mechanical DimensionsMechanical Dimensions
Mechanical Dimensions
Package
PackagePackage
Package Dimensions in millimeters
Dimensions in millimetersDimensions in millimeters
Dimensions in millimeters
6.40 ±0.20
3.30 ±0.30
0.130 ±0.012
3.40 ±0.20
0.134 ±0.008
#1
#4 #5
#8
0.252 ±0.008
9.20 ±0.20
0.79
2.54
0.100
0.031
()
0.46 ±0.10
0.018 ±0.004
0.060 ±0.004
1.524 ±0.10
0.362 ±0.008
9.60
0.378 MAX
5.08
0.200
0.33
0.013
7.62
0~15°
0.300
MAX
MIN
0.25 +0.10
–0.05
0.010+0.004
–0.002
8-DIP
8-DIP8-DIP
8-DIP
LM555/NE555/SA555
12
1212
12
Mechanical Dimensions
Mechanical Dimensions Mechanical Dimensions
Mechanical Dimensions (Continued)
Package
PackagePackage
Package Dimensions in millimeters
Dimensions in millimetersDimensions in millimeters
Dimensions in millimeters
4.92
±0.20
0.194
±0.008
0.41
±0.10
0.016
±0.004
1.27
0.050
5.72
0.225
1.55
±0.20
0.061
±0.008
0.1~0.25
0.004~0.001
6.00
±0.30
0.236
±0.012
3.95
±0.20
0.156
±0.008
0.50
±0.20
0.020
±0.008
5.13
0.202 MAX
#1
#4 #5
0~8°
#8
0.56
0.022
()
1.80
0.071
MAX0.10
MAX0.004
MAX
MIN
+
0.10
-0.05
0.15+
0.004
-0.002
0.006
8-SOP
8-SOP8-SOP
8-SOP
LM555/NE555/SA555
13
1313
13
Orde ring In f ormation
Orde ring In f ormationOrde ring In f ormation
Orde ring In f ormation
Product Number
Product NumberProduct Number
Product Number Package
PackagePackage
Package Operating Temperature
Operating TemperatureOperating Temperature
Operating Temperature
LM555CN 8-DIP 0 ~ +70°C
LM555CM 8-SOP
Product Number
Product NumberProduct Number
Product Number Package
PackagePackage
Package Operating Temperature
Operating TemperatureOperating Temperature
Operating Temperature
NE555N 8-DIP 0 ~ +70°C
NE555D 8-SOP
Product Number
Product NumberProduct Number
Product Number Package
PackagePackage
Package Operating Temperature
Operating TemperatureOperating Temperature
Operating Temperature
SA555 8-DIP -40 ~ +85°C
SA555D 8-SOP
LM555/NE555/SA555
LM555/NE555/SA555LM555/NE555/SA555
LM555/NE555/SA555
11/29/02 0.0m 001
Stock#DSxxxxxxxx
2002 Fairchild Semicond uctor Corporation
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user.
2. A critical component in any component of a life support
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reasonably expected to cause the failure of the life support
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