LMP8640HVMKE-T/NOPB - NATIONAL SEMICONDUCTOR

+IN -IN

V+

V-

RG = 2*RIN

VOUT

LMP8640

RIN

ADC

G = 10 V/V in 20 V/V gain option

G = 25 V/V in 50 V/V gain option

G = 50 V/V in 100 V/V gain option

VSENSE (mV)

VOUT (V)

13.0

12.0

11.0

10.0

9.0

8.0

7.0

6.0

5.0

4.0

3.0

2.0

1.0

0.00 100 200 300 400 500 600

GAIN 20V/V

GAIN 50V/V

GAIN 100V/V

VS=12V, VCM =12V

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LMP8640

LMP8640-Q1

LMP8640HV

SNOSB28G –AUGUST 2010–REVISED NOVEMBER 2014

LMP8640/-Q1/HV Precision High Voltage Current Sense Amplifiers

1 Features 3 Description

The LMP8640, LMP8640-Q1 and the LMP8640HV

1• Typical Values, TA= 25°C are precision current sense amplifiers that detect

• High Common-Mode Voltage Range small differential voltages across a sense resistor in

– LMP8640: -2 V to 42 V the presence of high input common mode voltages

with a supply voltage range from 2.7 V to 12 V.

– LMP8640-Q1: -2 V to 42 V, AEC-Q100

– LMP8640HV: -2 V to 76 V The LMP8640 and LMP8640-Q1 accept input signals

with common mode voltage range from -2 V to 42 V,

• Supply Voltage Range: 2.7 V to 12 V while the LMP8640HV accepts input signal with

• Gain Options: 20 V/V; 50 V/V; 100 V/V common mode voltage range from -2 V to 76 V. The

• Max Gain Error: 0.25% LMP8640 and LMP8640HV have fixed gain for

applications that demand accuracy over temperature.

• Low Offset Voltage: 900 µV The LMP8640 and LMP8640HV come out with three

• Input Bias Current: 13 µA different fixed gains 20 V/V, 50 V/V, 100 V/V ensuring

• PSRR: 85 dB a gain accuracy as low as 0.25%. The output is

• CMRR (2.1V to 42V): 103 dB buffered in order to provide low output impedance.

This high side current sense amplifier is ideal for

• Temperature Range: -40°C to 125°C sensing and monitoring currents in DC or battery

• 6-Pin Thin SOT-23 Package powered systems, excellent AC and DC

specifications over temperature, and keeps errors in

2 Applications the current sense loop to a minimum. The LMP8640

and LMP8640HV are ideal choice for industrial and

• High-Side Current Sense consumer applications, while the LMP8640-Q1 is an

• Vehicle Current Measurement AEC-Q100 grade 1 qualified version of the LMP8640

• Motor Controls for automotive applications. The LMP8640-x is

available in SOT-23-6 package.

• Battery Monitoring

• Remote Sensing Device Information(1)

• Power Management PART NUMBER PACKAGE BODY SIZE (NOM)

LMP8640

LMP8640-Q1 SOT23 (6) 2.9 mm x 1.6 mm

LMP8640HV

(1) For all available packages, see the orderable addendum at

the end of the datasheet.

Simplified Schematic Output Voltage vs Input Voltage

An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,

intellectual property matters and other important disclaimers. PRODUCTION DATA.

LMP8640

LMP8640-Q1

LMP8640HV

SNOSB28G –AUGUST 2010–REVISED NOVEMBER 2014

www.ti.com

Table of Contents

8.3 Feature Description................................................. 14

1 Features.................................................................. 18.4 Device Functional Modes........................................ 17

2 Applications ........................................................... 19 Application and Implementation ........................ 18

3 Description............................................................. 19.1 Application Information............................................ 18

4 Revision History..................................................... 29.2 Typical Application.................................................. 18

5 Device Comparison Table..................................... 39.3 Do's and Don'ts ...................................................... 20

6 Pin Configuration and Functions......................... 310 Power Supply Recommendations ..................... 20

7 Specifications......................................................... 411 Layout................................................................... 20

7.1 Absolute Maximum Ratings ...................................... 411.1 Layout Guidelines ................................................. 20

7.2 Handling Ratings - LMP8640, LMP8640HV.............. 411.2 Layout Example .................................................... 21

7.3 Handling Ratings - LMP8640-Q1.............................. 412 Device and Documentation Support ................. 23

7.4 Recommended Operating Conditions(2) ................... 412.1 Device Support...................................................... 23

7.5 Thermal Information.................................................. 512.2 Documentation Support ........................................ 23

7.6 Electrical Characteristics 2.7 V ................................ 512.3 Related Links ........................................................ 23

7.7 Electrical Characteristics 5 V (5)................................ 612.4 Trademarks........................................................... 23

7.8 Electrical Characteristics 12 V (5).............................. 812.5 Electrostatic Discharge Caution............................ 23

7.9 Typical Characteristics............................................ 10 12.6 Glossary................................................................ 23

8 Detailed Description............................................ 14 13 Mechanical, Packaging, and Orderable

8.1 Overview................................................................. 14 Information........................................................... 23

8.2 Functional Block Diagram....................................... 14

4 Revision History

NOTE: Page numbers for previous revisions may differ from page numbers in the current version.

Changes from Revision F (April 2013) to Revision G Page

• New Q Device added to datasheet ........................................................................................................................................ 1

• Changed data sheet flow and layout to conform with new TI standards. Added the following sections: Application

and Implementation; Power Supply Recommendations; Layout; Device and Documentation Support; Mechanical,

Packaging, and Ordering Information .................................................................................................................................... 1

Product Folder Links: LMP8640 LMP8640-Q1 LMP8640HV

VOUT

V-

+IN -IN

V+

LMP8640

LMP8640HV

LMP8640

LMP8640-Q1

LMP8640HV

www.ti.com

SNOSB28G –AUGUST 2010–REVISED NOVEMBER 2014

5 Device Comparison Table

MAX COMMON MODE

DEVICE NAME GAIN QUALIFICATIONS VOLTAGE

LMP8640-T x20 -2 V to +42 V

LMP8640-Q1-T x20 Automotive AEC-Q100, Grade 1 -2 V to +42 V

LMP8640-F x50 -2 V to +42 V

LMP8640-H x100 -2 V to +42 V

LMP8640HV-T x20 -2 V to +76 V

LMP8640HV-F x50 -2 V to +76 V

LMP8640HV-H x100 -2 V to +76 V

6 Pin Configuration and Functions

6-Pin SOT-23

DDC0006A Package

(Top View)

Pin Functions

PIN DESCRIPTION

NUMBER NAME

1 VOUT Output

2 V-Negative Supply Voltage

3 +IN Positive Input

4 -IN Negative Input

5 NC Not Internally Connected

6 V+Positive Supply Voltage

Product Folder Links: LMP8640 LMP8640-Q1 LMP8640HV

LMP8640

LMP8640-Q1

LMP8640HV

SNOSB28G –AUGUST 2010–REVISED NOVEMBER 2014

www.ti.com

7 Specifications

7.1 Absolute Maximum Ratings(1)(2)(3)

LMP8640 limits also apply to the LMP8640-Q1. MIN MAX UNIT

Supply Voltage (VS= V+- V−) -0.3 13.2 V

Differential Voltage +IN- (-IN) -6 6 V

Voltage at pins +IN, -IN LMP8640HV -6 80 V

LMP8640, LMP8640-Q1 -6 60 V

Voltage at VOUT pin V-V+V

Junction Temperature (4) -40 150 °C

(1) “Absolute Maximum Ratings” indicate limits beyond which damage to the device may occur, including inoperability and degradation of

device reliability and/or performance. Functional operation of the device and/or non-degradation at the Absolute Maximum Ratings or

other conditions beyond those indicated in the Operating Ratings is not implied. Operating Ratings indicate conditions at which the

device is functional and the device should not be operated beyond such conditions.

(2) For soldering specifications,see product folder at www.ti.com and http://www.ti.com/lit/SNOA549.

(3) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/Distributors for availability and

specifications.

(4) The maximum power dissipation must be derated at elevated temperatures and is dictated by TJ(MAX),θJA, and the ambient temperature,

TA. The maximum allowable power dissipation PDMAX = (TJ(MAX) - TA)/ θJA or the number given in Absolute Maximum Ratings, whichever

is lower.

7.2 Handling Ratings - LMP8640, LMP8640HV MIN MAX UNIT

Tstg Storage temperature range -65 150 °C

For input pins +IN, -IN -5000 5000

Human body model (HBM(1))For all other pins -2000 2000

V(ESD) Electrostatic discharge V

Charged device model (CDM)(2) All pins -1250 1250

Machine model (MM) (3) -200 200

(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.

(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

(3) Machine Model, applicable std. JESD22-A115-A (ESD MM std. of JEDEC)

7.3 Handling Ratings - LMP8640-Q1 MIN MAX UNIT

Tstg Storage temperature range -65 150 °C

Human body model (HBM), per AEC Q100-002(1) -2000 2000 V

Charged device model (CDM), per All pins -1000 1000

V(ESD) Electrostatic discharge AEC Q100-011

Machine model (MM) (2) All pins -200 200

(1) AEC Q100-002 indicates HBM stressing is done in accordance with the ANSI/ESDA/JEDEC JS-001 specification.

(2) Machine Model, applicable std. JESD22-A115-A (ESD MM std. of JEDEC)

7.4 Recommended Operating Conditions(1)

MIN MAX UNIT

Supply Voltage (VS= V+- V−) 2.7 12 V

Operating Junction Temperature Range (2) -40 125 °C

(1) “Absolute Maximum Ratings” indicate limits beyond which damage to the device may occur, including inoperability and degradation of

device reliability and/or performance. Functional operation of the device and/or non-degradation at the Absolute Maximum Ratings or

other conditions beyond those indicated in the Operating Ratings is not implied. Operating Ratings indicate conditions at which the

device is functional and the device should not be operated beyond such conditions.

(2) The maximum power dissipation must be derated at elevated temperatures and is dictated by TJ(MAX),θJA, and the ambient temperature,

TA. The maximum allowable power dissipation PDMAX = (TJ(MAX) - TA)/ θJA or the number given in Absolute Maximum Ratings, whichever

is lower.

Product Folder Links: LMP8640 LMP8640-Q1 LMP8640HV

LMP8640

LMP8640-Q1

LMP8640HV

www.ti.com

SNOSB28G –AUGUST 2010–REVISED NOVEMBER 2014

7.5 Thermal Information LMP8640

LMP8640HV

LMP8640-Q1

THERMAL METRIC(1) UNIT

THIN SOT-23

6 PINS

RθJA Junction-to-ambient thermal resistance (2) 165

RθJC(top) Junction-to-case (top) thermal resistance 28

RθJB Junction-to-board thermal resistance 24.6 °C/W

ψJT Junction-to-top characterization parameter 0.3

ψJB Junction-to-board characterization parameter 23.8

(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.

(2) The maximum power dissipation must be derated at elevated temperatures and is dictated by TJ(MAX),θJA, and the ambient temperature,

TA. The maximum allowable power dissipation PDMAX = (TJ(MAX) - TA)/ θJA or the number given in Absolute Maximum Ratings, whichever

is lower.

7.6 Electrical Characteristics 2.7 V (1)

Unless otherwise specified, all limits ensured for at TA= 25°C, VS= V+– V-, VSENSE= +IN-(-IN), V+= 2.7 V, V−= 0 V, −2 V <

VCM < 76 V, RL= 10 MΩ. LMP8640 limits also apply to the LMP8640-Q1.

PARAMETER TEST CONDITIONS MIN(2) TYP(3) MAX(2) UNIT

VCM = 2.1 V -900 900

VOS Input Offset Voltage µV

VCM = 2.1 V, Over Temperature -1160 1160

TCVOS Input Offset Voltage Drift(4) (5) VCM = 2.1 V 2.6 µV/°C

VCM = 2.1 V, VSENSE = 0 V 12 20

IBInput Bias Current (6) µA

VCM = 2.1 V, Over Temperature, VSENSE = 0 V 27

eni Input Voltage Noise (5) f > 10 kHz 117 nV/√Hz

Gain LMP8640-T LMP8640HV-T 20

Gain LMP8640-F LMP8640HV-F 50 V/V

Gain LMP8640-H LMP8640HV-H 100

Gain AVVCM = 2.1 V -0.25% 0.25%

Gain error VCM = 2.1 V, Over Temperature -0.51% 0.51%

Accuracy over temperature(5) VCM = 2.1V, Over Temperature 26.2 ppm/°C

PSRR Power Supply Rejection Ratio VCM = 2.1 V, 2.7 V < V+< 12 V, 85 dB

LMP8640HV 2.1 V < VCM < 42 V 103

LMP8640 2.1 V < VCM< 42 V

CMRR Common Mode Rejection Ratio dB

LMP8640HV 2.1 V < VCM < 76 V 95

-2 V <VCM < 2 V, 60

(1) Electrical Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very

limited self-heating of the device such that TJ= TA. No specification of parametric performance is indicated in the electrical tables under

conditions of internal self-heating where TJ> TA. Absolute Maximum Ratings indicate junction temperature limits beyond which the

device may be permanently degraded, either mechanically or electrically.

(2) Limits are 100% production tested at 25°C. Limits over the operating temperature range are ensured through correlations using

statistical quality control (SQC) method.

(3) Typical values represent the most likely parametric norm at the time of characterization. Actual typical values may vary over time and

will also depend on the application and configuration. The typical values are not tested and are not ensured on shipped production

material.

(4) Offset voltage temperature drift is determined by dividing the change in VOS at the temperature extremes by the total temperature

change.

(5) This parameter is ensured by design and/or characterization and is not tested in production.

(6) Positive Bias Current corresponds to current flowing into the device. Spec does not include input signal dependent currents on the

positive input of approximately Vsense / 5KΩdue to topology feedback action.

Product Folder Links: LMP8640 LMP8640-Q1 LMP8640HV

LMP8640

LMP8640-Q1

LMP8640HV

SNOSB28G –AUGUST 2010–REVISED NOVEMBER 2014

www.ti.com

Electrical Characteristics 2.7 V (1) (continued)

Unless otherwise specified, all limits ensured for at TA= 25°C, VS= V+– V-, VSENSE= +IN-(-IN), V+= 2.7 V, V−= 0 V, −2 V <

VCM < 76 V, RL= 10 MΩ. LMP8640 limits also apply to the LMP8640-Q1.

PARAMETER TEST CONDITIONS MIN(2) TYP(3) MAX(2) UNIT

Fixed Gain LMP8640-T DC VSENSE = 67.5 mV, 950

LMP8640HV-T (5) CL= 30 pF,RL= 1MΩ

Fixed Gain LMP8640-F DC VSENSE =27 mV,

BW 450 kHz

LMP8640HV-F (5) CL= 30 pF, RL= 1MΩ

Fixed Gain LMP8640-H DC VSENSE = 13.5 mV, 230

LMP8640HV-H (5) CL= 30 pF ,RL= 1 MΩ

VCM =5 V, CL= 30 pF, RL= 1 MΩ,

LMP8640-T LMP8640HV-T VSENSE =100 mVpp,

SR Slew Rate (7)(5) 1.4 V/µs

LMP8640-F LMP8640HV-F VSENSE =40 mVpp,

LMP8640-H LMP8640HV-H VSENSE =20 mVpp,

RIN Differential Mode Input Impedance(5) 5 kΩ

VCM = 2.1 V 420 600

VCM = 2.1 V, Over Temperature 800

ISSupply Current µA

VCM =−2 V 2000 2500

VCM =−2 V, Over Temperature 2750

Maximum Output Voltage VCM = 2.1 V 2.65 V

LMP8640-T LMP8640HV-T 18.2

VCM = 2.1 V

VOUT LMP8640-F LMP8640HV-F

Minimum Output Voltage 40 mV

VCM = 2.1 V

LMP8640-H LMP8640HV-H 80

VCM = 2.1 V

CLOAD Max Output Capacitance Load(5) 30 pF

(7) The number specified is the average of rising and falling slew rates and measured at 90% to 10%.

7.7 Electrical Characteristics 5 V (1)

Unless otherwise specified, all limits ensured for at TA= 25°C, VS= V+– V-, VSENSE= +IN-(-IN), V+= 5 V, V−= 0 V, −2 V < VCM

< 76 V, RL= 10 MΩ. LMP8640 electrical limits also apply to the LMP8640-Q1 unless noted.

PARAMETER TEST CONDITIONS MIN(2) TYP(3) MAX(2) UNIT

VCM = 2.1 V -900 900

VOS Input Offset Voltage µV

VCM = 2.1 V, Over Temperature -1160 1160

TCVOS Input Offset Voltage Drift(4) (5) VCM = 2.1 V 2.6 µV/°C

VCM = 2.1 V, VSENSE = 0 V 13 21

IBInput Bias Current (6) µA

VCM = 2.1 V, Over Temperature,VSENSE = 0 V 28

eni Input Voltage Noise (5) f > 10 kHz 117 nV/√Hz

(1) Electrical Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very

limited self-heating of the device such that TJ= TA. No specification of parametric performance is indicated in the electrical tables under

conditions of internal self-heating where TJ> TA. Absolute Maximum Ratings indicate junction temperature limits beyond which the

device may be permanently degraded, either mechanically or electrically.

(2) Limits are 100% production tested at 25°C. Limits over the operating temperature range are ensured through correlations using

statistical quality control (SQC) method.

(3) Typical values represent the most likely parametric norm at the time of characterization. Actual typical values may vary over time and

will also depend on the application and configuration. The typical values are not tested and are not ensured on shipped production

material.

(4) Offset voltage temperature drift is determined by dividing the change in VOS at the temperature extremes by the total temperature

change.

(5) This parameter is ensured by design and/or characterization and is not tested in production.

(6) Positive Bias Current corresponds to current flowing into the device. Spec does not include input signal dependent currents on the

positive input of approximately Vsense / 5KΩdue to topology feedback action.

Product Folder Links: LMP8640 LMP8640-Q1 LMP8640HV

LMP8640

LMP8640-Q1

LMP8640HV

www.ti.com

SNOSB28G –AUGUST 2010–REVISED NOVEMBER 2014

Electrical Characteristics 5 V (1) (continued)

Unless otherwise specified, all limits ensured for at TA= 25°C, VS= V+– V-, VSENSE= +IN-(-IN), V+= 5 V, V−= 0 V, −2 V < VCM

< 76 V, RL= 10 MΩ. LMP8640 electrical limits also apply to the LMP8640-Q1 unless noted.

PARAMETER TEST CONDITIONS MIN(2) TYP(3) MAX(2) UNIT

Gain LMP8640-T LMP8640HV-T 20

Gain LMP8640-F LMP8640HV-F 50 V/V

Gain LMP8640-H LMP8640HV-H 100

Gain AVVCM = 2.1 V -0.25% 0.25%

Gain error VCM = 2.1 V, Over Temperature -0.51% 0.51%

Accuracy over temperature(5) −40°C to 125°C, VCM=2.1 V 26.2 ppm/°C

PSRR Power Supply Rejection Ratio VCM = 2.1 V, 2.7V < V+< 12 V, 85 dB

LMP8640HV 2.1 V < VCM < 42 V 103

LMP8640 2.1 V < VCM< 42 V

CMRR Common Mode Rejection Ratio dB

LMP8640HV 2.1 V < VCM < 76 V 95

-2 V <VCM < 2 V, 60

Fixed Gain LMP8640-T DC VSENSE = 67.5 mV, 950

LMP8640HV-T (5) CL= 30 pF ,RL= 1 MΩ

Fixed Gain LMP8640-F DC VSENSE =27 mV,

BW 450 kHz

LMP8640HV-F(5) CL= 30 pF ,RL= 1 MΩ

Fixed Gain LMP8640-H DC VSENSE = 13.5 mV, 230

LMP8640HV-H(5) CL= 30 pF ,RL= 1MΩ

VCM =5 V, CL= 30 pF, RL= 1MΩ,

LMP8640-T LMP8640HV-T VSENSE = 200 mVpp,

SR Slew Rate (7)(5) 1.6 V/µs

LMP8640-F LMP8640HV-F VSENSE = 80 mVpp,

LMP8640-H LMP8640HV-H VSENSE = 40 mVpp,

RIN Differential Mode Input Impedance(5) 5 kΩ

VCM = 2.1 V 500 722

VCM = 2.1 V, Over Temperature 922

ISSupply Current µA

VCM =−2 V 2050 2500

VCM =−2 V, Over Temperature 2750

Maximum Output Voltage VCM = 2.1 V 4.95 V

LMP8640-T LMP8640HV-T 18.2

VCM = 2.1 V

VOUT LMP8640-F LMP8640HV-F

Minimum Output Voltage 40 mV

VCM = 2.1 V

LMP8640-H LMP8640HV-H 80

VCM = 2.1 V

CLOAD Max Output Capacitance Load(5) 30 pF

(7) The number specified is the average of rising and falling slew rates and measured at 90% to 10%.

Product Folder Links: LMP8640 LMP8640-Q1 LMP8640HV

LMP8640

LMP8640-Q1

LMP8640HV

SNOSB28G –AUGUST 2010–REVISED NOVEMBER 2014

www.ti.com

7.8 Electrical Characteristics 12 V (1)

Unless otherwise specified, all limits ensured for at TA= 25°C, VS= V+– V-, VSENSE= +IN-(-IN), V+= 12 V, V−= 0V, −2 V < VCM

< 76 V, RL= 10 MΩ. LMP8640 electrical limits also apply to the LMP8640-Q1 unless noted.

PARAMETER TEST CONDITIONS MIN(2) TYP(3) MAX(2) UNIT

VCM = 2.1 V -900 900

VOS Input Offset Voltage µV

VCM = 2.1 V, Over Temperature -1160 1160

TCVOS Input Offset Voltage Drift(4) (5) VCM = 2.1 V 2.6 µV/°C

VCM = 2.1 V, VSENSE = 0 V 13 22

IBInput Bias Current (6) µA

VCM = 2.1 V, Over Temperature, VSENSE = 0 V 28

eni Input Voltage Noise (5) f > 10 kHz 117 nV/√Hz

Gain LMP8640-T LMP8640HV-T 20

Gain LMP8640-F LMP8640HV-F 50 V/V

Gain LMP8640-H LMP8640HV-H 100

Gain AVVCM = 2.1 V -0.25% 0.25%

Gain error VCM = 2.1 V, Over Temperature -0.51% 0.51%

Accuracy over temperature(5) −40°C to 125°C, VCM= 2.1 V 26.2 ppm/°C

PSRR Power Supply Rejection Ratio VCM = 2.1 V, 2.7 V < V+< 12 V, 85 dB

LMP8640HV 2.1 V < VCM < 42 V 103

LMP8640 2.1 V < VCM< 42 V

CMRR Common Mode Rejection Ratio dB

LMP8640HV 2.1 V < VCM < 76 V 95

-2 V < VCM < 2 V, 60

Fixed Gain LMP8640-T DC VSENSE = 67.5 mV, 950

LMP8640HV-T (5) CL= 30 pF, RL= 1 MΩ

Fixed Gain LMP8640-F DC VSENSE =27 mV,

BW 450 kHz

LMP8640HV-F (5) CL= 30 pF, RL= 1 MΩ

Fixed Gain LMP8640-H DC VSENSE = 13.5 mV, 230

LMP8640HV-H (5) CL= 30 pF, RL= 1 MΩ

VCM =5 V, CL= 30 pF, RL= 1 MΩ,

LMP8640-T LMP8640HV-T VSENSE = 500 mVpp,

SR Slew Rate (7)(5) 1.8 V/µs

LMP8640-F LMP8640HV-F VSENSE =200 mVpp,

LMP8640-H LMP8640HV-H VSENSE =100 mVpp,

RIN Differential Mode Input Impedance(5) 5 kΩ

(1) Electrical Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very

limited self-heating of the device such that TJ= TA. No specification of parametric performance is indicated in the electrical tables under

conditions of internal self-heating where TJ> TA. Absolute Maximum Ratings indicate junction temperature limits beyond which the

device may be permanently degraded, either mechanically or electrically.

(2) Limits are 100% production tested at 25°C. Limits over the operating temperature range are ensured through correlations using

statistical quality control (SQC) method.

(3) Typical values represent the most likely parametric norm at the time of characterization. Actual typical values may vary over time and

will also depend on the application and configuration. The typical values are not tested and are not ensured on shipped production

material.

(4) Offset voltage temperature drift is determined by dividing the change in VOS at the temperature extremes by the total temperature

change.

(5) This parameter is ensured by design and/or characterization and is not tested in production.

(6) Positive Bias Current corresponds to current flowing into the device. Spec does not include input signal dependent currents on the

positive input of approximately Vsense / 5KΩdue to topology feedback action.

(7) The number specified is the average of rising and falling slew rates and measured at 90% to 10%.

Product Folder Links: LMP8640 LMP8640-Q1 LMP8640HV

LMP8640

LMP8640-Q1

LMP8640HV

www.ti.com

SNOSB28G –AUGUST 2010–REVISED NOVEMBER 2014

Electrical Characteristics 12 V (1) (continued)

Unless otherwise specified, all limits ensured for at TA= 25°C, VS= V+– V-, VSENSE= +IN-(-IN), V+= 12 V, V−= 0V, −2 V < VCM

< 76 V, RL= 10 MΩ. LMP8640 electrical limits also apply to the LMP8640-Q1 unless noted.

PARAMETER TEST CONDITIONS MIN(2) TYP(3) MAX(2) UNIT

VCM = 2.1 V 720 1050

VCM = 2.1 V, Over Temperature 1250

ISSupply Current µA

VCM =−2 V 2300 2800

VCM =−2 V, Over Temperature 3000

Maximum Output Voltage VCM = 2.1 V 11.85 V

LMP8640-T LMP8640HV-T 18.2

VCM = 2.1 V

VOUT LMP8640-F LMP8640HV-F

Minimum Output Voltage 40 mV

VCM = 2.1 V

LMP8640-H LMP8640HV-H 80

VCM = 2.1 V

CLOAD Max Output Capacitance Load(5) 30 pF

Product Folder Links: LMP8640 LMP8640-Q1 LMP8640HV

VCM(V)

CMRR (dB)

140

130

120

110

100

-2 11 24 37 50 63 76

125 °C

25°C

-40°C

VS= 5V

VCM(V)

CMRR (dB)

140

130

120

110

100

-2 11 24 37 50 63 76

125°C

25°C

-40°C

VS= 5V

VCM (V)

IS(PA)

2300

2100

1900

1700

1500

1300

1100

900

700

500

300

-2 -1 0 1 2 3 4 16 28 40 52 64 76

VS= 5V

125°C

25°C -40°C

VCM (V)

IS(PA)

2500

2300

2100

1900

1700

1500

1300

1100

900

700

500

-2 -1 0 1 2 3 4 16 28 40 52 64 76

VS= 12V

125°C

25°C -40°C

VS(V)

IS(PA)

2500

2400

2300

2200

2100

2000

1900

800

700

600

500

400

300

2.7 5.3 8.0 10.6 13.2

25°C 125°C-40°C

VCM = 2.1V VCM=-2V

| |

VCM (V)

IS(PA)

2300

2100

1900

1700

1500

1300

1100

900

700

500

300

-2 -1 0 1 2 3 4 16 28 40 52 64 76

25°C

VS= 2.7V

125°C

-40°C

LMP8640

LMP8640-Q1

LMP8640HV

SNOSB28G –AUGUST 2010–REVISED NOVEMBER 2014

www.ti.com

7.9 Typical Characteristics

Unless otherwise specified: TA= 25°C, VS=V+-V-, VSENSE= +IN - (-IN), RL= 10 MΩ.

Figure 1. Supply Curent vs. Supply Voltage Figure 2. Supply Current vs. VCM

Figure 3. Supply Current vs. VCM Figure 4. Supply Current vs. VCM

Figure 5. CMRR vs. VCM (Gain 20 V/V) Figure 6. CMRR vs. VCM (Gain 50 V/V)

Product Folder Links: LMP8640 LMP8640-Q1 LMP8640HV

FREQUENCY (Hz)

GAIN (dB)

100 1k 10k 100k 1M 10M

GAIN 20V/V

GAIN 50V/V

GAIN 100V/V VS=5V, VCM=5V

100

-100

-200

-300

-400

-500

-600

-700

-800

-900-2 -1 0 1 2 3 4 16 28 40 52 64 76

VS= 12V

125°C

25°C

-40°C

VCM (V)

IB(PV)

(µA)

VCM (V)

IB(PV)

100

-100

-200

-300

-400

-500

-600

-700

-800

-900-2 -1 0 1 2 3 4 16 28 40 52 64 76

VS= 2.7V

125°C

25°C

-40°C

(µA)

100

-100

-200

-300

-400

-500

-600

-700

-800

-900-2 -1 0 1 2 3 4 16 28 40 52 64 76

VS= 5V

125 °C

25°C

-40°C

VCM (V)

IB(PV)

(µA)

VCM(V)

CMRR (dB)

140

130

120

110

100

-2 11 24 37 50 63 76

125°C

25°C

-40°C

VS= 5V

VCM(V)

VOS (PV)

-2 11 24 37 50 63 76

200

150

100

-50

-100

-150

-200

125°C

-40°C

25°C

VS= 5V

LMP8640

LMP8640-Q1

LMP8640HV

www.ti.com

SNOSB28G –AUGUST 2010–REVISED NOVEMBER 2014

Typical Characteristics (continued)

Unless otherwise specified: TA= 25°C, VS=V+-V-, VSENSE= +IN - (-IN), RL= 10 MΩ.

Figure 7. CMRR vs. VCM (Gain 100 V/V) Figure 8. Input Voltage Offset vs. VCM

Figure 9. Ibias vs. VCM Figure 10. Ibias vs. VCM

Figure 11. Ibias vs. VCM Figure 12. Gain vs. Frequency

Product Folder Links: LMP8640 LMP8640-Q1 LMP8640HV

VSENSE (10 mV/DIV)

TIME (400 ns/DIV)

VOUT (100mV/DIV)

GAIN 20V/V

GAIN 50V/V

GAIN 100 V/V VSENSE

VS= 5V, VCM = 12V

VSENSE (10 mV/DIV)

TIME (400 ns/DIV)

VOUT (100 mV/DIV)

GAIN 20V/V

GAIN 50V/V

GAIN 100V/V

VSENSE

VS= 5V, VCM= 12V

VSENSE (20 mV/DIV)

TIME (2 Ps/DIV)

VOUT (500 mV/DIV)

GAIN 20V/V

GAIN 50V/V

GAIN 100

VSENSE

VS=12V, VCM=12V

VSENSE(10 mV/DIV)

TIME (2Ps/DIV)

VOUT (100 mV/DIV)

GAIN 20V/V

GAIN 50V/V

GAIN 100V/V

VSENSE

VS= 5V, VCM= 12V

VSENSE (mV)

VOUT (V)

13.0

12.0

11.0

10.0

9.0

8.0

7.0

6.0

5.0

4.0

3.0

2.0

1.0

0.00 100 200 300 400 500 600

GAIN 20V/V

GAIN 50V/V

GAIN 100V/V

VS=12V, VCM =12V

VSENSE (mV)

VOUT (mV)

300

250

200

150

100

-3 -2 -1 0 1 2 3

GAIN 20V/V

GAIN 50V/V

GAIN 100V/V

VS=12V, VCM=12V

LMP8640

LMP8640-Q1

LMP8640HV

SNOSB28G –AUGUST 2010–REVISED NOVEMBER 2014

www.ti.com

Typical Characteristics (continued)

Unless otherwise specified: TA= 25°C, VS=V+-V-, VSENSE= +IN - (-IN), RL= 10 MΩ.

Figure 13. Output voltage vs. VSENSE Figure 14. Output Voltage vs. VSENSE (ZOOM Close to 0 V)

Figure 16. Small Step Response

Figure 15. Large Step Response

Figure 17. Settling Time (Fall) Figure 18. Settling Time (Rise)

Product Folder Links: LMP8640 LMP8640-Q1 LMP8640HV

Frequency (Hz)

CMRR (dB)

110

101 10 100 1k 10k 100k

GAIN 100V/V

GAIN 50V/V

GAIN 20V/V

VS= 5V, VCM = 12V

FREQUENCY (Hz)

PSRR (dB)

100

10 100 1k 10k 100k 1M

GAIN 100V/V

GAIN 50V/V

GAIN 20V/V

VS= 5V, VCM = 12V

IOUT (mA)

VOUT (V)

2.505

2.504

2.503

2.502

2.501

2.500

2.499

2.4980 1 2 3 4 5 6 7 8 9 10

GAIN 50

GAIN 100V/V

GAIN 20V/V

VS=5V, VCM=12V

IOUT (mA)

VOUT (V)

2.6

2.5

2.4

2.3

2.2

2.1

2.0

1.90 1 2 3 4 5 6 7 8 9 10

GAIN 50

GAIN 100V/V

GAIN 20V/V

VS=5V, VCM=12V

VCM (5V/DIV)

TIME (4 és/DIV)

VOUT (50 mV/DIV)

VCM

VOUT

VS = 5V, GAIN 20 V/V

VCM (5V/DIV)

TIME (4 és/DIV)

VOUT (20mV/DIV)

VCM

VOUT

VS= 5V, GAIN 20 V/V

LMP8640

LMP8640-Q1

LMP8640HV

www.ti.com

SNOSB28G –AUGUST 2010–REVISED NOVEMBER 2014

Typical Characteristics (continued)

Unless otherwise specified: TA= 25°C, VS=V+-V-, VSENSE= +IN - (-IN), RL= 10 MΩ.

Figure 19. Common Mode Step Response (Rise) Figure 20. Common Mode Step Response (Fall)

Figure 21. Load Regulation (Sinking) Figure 22. Load Regulation (Sourcing)

Figure 23. AC PSRR vs. Frequency Figure 24. AC CMRR vs. Frequency

Product Folder Links: LMP8640 LMP8640-Q1 LMP8640HV

+IN -IN

V+

V-

RG = 2*RIN

VOUT

LMP8640

RIN

VSENSE

+IN -IN

V+

V-

RG = 2*RIN

VOUT

LMP8640

LMP8640HV

RIN

LMP8640

LMP8640-Q1

LMP8640HV

SNOSB28G –AUGUST 2010–REVISED NOVEMBER 2014

www.ti.com

8 Detailed Description

8.1 Overview

The LMP8640 and LMP8640HV are single supply high side current sense amplifiers with a fixed gain of 20 V/V,

50 V/V, 100 V/V and a common mode voltage range of -2 V to 42 V (LMP8640-x) or -2 V to 76 V (LMP8640HV-

x) with a buffered voltage output.

8.2 Functional Block Diagram

8.3 Feature Description

As seen in Figure 25, the current flowing through sense resistor RSdevelops a voltage drop equal to VSENSE

across RS. The voltage at the -IN pin will now be less than +IN by an amount proportional to the VSENSE voltage.

Figure 25. Simple Current Monitor

The low bias currents of the error amplifier cause little voltage drop through RIN-, so the negative input of the

internal error amplifier is at essentially the same potential as the -IN input. The RIN resistors are 5 KΩeach.

Product Folder Links: LMP8640 LMP8640-Q1 LMP8640HV

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LMP8640HV

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SNOSB28G –AUGUST 2010–REVISED NOVEMBER 2014

Feature Description (continued)

The error amplifier will detect this voltage error between it's inputs and drive the MOSFET gate to conduct more

current, increasing the voltage drop across RIN+, until the servo amplifiers positive input matches the negative

input. At this point, the voltage drop across RIN+ now matches VSENSE.

IG, a current proportional to IS, will flow according to the following relation:

IG= VSENSE/RIN = RS* IS/RIN (1)

IGalso flows through the internal gain resistor RGdeveloping a voltage drop equal to:

VRG = IG* RG= (VSENSE/RIN) * RG= ((RS* IS)/ RIN )* RG(2)

VOUT = 2*(RS*IS)*G, (3)

where G=RG/RIN = 10 V/V, 25 V/V or 50 V/V, according to the gain option selected.

The voltage on RGis then amplified by a gain of 2 by the output gain stage to create the final overall gain of x20,

x50 and x100. The output stage has a low impedance drive allowing the LMP8640 to easily interface with other

IC's (ADC, Mux, µC…). No external buffering is required.

8.3.1 Selection of Sense Resistor

The value chosen for the shunt resistor, RS, depends on the application. It plays a big role in a current sensing

system and must be chosen with care. The selection of the shunt resistor needs to take in account the tradeoffs

in small-signal accuracy, the power dissipated and the voltage loss across the shunt itself.

In applications where a small current is sensed, a bigger value of RSis selected to minimize the error in the

proportional output voltage. Higher resistor value improves the signal-to-noise ratio (SNR) at the input of the

current sense amplifier and hence gives a more accurate output.

Similarly when high current is sensed, the power losses in RScan be significant so a smaller value of RSis

desired. In this condition it is also required to take in account also the power rating of RSresistor. The low input

offset of the LMP8640 allows the use of small sense resistors to reduce power dissipation still providing a good

input dynamic range. The input dynamic range is the ratio between the maximum signal that can be measured

and the minimum signal that can be detected, where usually the input offset is the principal limiting factor.

Figure 26. Example of a Kelvin (4-Wire) Connection to a Two-Terminal Resistor

The amplifier inputs should be directly connected to the sense resistor pads using “Kelvin” or “4-wire” connection

techniques. The paths of the input traces should be identical, including connectors and vias, so that these errors

will be equal and cancel.

Product Folder Links: LMP8640 LMP8640-Q1 LMP8640HV

LMP8640

LMP8640-Q1

LMP8640HV

SNOSB28G –AUGUST 2010–REVISED NOVEMBER 2014

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Feature Description (continued)

8.3.1.1 Resistor Power Rating and Thermal Issues

The power dissipated by the sense resistor can be calculated from:

PD= IMAX2* RS

where

• PDis the power dissipated by the resistor in Watts

• IMAX is the maximum load current in Amps

• RSis the sense resistor value in ohms. (4)

The resistor must be rated for more than the expected maximum power (PD), with margin for temperature

derating. Be sure to observe any power derating curves provided by the resistor manufacturer.

Running the resistor at higher temperatures will also affect the accuracy. As the resistor heats up, the resistance

generally goes up, which will cause a change in the measurement. The sense resistor should have as much

heat-sinking as possible to remove this heat through the use of heatsinks or large copper areas coupled to the

resistor pads. A reading drifting slightly after turn-on can usually be traced back to sense resistor heating.

8.3.1.2 Using PCB Trace as a Sense Resistor

While it may be tempting to use the resistance of a known area of PCB trace or copper area as a sense resistor,

it is not recommended for precision measurements.

The tempco of copper is typically 3300-4000ppm/°K (0.33% to 0.4% per °C), which can vary with PCB

processes.

A typical surface mount sense resistor temperature coefficient (tempco) is in the 50ppm to 500ppm per °C range

offering more measurement consistency and accuracy over the copper trace. Special low tempco resistors are

available in the 0.1 to 50ppm range, but at a much higher cost.

8.3.2 Sense Line Inputs

The sense lines should be connected to a point on the resistor that is not shared with the main current path, as

shown in Figure 26 above. For lowest drift, the amplifier should be mounted away from any heat generating

devices, which may include the sense resistor. The traces should be one continuous trace of copper from the

sense resistor pad to the amplifier input pin pad, and ideally on the same copper layer with minimal vias or

connectors. This can be important around the sense resistor if it is generating any significant heat gradients. Vias

in the sense lines should be formed from continuous plated copper and routing through connectors should be

avoided. It is better to extend the sense lines than to place the amplifier in a hostile environment.

To minimize noise pickup and thermal errors, the input traces should be treated like a high-speed differential

signal pair and routed tightly together with a direct path to the input pins on the same copper layer. They do not

need to be "impedance matched", but should follow the same matching rules about vias, spacing and equal

lengths. The input traces should be run away from noise sources, such as digital lines, switching supplies or

motor drive lines. Remember that these input traces can contain high voltage, and should have the appropriate

trace routing clearances to other traces and layers. Since the sense traces only carry the amplifier bias current

(typically about 12µA per input at room temp), the connecting input traces can be thin traces running close

together. This can help with routing or creating the required spacings.

It should also be noted that, due to the nature of the device topology, the positive input bias current will vary with

VSENSE with an extra current approximately equivalent to VSENSE /5kΩon top of the typical 12 uA bias current.

The negative input bias current is not in the feedback path and will not change over VSENSE. High or miss-

matched source impedances should be avoided as this imbalance will create an additional error over input

voltage.

8.3.3 Effects of Series Resistance on Sense Lines

Because the input stage uses precision 5 KΩresistors internally to convert the voltage on the input pin to a

current, any resistance added in series with the input pins will change this resistance, and thus alter the gain.

If a resistance is added in series with an input, the gain of that input will not track that of the other input, causing

a constant gain error.

Product Folder Links: LMP8640 LMP8640-Q1 LMP8640HV

LMP8640

LMP8640-Q1

LMP8640HV

www.ti.com

SNOSB28G –AUGUST 2010–REVISED NOVEMBER 2014

Feature Description (continued)

It is not recommended to use external resistance to alter the gain, as external resistors will not have the same

thermal matching as the internal thin film resistors. Any added resistance will severely degrade the offset and

CMRR specifications. It is recommended that the total trace resistance be less than 10 ohms.

If resistors are purposely added for filtering, resistance should be added equally to both inputs and the user

should be aware that the gain will change slightly.

8.4 Device Functional Modes

8.4.1 Bias Current at Low Common Mode Voltage

At common mode voltages below +2 V, the input bias current starts to reverse and crosses through zero at about

+1.8 V. This can be seen in the Input Bias Current graphs in Figure 9 through Figure 11. Negative currents on

the graph show curent flow out of the input and into the load. The graphs show the current for each input, so the

actual "bias" current will be twice graph value. This total current could be as high as 1mA, depending on the point

of equilibrium.

While this will not affect the vast majority of applications, it may cause MOSFET switched designs with non-linear

loads (like LED's or diode-isolated loads) to "float" above ground where the load leakage and bias currents attain

equilibrium. A small resistor to ground (on the load supply side) can bleed-off this current.

8.4.2 Applying Input Voltage with No Supply Voltage

The full specified input common mode voltage range may be applied to the inputs while the LMP8640 power is

off (V+ = 0 V). When the LMP8640 is powered off, the RIN resistors are disconnected internally by MOSFETS

and the leakage currents are very low (sub uA).

The 6 V input differential limit still applies, so at no time should the two inputs be more than 6 V apart. There are

also Zener clamps on the inputs to ground, so do not exceed the input limits specified in the Absolute Maximum

Ratings.

8.4.3 Driving an ADC

The input stage of an Analog to Digital converter can be modeled with a resistor and a capacitance to ground. So

if the voltage source doesn't have a low impedance, an error in amplitude measurement will occur. In this case, a

buffer is needed to drive the ADC. The LMP8640 has an internal output buffer able to directly drive a capacitive

load up to 30 pF, or, the input stage of an ADC. It is recommended that an external low pass RC filter be added

to the output of the LMP8640 to reduce the noise and limit the bandwidth of the current sense measurement.

If the supply voltage of the LMP8640 is higher than the ADC supply voltage, care should be taken to prevent the

LMP8640 output from over-driving the ADC input.

This can be accomplished with a series resistance (which should be present when driving a ADC) and a

clamping diode to the ADC's power supply. The diode will clamp the ADC input to a safe level. Do not completely

rely on a calculated maximum output voltage. Transients or fault conditions outside the normal conditions area

can cause the output to swing to a higher than expected voltage.

Product Folder Links: LMP8640 LMP8640-Q1 LMP8640HV

+IN -IN

V+

V-

RG = 2*RIN

VOUT

LMP8640

RIN

ADC

GRF

LMP8640

LMP8640-Q1

LMP8640HV

SNOSB28G –AUGUST 2010–REVISED NOVEMBER 2014

www.ti.com

9 Application and Implementation

NOTE

Information in the following applications sections is not part of the TI component

specification, and TI does not warrant its accuracy or completeness. TI’s customers are

responsible for determining suitability of components for their purposes. Customers should

validate and test their design implementation to confirm system functionality.

9.1 Application Information

The LMP8640x amplifies the voltage developed across a current-sensing resistor.

9.2 Typical Application

Figure 27. Typical Application Example

9.2.1 Design Requirements

In this example, a current monitor application is required to measure the current into a load (peak current 10 A)

with a resolution of 10 mA and 0.5% of accuracy.

The 10bit analog to digital converter accepts a max input voltage of 4.1 V. In order to not burn too much power

on the shunt resistor, it needs to be less than 10 mΩ.Table 1 below summarizes the other design conditions.

Table 1. Example Design Requirements

VALUE

WORKING CONDITION MIN MAX

Supply Voltage 5 V 5.5 V

Common mode Voltage 48 V 70 V

Temperature 0°C 70°C

Signal BW 50 kHz

9.2.2 Design Procedure

9.2.2.1 First Step – LMP8640 or LMP8640HV Selection

The required common mode voltage of the application implies that the right choice is the LMP8640HV (High

common mode voltage up tp 76 V).

Product Folder Links: LMP8640 LMP8640-Q1 LMP8640HV

0 2 4 6 8 10

VOUT (V)

LOAD CURRENT (A)

Vout

C001

LMP8640

LMP8640-Q1

LMP8640HV

www.ti.com

SNOSB28G –AUGUST 2010–REVISED NOVEMBER 2014

9.2.2.2 Second Step – Gain Option Selection

We can choose between three gain option (20 V/V, 50 V/V, 100 V/V). Considering the max input voltage of the

ADC (4.1 V) , the max Sense voltage across the shunt resistor is evaluated according the following formula:

VSENSE= (MAX Vin ADC) / Gain; (5)

hence the max VSENSE will be 205 mV, 82 mV, 41 mV respectively. The shunt resistor are then evaluated

considering the maximum monitored current :

RS= (max VSENSE) / I_MAX (6)

For each gain option the max shunt resistors are the following : 20.5 mΩ, 8.2 mΩ, 4.1 mΩrespectively.

One of the project constraints requires RS<10 mΩ, it means that the 20.5 mΩwill be discarded and hence the 50

V/V and 100 V/V gain options are still in play.

9.2.2.3 Third Step – Shunt Resistor Selection

At this point an error budget calculation, considering the calibration of the Gain, Offset, CMRR, and PSRR, helps

in the selection of the shunt resistor. In the table below the contribution of each error source is calculated

considering the values of the Electrical Characteristics table at 5 V supply.

Table 2. Resolution Calculation

ERROR SOURCE RS= 4.1 mΩRS= 8.1 mΩ

CMRR calibrated at mid VCM range 77.9 µV 77.9 µV

PSRR calibrated at 5 V 8.9 µV 8.9 µV

Total error (squared sum of contribution) 78 µV 78 µV

Resolution (Total error / RS) 19.2 mA 9.6 mA

Table 3. Accuracy Calculation

ERROR SOURCE RS= 4.1 mΩRS= 8.1 mΩ

Tc Vos 182 µV 182 µV

Nosie 216 µV 216 µV

Gain drift 75.2 µV 151 µV

Total error (squared sum of contribution) 293 µV 320 µV

Accuracy 100*(Max_VSENSE / Total Error) 0.7% 0.4%

From the tables above is clear that the 8.2 mΩshunt resistor allows the respect of the project's constraints. The

power burned on the Shunt is 820 mW at 10 A.

9.2.3 Application Performance Plot

Figure 28. Application Example Results using 8.2 mΩResistor

Product Folder Links: LMP8640 LMP8640-Q1 LMP8640HV

LMP8640

LMP8640-Q1

LMP8640HV

SNOSB28G –AUGUST 2010–REVISED NOVEMBER 2014

www.ti.com

9.3 Do's and Don'ts

Do properly bypass the power supplies.

Do add series resistance to the output when driving capacitive loads, cables, long traces, muxes and ADC

inputs.

Do not exceed the input common mode range.

10 Power Supply Recommendations

The input circuitry of the device can accurately measure signals on common-mode voltages beyond its power

supply voltage, V+. For example, the voltage applied to the VS power supply terminal can be 5 V, whereas the

load power-supply voltage being monitored (the common-mode voltage) can be as high as +76 V. Power-supply

bypass capacitors are required for stability and should be placed as closely as possible to the supply and ground

terminals of the device. A typical value for this supply bypass capacitor is 0.1 μF close to the V+pin. The

capacitors should be rated for at least twice the maximum expected applied voltage. Applications with noisy or

high-impedance power supplies may require additional decoupling capacitors to reject power-supply noise.

11 Layout

11.1 Layout Guidelines

• Use 4-wire (Kelvin) connections to the sense resistor. Connect to the resistor at a point that is not within a

direct high-current path (See Figure 29).

• Do not "share" part of the sense trace path with the load current.

• Maintain proper clearance and spacings around the input traces, as they may be at a higher voltage (up to 76

V) than the surrounding traces and planes.

• Input traces from the sense resistor pads should follow the same path, be spaced tightly together, and ideally

on the same copper layer.

• Vias used in the input traces should be of continuous plated copper to avoid creating thermocouples.

• Avoid routing inputs through jumpers and connectors. Even the best connectors introduce thermal errors

("thermocouples"). Each input trace should have the same number of "thermocouples" if they cannot be

avoided.

• Keep the amplifier away from heat generating devices. The copper-solder-lead junction on the input pins will

form a thermocouple. The copper mass should be equal on both input pins.

• Avoid temperature gradients across the input pins. Input pins should be equal distance to the heat source.

• Place the LMP8640 in the most temperature-stable area possible and away from high-velocity air flows. It is

better to carefully extend the input traces than to place the amplifier in a less-than-ideal environment.

• Give the sense resistor as much copper trace area as possible to dissipate heat as the resistor value will

change slightly with temperature. Also see the resistor manufacturers datasheet or application notes for

further layout guidelines.

• The power-supply bypass capacitor should be placed as closely as possible to the supply and ground

terminals. The recommended value of this bypass capacitor is 0.1 μF. Additional decoupling capacitance can

be added to compensate for noisy or high-impedance power supplies.

Product Folder Links: LMP8640 LMP8640-Q1 LMP8640HV

LMP8640

LMP8640-Q1

LMP8640HV

www.ti.com

SNOSB28G –AUGUST 2010–REVISED NOVEMBER 2014

11.2 Layout Example

Figure 29. Layout Example - Kelvin Connection to a Two-Terminal Resistor

Product Folder Links: LMP8640 LMP8640-Q1 LMP8640HV

LMP8640

LMP8640-Q1

LMP8640HV

SNOSB28G –AUGUST 2010–REVISED NOVEMBER 2014

www.ti.com

Layout Example (continued)

Figure 30. Layout Example - Four-Wire (Kelvin) Resistor Connection

Product Folder Links: LMP8640 LMP8640-Q1 LMP8640HV

LMP8640

LMP8640-Q1

LMP8640HV

www.ti.com

SNOSB28G –AUGUST 2010–REVISED NOVEMBER 2014

12 Device and Documentation Support

12.1 Device Support

12.1.1 Development Support

• Evaluation Board for LMP8640HV-F, http://www.ti.com/tool/lmp8640hv-feval

• Evaluation Board for LMP8640HV-H, http://www.ti.com/tool/lmp8640hv-heval

• Evaluation Board for LMP8640HV-T, http://www.ti.com/tool/lmp8640hv-teval

• TINA-TI SPICE-Based Analog Simulation Program, http://www.ti.com/tool/tina-ti

12.2 Documentation Support

12.2.1 Related Documentation

For related documantation, see the following:

• AN-1975 LMP8640 / LMP8645 Evaluation Board User Guide, SNOA546

• Absolute Maximum Ratings for Soldering, SNOA549

12.3 Related Links

The table below lists quick access links. Categories include technical documents, support and community

resources, tools and software, and quick access to sample or buy.

Table 4. Related Links

TECHNICAL TOOLS & SUPPORT &

PARTS PRODUCT FOLDER SAMPLE & BUY DOCUMENTS SOFTWARE COMMUNITY

LMP8640 Click here Click here Click here Click here Click here

LMP8640-Q1 Click here Click here Click here Click here Click here

LMP8640HV Click here Click here Click here Click here Click here

12.4 Trademarks

All trademarks are the property of their respective owners.

12.5 Electrostatic Discharge Caution

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam

during storage or handling to prevent electrostatic damage to the MOS gates.

12.6 Glossary

SLYZ022 —TI Glossary.

This glossary lists and explains terms, acronyms, and definitions.

13 Mechanical, Packaging, and Orderable Information

The following pages include mechanical, packaging, and orderable information. This information is the most

current data available for the designated devices. This data is subject to change without notice and revision of

this document. For browser-based versions of this data sheet, refer to the left-hand navigation.

Product Folder Links: LMP8640 LMP8640-Q1 LMP8640HV

PACKAGE OPTION ADDENDUM

www.ti.com 10-Dec-2020

Addendum-Page 1

PACKAGING INFORMATION

Orderable Device Status

(1)

Package Type Package

Drawing Pins Package

Qty Eco Plan

(2)

Lead finish/

Ball material

(6)

MSL Peak Temp

(3)

Op Temp (°C) Device Marking

(4/5)

Samples

LMP8640HVMK-F/NOPB ACTIVE SOT-23-THIN DDC 6 1000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 AD6A

LMP8640HVMK-H/NOPB ACTIVE SOT-23-THIN DDC 6 1000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 AF6A

LMP8640HVMK-T/NOPB ACTIVE SOT-23-THIN DDC 6 1000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 AB6A

LMP8640HVMKE-F/NOPB ACTIVE SOT-23-THIN DDC 6 250 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 AD6A

LMP8640HVMKE-H/NOPB ACTIVE SOT-23-THIN DDC 6 250 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 AF6A

LMP8640HVMKE-T/NOPB ACTIVE SOT-23-THIN DDC 6 250 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 AB6A

LMP8640HVMKX-F/NOPB ACTIVE SOT-23-THIN DDC 6 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 AD6A

LMP8640HVMKX-H/NOPB ACTIVE SOT-23-THIN DDC 6 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 AF6A

LMP8640HVMKX-T/NOPB ACTIVE SOT-23-THIN DDC 6 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 AB6A

LMP8640MK-F/NOPB ACTIVE SOT-23-THIN DDC 6 1000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 AC6A

LMP8640MK-H/NOPB ACTIVE SOT-23-THIN DDC 6 1000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 AE6A

LMP8640MK-T/NOPB ACTIVE SOT-23-THIN DDC 6 1000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 AA6A

LMP8640MKE-F/NOPB ACTIVE SOT-23-THIN DDC 6 250 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 AC6A

LMP8640MKE-H/NOPB ACTIVE SOT-23-THIN DDC 6 250 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 AE6A

LMP8640MKE-T/NOPB ACTIVE SOT-23-THIN DDC 6 250 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 AA6A

LMP8640MKX-F/NOPB ACTIVE SOT-23-THIN DDC 6 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 AC6A

LMP8640MKX-H/NOPB ACTIVE SOT-23-THIN DDC 6 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 AE6A

LMP8640MKX-T/NOPB ACTIVE SOT-23-THIN DDC 6 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 AA6A

LMP8640QMKE-T/NOPB ACTIVE SOT-23-THIN DDC 6 250 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 AUAA

LMP8640QMKX-T/NOPB ACTIVE SOT-23-THIN DDC 6 3000 RoHS & Green Call TI | NIPDAU Level-1-260C-UNLIM -40 to 125 AUAA

PACKAGE OPTION ADDENDUM

www.ti.com 10-Dec-2020

Addendum-Page 2

(1) The marketing status values are defined as follows:

ACTIVE: Product device recommended for new designs.

LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.

NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.

PREVIEW: Device has been announced but is not in production. Samples may or may not be available.

OBSOLETE: TI has discontinued the production of the device.

(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance

do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may

reference these types of products as "Pb-Free".

RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.

Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based

flame retardants must also meet the <=1000ppm threshold requirement.

(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.

(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation

of the previous line and the two combined represent the entire Device Marking for that device.

(6) Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two

lines if the finish value exceeds the maximum column width.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information

provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and

continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.

TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

OTHER QUALIFIED VERSIONS OF LMP8640, LMP8640-Q1 :

•Catalog: LMP8640

•Automotive: LMP8640-Q1

NOTE: Qualified Version Definitions:

PACKAGE OPTION ADDENDUM

www.ti.com 10-Dec-2020

Addendum-Page 3

•Catalog - TI's standard catalog product

•Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects

TAPE AND REEL INFORMATION

*All dimensions are nominal

Device Package

Type Package

Drawing Pins SPQ Reel

Diameter

(mm)

Reel

Width

W1 (mm)

(mm) B0

(mm) K0

(mm) P1

(mm) W

(mm) Pin1

Quadrant

LMP8640HVMK-F/NOPB SOT-

23-THIN DDC 6 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3

LMP8640HVMK-H/NOPB SOT-

23-THIN DDC 6 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3

LMP8640HVMK-T/NOPB SOT-

23-THIN DDC 6 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3

LMP8640HVMKE-F/NOPB SOT-

23-THIN DDC 6 250 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3

LMP8640HVMKE-H/NOP

BSOT-

23-THIN DDC 6 250 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3

LMP8640HVMKE-T/NOPB SOT-

23-THIN DDC 6 250 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3

LMP8640HVMKX-F/NOPB SOT-

23-THIN DDC 6 3000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3

LMP8640HVMKX-H/NOP

BSOT-

23-THIN DDC 6 3000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3

LMP8640HVMKX-T/NOPB SOT-

23-THIN DDC 6 3000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3

LMP8640MK-F/NOPB SOT-

23-THIN DDC 6 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3

LMP8640MK-H/NOPB SOT- DDC 6 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3

PACKAGE MATERIALS INFORMATION

www.ti.com 25-Aug-2018

Pack Materials-Page 1

Device Package

Type Package

Drawing Pins SPQ Reel

Diameter

(mm)

Reel

Width

W1 (mm)

(mm) B0

(mm) K0

(mm) P1

(mm) W

(mm) Pin1

Quadrant

23-THIN

LMP8640MK-T/NOPB SOT-

23-THIN DDC 6 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3

LMP8640MKE-F/NOPB SOT-

23-THIN DDC 6 250 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3

LMP8640MKE-H/NOPB SOT-

23-THIN DDC 6 250 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3

LMP8640MKE-T/NOPB SOT-

23-THIN DDC 6 250 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3

LMP8640MKX-F/NOPB SOT-

23-THIN DDC 6 3000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3

LMP8640MKX-H/NOPB SOT-

23-THIN DDC 6 3000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3

LMP8640MKX-T/NOPB SOT-

23-THIN DDC 6 3000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3

LMP8640QMKE-T/NOPB SOT-

23-THIN DDC 6 250 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3

LMP8640QMKX-T/NOPB SOT-

23-THIN DDC 6 3000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3

*All dimensions are nominal

Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)

LMP8640HVMK-F/NOPB SOT-23-THIN DDC 6 1000 210.0 185.0 35.0

PACKAGE MATERIALS INFORMATION

www.ti.com 25-Aug-2018

Pack Materials-Page 2

Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)

LMP8640HVMK-H/NOPB SOT-23-THIN DDC 6 1000 210.0 185.0 35.0

LMP8640HVMK-T/NOPB SOT-23-THIN DDC 6 1000 210.0 185.0 35.0

LMP8640HVMKE-F/NOPB SOT-23-THIN DDC 6 250 210.0 185.0 35.0

LMP8640HVMKE-H/NOPB SOT-23-THIN DDC 6 250 210.0 185.0 35.0

LMP8640HVMKE-T/NOPB SOT-23-THIN DDC 6 250 210.0 185.0 35.0

LMP8640HVMKX-F/NOPB SOT-23-THIN DDC 6 3000 210.0 185.0 35.0

LMP8640HVMKX-H/NOPB SOT-23-THIN DDC 6 3000 210.0 185.0 35.0

LMP8640HVMKX-T/NOPB SOT-23-THIN DDC 6 3000 210.0 185.0 35.0

LMP8640MK-F/NOPB SOT-23-THIN DDC 6 1000 210.0 185.0 35.0

LMP8640MK-H/NOPB SOT-23-THIN DDC 6 1000 210.0 185.0 35.0

LMP8640MK-T/NOPB SOT-23-THIN DDC 6 1000 210.0 185.0 35.0

LMP8640MKE-F/NOPB SOT-23-THIN DDC 6 250 210.0 185.0 35.0

LMP8640MKE-H/NOPB SOT-23-THIN DDC 6 250 210.0 185.0 35.0

LMP8640MKE-T/NOPB SOT-23-THIN DDC 6 250 210.0 185.0 35.0

LMP8640MKX-F/NOPB SOT-23-THIN DDC 6 3000 210.0 185.0 35.0

LMP8640MKX-H/NOPB SOT-23-THIN DDC 6 3000 210.0 185.0 35.0

LMP8640MKX-T/NOPB SOT-23-THIN DDC 6 3000 210.0 185.0 35.0

LMP8640QMKE-T/NOPB SOT-23-THIN DDC 6 250 210.0 185.0 35.0

LMP8640QMKX-T/NOPB SOT-23-THIN DDC 6 3000 210.0 185.0 35.0

PACKAGE MATERIALS INFORMATION

www.ti.com 25-Aug-2018

Pack Materials-Page 3

www.ti.com

PACKAGE OUTLINE

0.20

0.12 TYP 0.25

3.05

2.55

4X 0.95

1.100

0.847

0.1

0.0 TYP

6X 0.5

0.3

0.6

0.3 TYP

1.9

0 -8 TYP

3.05

2.75

1.75

1.45

SOT - 1.1 max heightDDC0006A

SOT

4214841/B 11/2020

NOTES:

1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing

per ASME Y14.5M.

2. This drawing is subject to change without notice.

3. Reference JEDEC MO-193.

0.2 C A B

INDEX AREA

PIN 1

GAGE PLANE

SEATING PLANE

0.1 C

SCALE 4.000

www.ti.com

EXAMPLE BOARD LAYOUT

0.07 MAX

ARROUND 0.07 MIN

ARROUND

6X (1.1)

6X (0.6)

(2.7)

4X (0.95)

(R0.05) TYP

4214841/B 11/2020

SOT - 1.1 max heightDDC0006A

SOT

NOTES: (continued)

4. Publication IPC-7351 may have alternate designs.

5. Solder mask tolerances between and around signal pads can vary based on board fabrication site.

SYMM

LAND PATTERN EXAMPLE

EXPLOSED METAL SHOWN

SCALE:15X

SYMM

SOLDER MASK

OPENING

METAL UNDER

SOLDER MASK

DEFINED

EXPOSED METAL

METAL

SOLDER MASK

OPENING

NON SOLDER MASK

DEFINED

SOLDERMASK DETAILS

EXPOSED METAL

www.ti.com

EXAMPLE STENCIL DESIGN

(2.7)

4X(0.95)

6X (1.1)

6X (0.6)

(R0.05) TYP

SOT - 1.1 max heightDDC0006A

SOT

4214841/B 11/2020

NOTES: (continued)

6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate

design recommendations.

7. Board assembly site may have different recommendations for stencil design.

SOLDER PASTE EXAMPLE

BASED ON 0.125 THICK STENCIL

SCALE:15X

SYMM

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