4-114
File Number 2225.2
CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures.
http://www.intersil.com or 407-727-9207 |Copyright © Intersil Corporation 1999
IRFF9230
-4.0A, -200V, 0.800 Ohm, P-Channel Power
MOSFET
This P-Channel enhancement mode silicon gate power field
effect transistor is an advanced power MOSFET designed,
tested, and guaranteed to withstand a specified level of
energy in the breakdown avalanche mode of operation. All of
these power MOSFETs are designed for applications such
as switching regulators, switching converters, motor drivers,
relay drivers, and drivers for high power bipolar switching
transistors requiring high speed and low gate drive power.
These types can be operated directly from integrated
circuits.
Formerly developmental type TA17512.
Features
-4.0A, -200V
•r
DS(ON) = 0.800
Single Pulse Avalanche Energy Rated
SOA is Power Dissipation Limited
Nanosecond Switching Speeds
Linear Transfer Characteristics
High Input Impedance
Symbol
Packaging
JEDEC TO-205AF
Ordering Information
PART NUMBER PACKAGE BRAND
IRFF9230 TO-205AF IRFF9230
NOTE: When ordering, use the entire part number.
G
D
S
SOURCE
DRAIN
(CASE)
GATE
Data Sheet February 1999
4-115
Absolute Maximum Ratings TC = 25oC, Unless Otherwise Specified IRFF9230 UNITS
Drain to Source Voltage (Note 1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDS -200 V
Drain to Gate Voltage (RGS = 20kΩ) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .VDGR -200 V
Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .ID-4.0 A
Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM -16 A
Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGS ±20 V
Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PD25 W
Dissipation Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.2 W/oC
Single Pulse Avalanche Energy Rating (Note 4). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . EAS 500 mJ
Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, TSTG -55 to 150 oC
Maximum Temperature for Soldering
Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .T
L300 oC
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. TJ= 25oC to 125oC.
Electrical Specifications TC = 25oC, Unless Otherwise Specified
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
Drain to Source Breakdown Voltage BVDSS ID = -250µA, VGS = 0V, (Figure 10) -200 - - V
Gate Threshold Voltage VGS(TH) VGS = VDS, ID = -250µA -2 - -4 V
Zero Gate Voltage Drain Current IDSS VDS = Rated BVDSS, VGS = 0V - - -25 µA
VDS = 0.8 x Rated BVDSS, VGS = 0V, TC = 125oC - - -250 µA
On-State Drain Current (Note 2) ID(ON) VDS > ID(ON) x rDS(ON)MAX, VGS = -10V -4.0 - - A
Gate to Source Leakage Current IGSS VGS = ±20V - - ±100 nA
Drain to Source On Resistance (Note 2) rDS(ON) ID = -2.0A, VGS = -10V, (Figures 8, 9) - 0.5 0.800
Forward Transconductance (Note 2) gfs VDS > ID(ON) x rDS(ON)MAX, ID = -2.0A, (Figure 12) 2.2 3.5 - S
Turn-On Delay Time td(ON) VDD = 0.5BVDSS, ID -4.0A, RG = 9.1Ω,
RL = 2.5for BVDSS = -200V
RL = 18.7for BVDSS = -150V
(Figures 17, 18) MOSFET Switching Times are
Essentially Independent of Operating
Temperature
-3050ns
Rise Time tr- 50 100 ns
Turn-Off Delay Time td(OFF) - 50 100 ns
Fall Time tf-4080ns
Total Gate Charge
(Gate to Source + Gate to Drain) Qg(TOT) VGS = -10V, ID = -4.0A, VDS = 0.8 x Rated BVDSS,
IG(REF) = -1.5mA, (Figures 14, 19, 20)
Gate Charge is Essentially Independent of
Operating Temperature
-3145nC
Gate to Source Charge Qgs -18-nC
Gate to Drain “Miller” Charge Qgd -13-nC
Input Capacitance CISS VDS = -25V, VGS = 0V, f = 1MHz, (Figure 11) - 550 - pF
Output Capacitance COSS - 170 - pF
Reverse Transfer Capacitance CRSS -50-pF
Internal Drain Inductance LDMeasured From the Drain
Lead, 5mm (0.2in) From
Package to Center of Die
Modified MOSFET
Symbol Showing the In-
ternal Devices
Inductances
- 5.0 - nH
Internal Source Inductance LSMeasured From the Source
Lead, 5mm (0.2in) From
Header to Source Bonding
Pad
-15-nH
Thermal Resistance Junction to Case RθJC - - 5.0 oC/W
Thermal Resistance
Junction to Ambient RθJA Typical Socket Mount - - 175 oC/W
LS
LD
G
D
S
IRFF9230
4-116
Source to Drain Diode Specifications
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
Continuous Source to Drain Current ISD Modified MOSFET Symbol
Showing the Integral
Reverse P-N Junction
Rectifier
- - -4.0 A
Pulse Source to Drain Current
(Note 3) ISM - - -16 A
Source to Drain Diode Voltage (Note 2) VSD TC = 25oC, ISD = -4.0A, VGS = 0V, (Figure 13) - - -1.5 V
Reverse Recovery Time trr TJ = 150oC, ISD = -4.0A, dISD/dt = 100A/µs - 400 - ns
Reverse Recovery Charge QRR TJ = 150oC, ISD = -4.0A, dISD/dt = 100A/µs - 2.6 - µC
NOTES:
2. Pulse test: pulse width 300µs, duty cycle 2%.
3. Repetitive rating: pulse width limited by maximum junction temperature. See Transient Thermal Impedance curve (Figure 3).
4. VDD = 50V, starting TJ= 25oC, L = 46.9mH, RG= 25Ω, peak IAS = 4.0A (Figures 15, 16).
G
D
S
Typical Performance Curves Unless Otherwise Specified
FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE
TEMPERATURE FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs
CASE TEMPERATURE
FIGURE 3. NORMALIZED TRANSIENT THERMAL IMPEDANCE
TC, CASE TEMPERATURE (oC)
POWER DISSIPATION MULTIPLIER
00 25 50 75 100 150
0.2
0.4
0.6
0.8
1.0
1.2
125 050 100
ID, DRAIN CURRENT (A)
TC, CASE TEMPERATURE (oC)
150
25 75 125
-5
-4
-3
-2
-1
t1, RECTANGULAR PULSE DURATION (s)
ZθJC, NORMALIZED
TRANSIENT THERMAL IMPEDANCE
10-3 10-2
1
10-5 10-4
0.01
0.1
10
10-1 1
PDM
NOTES:
DUTY FACTOR: D = t1/t2
PEAK TJ = PDM x ZθJC x RθJC + TC
t1
t2
SINGLE PULSE
0.1
0.02
0.2
0.5
0.01
0.05
IRFF9230
4-117
FIGURE 4. FORWARD BIAS SAFE OPERATING AREA FIGURE 5. OUTPUT CHARACTERISTICS
FIGURE 6. SATURATION CHARACTERISTICS FIGURE 7. TRANSFER CHARACTERISTICS
NOTE: Heating effect of 2µs pulse is minimal.
FIGURE 8. DRAIN TO SOURCE ON RESISTANCE vs GATE
VOLTAGE AND DRAIN CURRENT FIGURE 9. NORMALIZED DRAIN TO SOURCE ON
RESISTANCE vs JUNCTION TEMPERATURE
Typical Performance Curves Unless Otherwise Specified (Continued)
VDS, DRAIN TO SOURCE VOLTAGE (V)
-10
ID, DRAIN CURRENT (A)
-100
-100
-1
-10-1
-0.1 -1000
10µs
100µs
1ms
10ms
100ms
DC
SINGLE PULSE
TJ = MAX RATED
TC = 25oC
OPERATION IN THIS AREA
IS LIMITED BY rDS(ON)
ID, DRAIN CURRENT (A)
0 -10 -20 -30 -40
-3
-6
-9
-12
-15
-50
VDS, DRAIN TO SOURCE VOLTAGE (V)
0
VGS = -10V VGS = -9V
VGS = -7V
VGS = -6V
VGS = -5V
VGS = -4V
80µs PULSE TEST
VGS = -8V
0
-3
0-2 -4 -6 -10
-6
-9
ID, DRAIN CURRENT (A)
VDS, DRAIN TO SOURCE VOLTAGE (V)
-12
-8
-15
VGS = -10V
-9V
PULSE DURATION = 80µs
-6V
-8V
-5V
-4V
-7V
-15
-12
-9
-6
-3
00 -2-4 -6-8-10
VGS, GATE TO SOURCE VOLTAGE (V)
PULSE DURATION = 80µs
VDS ID(ON) x rDS(ON) MAX
ID(ON), ON-STATE DRAIN CURRENT (A)
TJ = 125oC
TJ = 25oC
TJ = -55oC
0
1.2
-5 -10 -15 -20
rDS(ON), DRAIN TO SOURCE
ID, DRAIN CURRENT (A) -25
1.6
0
0.4
0.8
VGS = -20V
PULSE DURATION = 2µs
2.0
VGS = -10V
ON RESISTANCE ()
NORMALIZED DRAIN TO SOURCE
2.5
1.5
1.0
0.5
0
-40 0 40
TJ, JUNCTION TEMPERATURE (oC)
120
2.0
80
VGS = -10V, ID = -2A
160
ON RESISTANCE
IRFF9230
4-118
FIGURE 10. NORMALIZED DRAIN TO SOURCE BREAKDOWN
VOLTAGE vs JUNCTION TEMPERATURE FIGURE 11. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
FIGURE 12. TRANSCONDUCTANCE vs DRAIN CURRENT FIGURE 13. SOURCE TO DRAIN DIODE VOLTAGE
FIGURE 14. GATE TO SOURCE VOLTAGE vs GATE CHARGE
Typical Performance Curves Unless Otherwise Specified (Continued)
1.25
0.95
0.85
0.75
-40 0 40
TJ, JUNCTION TEMPERATURE (oC)
NORMALIZED DRAIN TO SOURCE
BREAKDOWN VOLTAGE
80 120 160
1.05
1.15
ID = -250µA2000
400
00-20 -50
C, CAPACITANCE (pF)
1200
VDS, DRAIN TO SOURCE VOLTAGE (V)
1600
800 CISS
COSS CRSS
-10 -30 -40
CISS = CGS + CGD
CRSS = CGD
COSS CDS + CGD
VGS = 0V, f = 1MHz
ID, DRAIN CURRENT (A)
gfs, TRANSCONDUCTANCE (S)
0 -3 -6 -9 -12
1.4
2.8
4.2
5.6
7.0
-15
TJ = 125oC
TJ = 25oC
TJ = -55oC
PULSE DURATION = 80µs
0-0.4 -1.0 -1.2 -1.6 -1.8-0.6 VSD, SOURCE TO DRAIN VOLTAGE (V)
-0.8 -1.4
-0.1
-1.0
-10
ISD, SOURCE TO DRAIN CURRENT (A)
-100
TJ = 25oC
TJ = 150oC
0
-5
-10
-15
0 8 16243240
VDS = -160V
VDS = -100V
VDS = -40V
ID = -4A
Qg(TOT), TOTAL GATE CHARGE (nC)
VGS, GATE TO SOURCE (V)
IRFF9230
4-119
Test Circuits and Waveforms
FIGURE 15. UNCLAMPED ENERGY TEST CIRCUIT FIGURE 16. UNCLAMPED ENERGY WAVEFORMS
FIGURE 17. SWITCHING TIME TEST CIRCUIT FIGURE 18. RESISTIVE SWITCHING WAVEFORMS
FIGURE 19. GATE CHARGE TEST CIRCUIT FIGURE 20. GATE CHARGE WAVEFORMS
tP
0.01
L
IAS
+
-
VDS
VDD
RG
DUT
VARY tP TO OBTAIN
REQUIRED PEAK IAS
0V
VGS
VDD
VDS
BVDSS
tP
IAS
tAV
0
VGS
RL
RG
DUT
+
-VDD
td(ON)
tr
90%
10%
VDS 90%
tf
td(OFF)
tOFF
90%
50%
50%
10%
PULSE WIDTH
VGS
tON
10%
0
0
0.3µF
12V
BATTERY 50k
+VDS
S
DUT
D
G
IG(REF)
0
(ISOLATED
-VDS
0.2µF
CURRENT
REGULATOR
ID CURRENT
SAMPLING
IG CURRENT
SAMPLING
SUPPLY)
RESISTOR RESISTOR
DUT
Qg(TOT)
Qgd
Qgs
VDS
0
VGS
VDD
0
IG(REF)
IRFF9230
4-120
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Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time with-
out notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
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IRFF9230