HDLS-2416 - Hewlett-Packard / Agilent

3-164

Four Character 5.0 mm

(0.2 inch) Smart

5 x 7 Alphanumeric Displays

Description

These are 5.0 mm (0.2 inch) four

character 5 x 7 dot matrix

displays driven by an on-board

CMOS IC. These displays are pin

for pin compatible with the

HPDL-2416. The IC stores and

decodes 7 bit ASCII data and

displays it using a 5 x 7 font.

Multiplexing circuitry, and

drivers are also part of the IC.

The IC has fast setup and hold

times which makes it easy to

interface to a microprocessor.

Features

• Enhanced Drop-in Replace-

ment to HPDL-2416

•Smart Alphanumeric

Display

Built-in RAM, ASCII Decoder,

and LED Drive Circuitry

•CMOS IC for Low Power

Consumption

•Software Controlled

Dimming Levels and Blank

•128 ASCII Character Set

•End-Stackable

•Categorized for Luminous

Intensity; Yellow and

Green Categorized for

Color

•Low Power and Sunlight

Viewable AlGaAs Versions

•Wide Operating

Temperature Range

-40°C to +85°C

•Excellent ESD Protection

•Wave Solderable

•Wide Viewing Angle

(50° typ)

Devices:

Standard Red AlGaAs Red High Efficiency Red Orange Yellow Green

HDLR-2416 HDLS-2416 HDLO-2416 HDLA-2416 HDLY-2416 HDLG-2416

HDLU-2416

Absolute Maximum Ratings

Supply Voltage, VDD to Ground[1] ......................................-0.5 V to 7.0 V

Input Voltage, Any Pin to Ground ......................... -0.5 V to VDD + 0.5 V

Free Air Operating Temperature Range, TA................ -40°C to +85°C

Storage Temperature, TS........................................ -40°C to 100°C

CMOS IC Junction Temperature, TJ (IC) .................................... +150°C

Relative Humidity (non-condensing) at 65°C ...................................85%

Maximum Solder Temperature, 1.59 mm

(0.063 in.) below Seating Plane, t < 5 sec................................. 260°C

ESD Protection, R = 1.5 kΩ, C = 100 pF ............. VZ = 2 kV (each pin)

Note:

1. Maximum Voltage is with no LEDs illuminated.

HDLX-2416 Series

ESD WARNING: STANDARD CMOS HANDLING PRECAUTIONS SHOULD BE OBSERVED WITH

THE HDLX-2416

Technical Data

5964-6380E

3-165

The address and data inputs can

be directly connected to the

microprocessor address and data

buses.

The HDLX-2416 has several

enhancements over the HPDL-

2416. These features include an

expanded character set, internal 8

level dimming control, external

dimming capability, and individ-

ual digit blanking. Finally, the

extended functions can be

disabled which allows the HDLX-

2416 to operate exactly like an

HPDL-2416 by disabling all of the

enhancements except the ex-

panded character set.

The difference between the

sunlight viewable HDLS-2416 and

the low power HDLU-2416 occurs

at power-on or at the default

brightness level. Following power

up, the HDLS-2416 operates at

the 100% brightness level, while

Pin Pin

No. Function No. Function

1CE

Chip Enable 10 GND

2CE

Chip Enable 11 D0 Data Input

3 CLR Clear 12 D1 Data Input

4 CUE Cursor Enable 13 D2 Data Input

5 CU Cursor Select 14 D3 Data Input

6 WR Write 15 D6 Data Input

Address Input 16 D5 Data Input

Address Input 17 D4 Data Input

DD 18 BL Display Blank

Notes:

1. Unless otherwise specified, the tolerance

on all dimensions is ±0.254 mm (±0.010")

2. All dimensions are in mm/inches.

3. For yellow and green displays only.

Package Dimensions

the HDLU-2416 operates at the

27% brightness level. Power on

sets the internal brightness

control (bits 3-5) in the control

the HDLS-2416 binary code (000)

corresponds to a 100% brightness

level, and for the HDLU-2416

binary code (000) corresponds to

a 27% brightness level. The other

seven brightness levels are

identical for both parts.

3-166

Character Set

NOTES: 1 = HIGH LEVEL

0 = LOW LEVEL

3-167

Recommended Operating Conditions

Parameter Symbol Min. Typ. Max. Unit

Supply Voltage VDD 4.5 5.0 5.5 V

Electrical Characteristics over Operating Temperature Range

4.5 < VDD < 5.5 V (unless otherwise specified)

All Devices

25°C[1]

Parameter Symbol Min. Typ. Max. Max. Units Test Conditions

IDD Blank IDD (blnk) 1.0 4.0 mA All Digits Blanked

Input Current II-40 10 µAV

IN = 0 V to VDD

VDD = 5.0 V

Input Voltage High VIH 2.0 VDD V

Input Voltage Low VIL GND 0.8 V

HDLO/HDLA/HDLY/HDLG-2416

25°C[1]

Parameter Symbol Min. Typ. Max. Max. Units Test Conditions

IDD 4 digits IDD(#) 110 130 160 mA "#" ON in all four

20 dots/character[2, 3] locations

IDD Cursor all IDD (CU) 92 110 135 mA Cursor ON in all

dots ON @ 50% four locations

Notes:

1. VDD = 5.0 V

2. Average IDD measured at full brightness. Peak IDD = 28/15 x Average IDD(#).

3. IDD(#) max. = 130 mA for HDLO/HDLA/HDLY/HDLG-2416, 146 mA for HDLR/HDLS-2416, and 42 mA for HDLU-2416 at default

brightness, 150°C IC junction temperature and VDD = 5.5 V.

HDLS/HDLU-2416

25°C[1]

Part Number Parameter Symbol Typ. Max. Max. Units Test Conditions

HDLS-2416 IDD 4 digits IDD(#) 125 146 180 mA Four "#" ON in

20 dots/character[2,3] all four locations

HDLU-2416 34 42 52

HDLS-2416 IDD Cursor all dots IDD(CU) 105 124 154 mA Four cursors ON

ON @ 50% in all four locations

HDLU-2416 29 36 45

HDLR-2416

25°C[1]

Parameter Symbol Min. Typ. Max. Max. Units Test Conditions

IDD 4 digits IDD (#) 125 146 180 mA "#" ON in all four

20 dots/character[2,3] locations

IDD Cursor IDD(CU) 105 124 154 mA Cursor ON in all

all dots ON @ 50% four locations

3-168

Optical Characteristics at 25°C[1]

VDD = 5.0 V at Full Brightness

HDLR-2416

Parameter Symbol Min. Typ. Units Test Conditions

Average Luminous IV0.5 1.1 mcd ''*'' illuminated in all four digits.

Intensity per digit, 19 dots ON

Character Average

Peak Wavelength λPEAK 655 nm

Dominant Wavelength[2] λd640 nm

HDLS/HDLU-2416

Part Number Parameter Symbol Min. Typ. Units Test Conditions

HDLS-2416 Average Luminous IV4.0 12.7 mcd ''*'' illuminated in all

Intensity per digit, four digits, 19 dots ON

HDLU-2416 Character Average 1.2 3.1 mcd per digit.

All Peak Wavelength λPEAK 645 nm

Dominant Wavelength[2] λd637 nm

HDLO-2416

Parameter Symbol Min. Typ. Units Test Conditions

Average Luminous IV1.2 3.5 mcd ''*'' illuminated in all four digits.

Intensity per digit, 19 dots ON

Character Average

Peak Wavelength λPEAK 635 nm

Dominant Wavelength[2] λd626 nm

HDLA-2416

Parameter Symbol Min. Typ. Units Test Conditions

Average Luminous IV1.2 3.5 mcd ''*'' illuminated in all four digits.

Intensity per digit, 19 dots ON

Character Average

Peak Wavelength λPEAK 600 nm

Dominant Wavelength[2] λd602 nm

HDLY-2416

Parameter Symbol Min. Typ. Units Test Conditions

Average Luminous IV1.2 3.7 mcd ''*'' illuminated in all four digits.

Intensity per digit, 19 dots ON

Character Average

Peak Wavelength λPEAK 583 nm

Dominant Wavelength[2] λd585 nm

3-169

HDLG-2416

Parameter Symbol Min. Typ. Units Test Conditions

Average Luminous IV1.2 5.6 mcd ''*'' illuminated in all four digits.

Intensity per digit, 19 dots ON

Character Average

Peak Wavelength λPEAK 568 nm

Dominant Wavelength[2] λd574 nm

Notes:

1. Refers to the initial case temperature of the device immediately prior to the light measurement.

2. Dominant wavelength, λd, is derived from the CIE chromaticity diagram, and represents the single wavelength which defines

the color of the device.

AC Timing Characteristics over Operating

Temperature Range at V

DD = 4.5 V

Parameter Symbol Min Units

Address Setup tAS 10 ns

Address Hold tAH 40 ns

Data Setup tDS 50 ns

Data Hold tDH 40 ns

Chip Enable Setup tCES 0ns

Chip Enable Hold tCEH 0ns

Write Time tW75 ns

Clear tCLR 10 µs

Clear Disable tCLRD 1µs

Timing Diagram Enlarged Character Font

Notes:

1. Unless otherwise specified the

tolerance on all dimensions is ±0.254

mm (0.010")

2. Dimensions are in mm (inches).

3-170

Display Internal Block

Diagram

Figure 1 shows the HDLX-2416

display internal block diagram.

The CMOS IC consists of a 4 x 7

Character RAM, a 2 x 4 Attribute

RAM, a 5 bit Control Register, a

128 character ASCII decoder and

the refresh circuitry necessary to

synchronize the decoding and

driving of four 5 x 7 dot matrix

displays.

Four 7 bit ASCII words are stored

in the Character RAM. The IC

reads the ASCII data and decodes

it via the 128 character ASCII

decoder. The ASCII decoder

includes the 64 character set of

the HPDL-2416, 32 lower case

ASCII symbols, and 32 foreign

language symbols.

A 5 bit word is stored in the

Control Register. Three fields

within the Control Register

provide an 8 level brightness

control, master blank, and ex-

tended functions disable.

For each display digit location,

two bits are stored in the Attribute

RAM. One bit is used to enable a

cursor character at each digit

location. A second bit is used to

individually disable the blanking

features at each digit location.

The display is blanked and

dimmed through an internal

blanking input on the row drivers.

Logic within the IC allows the user

to dim the display either through

the BL input or through the

brightness control in the control

be blanked through the BL input,

the Master Blank in the Control

Disable in the Attribute RAM.

Electrical Description

Pin Function Description

Chip Enable CE1 and CE2 must be a logic 0 to write to the

(CE1 and CE2, display.

pins 1 and 2)

Clear When CLR is a logic 0 the ASCII RAM is reset

(CLR, pin 3) to 20hex (space) and the Control Register/

Attribute RAM is reset to 00hex.

Cursor Enable CUE determines whether the IC displays the

(CUE pin 4) ASCII or the Cursor memory. (1 = Cursor,

0 = ASCII).

Cursor Select CU determines whether data is stored in the

(CU, pin 5) ASCII RAM or the Attribute RAM/Control

RAM/Control Register).

Write WR must be a logic 0 to store data in the

(WR, pin 6) display.

Address A0-A1 selects a specific location in the display

Inputs memory. Address 00 accesses the far right

(A1 and A0, display location. Address 11 accesses the far

pins 8 and 7) left location.

Data Inputs D0-D6 are used to specify the input data for the

(D0-D6, display.

pins 11-17)

VDD VDD is the positive power supply input.

(pin 9)

GND GND is the display ground.

(pin 10)

Blanking BL is used to flash the display, blank the

Input display or to dim the display.

(BL, pin 18)

3-171

Figure 1. Internal Block Diagram

3-172

CUE BL CLR CE1CE2WR CU A1A0D6D5D4D3D2D1D0Function

011 Display ASCII

111 Display Stored Cursor

XX XXXX X XXX X X X

XX0 Reset RAMs

Blank Display but do not reset

X01 RAMS and Control Register

Extended Intensity Master Digit Digit Write to Attribute RAM

0 0 0 Functions Control Blank Blank Cursor and Control Register

Disable Disable 0 0

0 = 000 = 100%* 0 = Digit Digit DBDn = 0, Allows Digit n to be

0 0 1 Enable 001 = 60% Display Blank Cursor blanked

D1-D5010 = 40% ON Disable 1 1

011 = 27% DBDn = 1 Prevents Digit n

X X 1 0 0 0 1 = 100 = 17% 1 = Digit Digit from being blanked.

0 1 0 Disable 101 = 10% Display Blank Cursor

D1-D5110 = 7% Blanked Disable 2 2 DCn = 0 Removes cursor from

111 = 3% Digit n

D0Digiit Digit

0 1 1 Always Blank Cursor DCn = 1 Stores cursor at

Enabled Disable 3 3 Digit n

1 0 0 Digit 0 ASCII Data (Right Most Character)

1 0 1 Digit 1 ASCII Data

XX1 000 Write to Character RAM

1 1 0 Digit 2 ASCII Data

1 1 1 Digit 3 ASCII Data (Left Most Character)

1X X

X X 1 X 1 X X X X X X X X X X X No Change

XX 1

Display Clear

Data stored in the Character

RAM, Control Register, and

Attribute RAM will be cleared if

the clear (CLR) is held low for a

minimum of 10 µs. Note that the

display will be cleared regardless

of the state of the chip enables

(CE1, CE2). After the display is

cleared, the ASCII code for a

space (20hex) is loaded into all

character RAM locations and

00hex is loaded into all Attribute

RAM/Control Register memory

locations.

Data Entry

Figure 2 shows a truth table for

the HDLX-2416 display. Setting

the chip enables (CE1, CE2) to

logic 0 and the cursor select (CU)

to logic 1 will enable ASCII data

loading. When cursor select (CU)

is set to logic 0, data will be

loaded into the Control Register

and Attribute RAM. Address

inputs A0-A1 are used to select the

digit location in the display. Data

inputs D0-D6 are used to load

information into the display. Data

will be latched into the display on

the rising edge of the WR signal.

D0-D6, A0-A1, CE1, CE2, and CU

must be held stable during the

write cycle to ensure that correct

data is stored into the display.

Data can be loaded into the

display in any order. Note that

when A0 and A1 are logic 0, data is

stored in the right most display

location.

Cursor

When cursor enable (CUE) is a

logic 1, a cursor will be displayed

in all digit locations where a logic

1 has been stored in the Digit

Cursor memory in the Attribute

RAM. The cursor consists of all

35 dots ON at half brightness. A

flashing cursor can be displayed

by pulsing CUE. When CUE is a

logic 0, the ASCII data stored in

the Character RAM will be dis-

played regardless of the Digit

Cursor bits.

Blanking

Blanking of the display is con-

trolled through the BL input, the

Control Register and Attribute

RAM. The user can achieve a

variety of functions by using these

controls in different combinations,

such as full hardware display

blank, software blank, blanking of

individual characters, and syn-

chronized flashing of individual

characters or entire display (by

Figure 2. Display Truth Table

0 = Logic 0; 1 = Logic 1; X = Do Not Care; * 000 = 27% for HDLU-2416

3-173

Table 1. Current Requirements at Different Brightness Levels

Symbol D5D4D3Brightness 25°C Typ. 25°C Max. Max. over Temp. Units

IDD(#) 0 0 0 100% 110 130 160 mA

0 0 1 60% 66 79 98 mA

0 1 0 40% 45 53 66 mA

0 1 1 27% 30 37 46 mA

1 0 0 17% 20 24 31 mA

1 0 1 10% 12 15 20 mA

1 1 0 7% 9 11 15 mA

11 1 3% 4 6 9 mA

EFD MB DBDnBL

0 0 0 0 Display Blanked by BL

0 0 X 1 Display ON

Display Blanked by BL. Individual characters

0X 1 0

"ON" based on "1" being stored in DBDn

0 1 0 X Display Blanked by MB

Display Blanked by MB. Individual characters

0111

"ON" based on "1" being stored in DBDn

1 X X 0 Display Blanked by BL

1 X X 1 Display ON

Figure 3. Display Blanking Truth Table

Bits 3-5 in the Control Register

provide internal brightness

control. These bits are interpreted

as a three bit binary code, with

code (000) corresponding to the

maximum brightness and code

(111) to the minimum brightness.

In addition to varying the display

brightness, bits 3-5 also vary the

average value of IDD. IDD can be

specified at any brightness level as

shown in Table 1.

strobing the blank input). All of

these blanking modes affect only

the output drivers, maintaining the

contents and write capability of

the internal RAMs and Control

RAMs and Control Register can

take place even with the display

blanked.

Figure 3 shows how the Extended

Function Disable (bit D6 of the

Control Register), Master Blank

(bit D2 of the Control Register),

Digit Blank Disable (bit D1 of the

Attribute RAM), and BL input can

be used to blank the display.

When the Extended Function

Disable is a logic 1, the display

can be blanked only with the BL

input. When the Extended

Function Disable is a logic 0, the

display can be blanked through

the BL input, the Master Blank,

and the Digit Blank Disable. The

entire display will be blanked if

either the BL input is logic 0 or

the Master Blank is logic 1,

providing all Digit Blank Disable

bits are logic 0. Those digits with

Digit Blank Disable bits a logic 1

will ignore both blank signals and

remain ON. The Digit Blank

Disable bits allow individual

characters to be blanked or

flashed in synchronization with the

BL input.

Dimming

Dimming of the display is con-

trolled through either the BL input

or the Control Register. A pulse

width modulated signal can be

applied to the BL input to dim the

display. A three bit word in the

Control Register generates an

internal pulse width modulated

signal to dim the display. The

internal dimming feature is

enabled only if the Extended

Function Disable is a logic 0.

3-174

Mechanical and Electrical

Considerations

The HDLX-2416 is an 18 pin DIP

package that can be stacked

horizontally and vertically to

create arrays of any size. The

HDLX-2416 is designed to operate

continuously from -40°C to + 85°C

for all possible input conditions.

The HDLX-2416 is assembled by

die attaching and wire bonding

140 LEDs and a CMOS IC to a

high temperature printed circuit

board. A polycarbonate lens is

placed over the PC board creating

an air gap environment for the

LED wire bonds. Backfill epoxy

environmentally seals the display

package. This package construc-

tion makes the display highly

tolerant to temperature cycling

and allows wave soldering.

The inputs to the CMOS IC are

protected against static discharge

and input current latchup. How-

ever, for best results standard

CMOS handling precautions

should be used. Prior to use, the

HDLX-2416 should be stored in

anti-static tubes or conductive

material. During assembly a

grounded conductive work area

should be used, and assembly

personnel should wear conductive

wrist straps. Lab coats made of

synthetic material should be

avoided since they are prone to

static charge build-up.

Input current latchup is caused

when the CMOS inputs are sub-

jected either to a voltage below

ground (Vin < ground) or to a

voltage higher than VDD (Vin >

VDD) and when a high current is

forced into the input. To prevent

input current latchup and ESD

damage, unused inputs should be

connected either to ground or to

VDD. Voltages should not be

applied to the inputs until VDD has

been applied to the display.

Transient input voltages should be

eliminated.

Soldering and Post

Solder Cleaning

Instructions for the

HDLX-2416

The HDLX-2416 may be hand

soldered or wave soldered with

SN63 solder. When hand soldering

it is recommended that an elec-

tronically temperature controlled

and securely grounded soldering

iron be used. For best results, the

iron tip temperature should be set

at 315°C (600°F). For wave

soldering, a rosin-based RMA flux

can be used. The solder wave

temperature should be set at

245°C ±5°C (473°F ±9°F), and

dwell in the wave should be set

between 1 1/2 to 3 seconds for

optimum soldering. The preheat

temperature should not exceed

110°C (230°F) as measured on the

solder side of the PC board.

For further information on solder-

ing and post solder cleaning, see

Application Note 1027, Soldering

LED Components.

Contrast Enhancement

The objective of contrast enhance-

ment is to provide good readabil-

ity in the end user’s ambient

lighting conditions. The concept is

to employ both luminance and

chrominance contrast techniques.

These enhance readability by

having the OFF-dots blend into the

display background and the ON-

dots vividly stand out against the

same background. For additional

information on contrast enhance-

ment, see Application Note 1015.

Figure 4 shows a circuit designed

to dim the display from 98% to 2%

by pulse width modulating the BL

input. A logarithmic or a linear

potentiometer may be used to

adjust the display intensity.

However, a logarithmic potenti-

ometer matches the response of

the human eye and therefore

provides better resolution at low

intensities. The circuit frequency

should be designed to operate at

10 kHz or higher. Lower frequen-

cies may cause the display to

flicker.

Extended Function

Disable

Extended Function Disable (bit D6

of the Control Register) disables

the extended blanking and dim-

ming functions in the HDLX-2416.

If the Extended Function Disable

is a logic 1, the internal brightness

control, Master Blank, and Digit

Blank Disable bits are ignored.

However the BL input and Cursor

control are still active. This allows

downward compatibility to the

HPDL-2416.

Figure 4. Intensity Modulation Control

Using an Astable Multivibrator

(reprinted with permission from

Electronics magazine, Sept. 19, 1974,

VNU Business pub. Inc.)