843001AGI-23 www.icst.com/products/hiperclocks.html REV. B JANUARY 6, 2006
1
Integrated
Circuit
Systems, Inc.
ICS843001I-23
FEMTOCLOCKS™ C RYSTAL-TO-3.3V LVPECL/LVCMOS
FREQUENCY SYNTHESIZER
PRELIMINARY
GENERAL DESCRIPTION
The ICS843001I-23 is a highly versatile, low
phase noise LVPECL/LVCMOS Synthesizer
which can generate low jitter reference clocks
for a variety of communication applications
and is a member of the HiPerClocksTM family
of high performance clock solutions from ICS.
The dual crystal interface allows the synthesizer to
support up to three communication standards in a given
application (i.e. SONET with a 19.44MHz crystal, 1Gb/10Gb
Ethernet and Fibre Channel using a 25MHz crystal). The
rms phase jitter performance is typically less than 1ps, thus
making the device acceptable for use in demanding
applications such as OC48 SONET, GbE/10Gb Ethernet
and SAN applications. The ICS843001I-23 is packaged in
a small 24-pin TSSOP package.
FEATURES
One 3.3V LVPECL output pair and
one LVCMOS/LVTTL REF_OUT output
Selectable crystal oscillator interfaces
or LVCMOS/LVTTL single-ended input
Crystal and CLK range: 17.5MHz - 29.54MHz
Able to generate GbE/10GbE/12GbE, Fibre Channel
(1Gb/4Gb/10Gb), PCI-E and SATA from a 25MHz crystal
VCO range: 1.12GHz - 1.3GHz
Supports the following applications:
SONET, Ethernet, Fibre Channel, Serial ATA, and HDTV
RMS phase jitter @ 622.08MHz (12kHz - 20MHz):
<1ps (typical) design target
Supply modes:
VCC/VCCO
3.3V/3.3V
3.3V/2.5V
2.5V/2.5V
-40°C to 85°C ambient operating temperature
Available in both standard and lead-free RoHS-compliant
packages
HiPerClockS
ICS
PIN ASSIGNMENT
11
10
01
00
00
01
10
11
Phase
Detector VCO
000 ÷44
001 ÷45
010 ÷48
011 ÷50
100 ÷51
111 ÷64 (default)
N
000 ÷2
001 ÷4
010 ÷5
011 ÷6
100 ÷8 (default)
101 ÷10
110 ÷12
111 ÷16
M
3
3
OSC
OSC
ICS843001I-23
24-Lead TSSOP
4.40mm x 7.8mm x 0.92mm
package body
G Package
Top View
VCCO_LVCMOS
N0
N1
N2
VCCO_LVPECL
Q
nQ
VEE
VCCA
VCC
XTAL_OUT1
XTAL_IN1
1
2
3
4
5
6
7
8
9
10
11
12
REF_OUT
VEE
OE_REF
M2
M1
M0
MR
SEL1
SEL0
CLK
XTAL_IN0
XTAL_OUT0
24
23
22
21
20
19
18
17
16
15
14
13
BLOCK DIAGRAM
N2:N0
SEL0
SEL1
XTAL_IN0
XTAL_OUT0
XTAL_IN1
XTAL_OUT1
CLK
MR
M2:M0
OE_REF
Q
nQ
Pulldown
Pulldown
Pulldown
Pulldown
REF_OUT
Pulldown
Pullup
The Preliminary Information presented herein represents a product in prototyping or pre-production. The noted characteristics are based on
initial product characterization. Integrated Circuit Systems, Incorporated (ICS) reserves the right to change any circuitry or specifications
without notice.
843001AGI-23 www.icst.com/products/hiperclocks.html REV. B JANUARY 6, 2006
2
Integrated
Circuit
Systems, Inc.
ICS843001I-23
FEMTOCLOCKS™ C RYSTAL-TO-3.3V LVPECL/LVCMOS
FREQUENCY SYNTHESIZER
PRELIMINARY
TABLE 1. PIN DESCRIPTIONS
TABLE 2. PIN CHARACTERISTICS
rebmuNemaNepyTnoitpircseD
1V
SOMC_OCC
rewoP .tuptuoTUO_FERLTTVL/SOMCVLrofnipylppustuptuO
3,21N,0NtupnInwodlluP .C3elbaTeeS.sniptcelesredividtuptu
O
.slevelecafretniLTTVL/SOMCVL
42NtupnIpulluP
5V
LCEPVL_OCC
rewoP.tuptuoLCEPVLrofnipylppustuptuO
7,6Qn,QtupuO.slevelecafretniLCEPVL.riaptuptuolaitnereffiD
32,8V
EE
rewoP.nipylppusevitageN
9V
ACC
rewoP.nipylppusgolanA
01V
CC
rewoP.nipylppuseroC
11
21
,1TUO_LATX
1NI_LATX tupnI ,tuptuoehtsi1TUO_LATX.ecafretnilatsyrctnanoserlellaraP
.t
upniehtsi1NI_LATX
31
41
,0TUO_LATX
0NI_LATX tupnI ,tuptuoehtsi0TUO_LATX.ecafretnilatsyrctnanoserlellaraP
.tu
pniehtsi0NI_LATX
51KLCtupnInwodlluP.tupnikcolcLTTVL/SOMCVL
71,611LES,0LEStupnInwodlluP.slevelecafretniLTTVL/SOM
CVL.sniptcelesXUMtupnI
81RMtupnInwodlluP
erasredividlanretnieht,HGIHcigolnehW.teseRretsaMHGIHevitcA
otQntup
tuodetrevniehtdnawologotQtuptuoeurtehtgnisuacteser
erastuptuoehtdnasredividlanretnieht,WOLcigolnehW.hg
ihog
.slevelecafretniLTTVL/SOMCVL.delbane
12,02,912M,1M,0MtupnIpulluP .B3elbaTeeS.sniptcelesredividkcabdeeF
.slevelecafretniLTTVL/SOMCVL
22FER_EOtupnInwodlluP .E3elbaTeeS.woLtluafeD.elbanetuptuokcolcecnerefeR
.sleve
lecafretniLTTVL/SOMCVL
42TUO_FERtuptuO .slevelecafretniLTTVL/SOMCVL.tuptuokcolcecnerefeR
:ETON nwodlluPdnap
ulluP .seulavlacipytrof,scitsiretcarahCniP,2elbaTeeS.srotsisertupnilanretniotrefer
lobmySretemaraPsnoitidnoCtseTmuminiMlacipyTmumixaMstinU
C
NI
ecnaticapaCtupnI 4Fp
R
NWODLLUP
rotsiseRnwodlluPtupnI 15kΩ
R
PULLUP
rotsiseRpulluPtupnI 15kΩ
R
tuo
ecnadepmItuptuOTUO_FER5721Ω
843001AGI-23 www.icst.com/products/hiperclocks.html REV. B JANUARY 6, 2006
3
Integrated
Circuit
Systems, Inc.
ICS843001I-23
FEMTOCLOCKS™ C RYSTAL-TO-3.3V LVPECL/LVCMOS
FREQUENCY SYNTHESIZER
PRELIMINARY
TABLE 3A. COMMON CONFIGURATIONS TABLE
tupnI kcabdeeF
rediviD )zHM(OCVeulaVrediviDN ycneuqerFtuptuO
)zHM( noitacilppA
)zHM(tupnILATX
724488116152.47VTDH
57.428488116152.47VTDH
44.914661.44218 25.551TENOS
44.914661.44212 80.226TENOS
44.914661.44214 40.113TENOS
5205052101521EgiG
520505218 52.651EgiG01
520505215 052EgiG
520505214 5.213IIMGX
520505212 526EgiG01
525452116 5.781EgiG21
5284002121001sserpxEICP
528400218 051ATAS
528400216157ATAS
521557212152.601lennahCerbiF
521557218 573.951lennahCerbiFgiG01
521557216 5.212lennahCerbiFgiG4
TABLE 3B. PROGRAMMABLE M OUTPUT DIVIDER
FUNCTION TABLE
TABLE 3C. PROGRAMMABLE N OUTPUT DIVIDER
FUNCTION TABLE
stupnI tupnIecnerefeRedoMLLP
1LES0LES
00 0LATXevitcA
01 1LATXevitcA
10 KLCevitcA
11 KLCssapyB
TABLE 3D. BYPASS MODE FUNCTION TABLE
stupnI eulaVediviDN
2N1N0N
000 2
00 1 4
010 5
011 6
10 0 8
)tluafed(
10 1 01
110 21
111 61
TABLE 3E. OE_REF OUTPUT FUNCTION TABLE
stupnI rediviDM
eulaV
ycneuqerFtupnI
2M1M0MmuminiMmumixaM
000 445.5245.92
00 1 549.4288.82
010 843.3280.72
011 054.220.62
10 0 150.2294.52
11146
)tluafed(
5.7113.02
stupnItuptuO
FER_EOTUO_FER
0Z-iH
1evitcA
843001AGI-23 www.icst.com/products/hiperclocks.html REV. B JANUARY 6, 2006
4
Integrated
Circuit
Systems, Inc.
ICS843001I-23
FEMTOCLOCKS™ C RYSTAL-TO-3.3V LVPECL/LVCMOS
FREQUENCY SYNTHESIZER
PRELIMINARY
TABLE 4A. POWER SUPPLY DC CHARACTERISTICS, VCC = VCCA = VCCO_LVPECL, VCCO_LVCMOS = 3.3V±5%, TA = -40°C TO 85°C
ABSOLUTE MAXIMUM RATINGS
Supply Voltage, V
CC 4.6V
Inputs, VI-0.5V to VCC + 0.5V
Outputs, IO (LVPECL)
Continuous Current 50mA
Surge Current 100mA
Outputs, VO (LVCMOS) -0.5V to VCCO + 0.5V
Package Thermal Impedance, θJA 70°C/W (0 mps)
Storage Temperature, T
STG -65°C to 150°C
NOTE: Stresses beyond those listed under Absolute
Maximum Ratings may cause permanent damage to the
device. These ratings are stress specifications only. Functional
operation of product at these conditions or any conditions be-
yond those listed in the DC Characteristics or AC Character-
istics is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect product reliability.
TABLE 4B. POWER SUPPLY DC CHARACTERISTICS, VCC = VCCA = 3.3V±5%, VCCO_LVPECL, VCCO_LVCMOS = 2.5V±5%,
TA = -40°C TO 85°C
lobmySretemaraPsnoitidnoCtseTmuminiMlacipyTmumixaMstinU
V
CC
egatloVylppuSeroC531.33.3564.3V
V
ACC
egatloVylppuSgolanA531.33.3564.3V
V
LCEPVL_OCC
egatloVylppuStuptuO531.33.3564.3V
V
SOMCVL_OCC
egatloVylppuStuptuO531.33.3564.3V
I
EE
tnerruCylppuSrewoP 0=FER_EODBTAm
zHM45.92=TUO_FER,1=FER_EODBTAm
I
ACC
tnerruCylppuSgolanA 5Am
I
LCEPVL_OCC
tnerruCylppuStuptuO0=FER_EODBTAm
I
SOMCVL_OCC
tnerruCylppuStuptuOzHM45.92=TUO_FER,1=FER_EODBTAm
lobmySretemaraPsnoitidnoCtseTmuminiMlacipyTmumixaMstinU
V
CC
egatloVylppuSeroC531.33.3564.3V
V
ACC
egatloVylppuSgolanA531.33.3564.3V
V
LCEPVL_OCC
egatloVylppuStuptuO526.25.2526.2V
V
SOMCVL_OCC
egatloVylppuStuptuO526.25.2526.2V
I
EE
tnerruCylppuSrewoP 0=FER_EODBTAm
zHM45.92=TUO_FER,1=FER_EODBTAm
I
ACC
tnerruCylppuSgolanA DBTAm
I
LCEPVL_OCC
tnerruCylppuStuptuO0=FER_EODBTAm
I
SOMCVL_OCC
tnerruCylppuStuptuOzHM45.92=TUO_FER,1=FER_EODBTAm
843001AGI-23 www.icst.com/products/hiperclocks.html REV. B JANUARY 6, 2006
5
Integrated
Circuit
Systems, Inc.
ICS843001I-23
FEMTOCLOCKS™ C RYSTAL-TO-3.3V LVPECL/LVCMOS
FREQUENCY SYNTHESIZER
PRELIMINARY
TABLE 4E. LVPECL DC CHARACTERISTICS, VCC = VCCA = VCCO_LVPECL = 3.3V±5% OR 2.5V±5%, OR
VCC = VCCA = 3.3V±5%, VCCO_LVPECL = 2.5V±5%, TA = -40°C TO 85°C
TABLE 4D. LVCMOS / LVTTL DC CHARACTERISTICS, VCC = VCCA = VCCO_LVCMOS = 3.3V±5% OR 2.5V±5%, OR
VCC = VCCA = 3.3V±5%, VCCO_LVCMOS = 2.5V±5%, TA = -40°C TO 85°C
TABLE 4C. POWER SUPPLY DC CHARACTERISTICS, VCC = VCCA = VCCO_LVPECL, VCCO_LVCMOS = 2.5V±5%, TA = -40°C TO 85°C
lobmySretemaraPsnoitidnoCtseTmuminiMlacipyTmumixaMstinU
V
CC
egatloVylppuSeroC526.25.2526.2V
V
ACC
egatloVylppuSgolanA526.25.2526.2V
V
LCEPVL_OCC
egatloVylppuStuptuO526.25.2526.2V
V
SOMCVL_OCC
egatloVylppuStuptuO526.25.2526.2V
I
EE
tnerruCylppuSrewoP 0=FER_EODBTAm
zHM45.92=TUO_FER,1=FER_EODBTAm
I
ACC
tnerruCylppuSgolanA 5Am
I
LCEPVL_OCC
tnerruCylppuStuptuO0=FER_EODBTAm
I
SOMCVL_OCC
tnerruCylppuStuptuOzHM45.92=TUO_FER,1=FER_EODBTAm
lobmySretemaraPsnoitidnoCtseTmuminiMlacipyTmumixaMstinU
V
HI
egatloVhgiHtupnI V
CC
V3.3=2V
CC
3.0+V
V
CC
V5.2=7.1V
CC
3.0+V
V
LI
egatloVwoLtupnI V
CC
V3.3=3.0-8.0V
V
CC
V5.2=3.0-7.0V
I
HI
tupnI
tnerruChgiH
,1LES,0LES,KLC
1N,0N,RM,FER_EO
V
CC
V=
NI
V564.3=
V526.2ro 051Aµ
2M:0M,2N V
CC
V=
NI
V564.3=
V526.2ro 5Aµ
I
LI
tupnI
tnerruCwoL
,1LES,0LES,KLC
1N,0N,RM,FER_EO
V
CC
,V526.2roV564.3=
V
NI
V0= 5-Aµ
2M:0M,2N V
CC
,V526.2roV564.3=
V
NI
V0= 051-Aµ
V
HO
hgiHtuptuO
1ETON;egatloV TUO_FER V
SOMCVL_OCC
V564.3=6.2V
V
SOMCVL_OCC
V526.2=8.1V
V
LO
woLtuptuO
1ETON;egatloV TUO_FER V
SOMCVL_OCC
V564.3=
V526.2ro 5.0V
Δ/V ΔTetaRegdEtupnIKLC%08-%02DBTsn/V
05htiwdetanimrettuptuO:1ETON ΩVot
SOMCVL_OCC
,noitceSnoitamrofnItnemerusaeMretemaraPeeS.2/
.smargaid"margaiDtiucriCtseTdaoLtuptuO"
lobmySretemaraPsnoitidnoCtseTmuminiMlacipyTmumixaMstinU
V
HO
1ETON;egatloVhgiHtuptuOV
LCEPVL_OCC
4.1-V
LCEPVL_OCC
9.0-V
V
LO
1ETON;egatloVwoLtuptuOV
LCEPVL_OCC
0.2-V
LCEPVL_OCC
7.1-V
V
GNIWS
gniwSegatloVtuptuOkaeP-ot-kaeP6.00.1V
05htiwdetanimretstuptuO:1ETON ΩVot
LCEPVL_OCC
.V2-
843001AGI-23 www.icst.com/products/hiperclocks.html REV. B JANUARY 6, 2006
6
Integrated
Circuit
Systems, Inc.
ICS843001I-23
FEMTOCLOCKS™ C RYSTAL-TO-3.3V LVPECL/LVCMOS
FREQUENCY SYNTHESIZER
PRELIMINARY
TABLE 6A. AC CHARACTERISTICS, VCC = VCCA = VCCO_LVPECL, VCCO_LVCMOS = 3.3V±5%, TA = -40°C TO 85°C
TABLE 5. CRYSTAL CHARACTERISTICS
retemaraPsnoitidnoCtseTmuminiMlacipyTmumixaMstinU
noitallicsOfoedoM latnemadnuFzHM
ycneuqerF 5.7145.92zHM
)RSE(ecn
atsiseRseireStnelaviuqE 05 Ω
ecnaticapaCtnuhS 7Fp
leveLevirD 1Wm
.latsyrctnanoserlellarapFp81nagnisudeziretcar
ahC:ETON
TABLE 6B. AC CHARACTERISTICS, VCC = VCCA = 3.3V±5%, VCCO_LVPECL, VCCO_LVCMOS = 2.5V±5%,
TA = -40°C TO 85°C
lobmySretemaraPsnoitidnoCtseTmuminiMlacipyTmumixaMstinU
f
TUO
ycneuqerFtuptuO 65056zHM
t
DP
noitagaporP
1ETON,yaleD
otKLC
TUO_FER DBTsn
t)Ø(tij ;)modnaR(,rettiJesahPSMR
3,2ETON )zHM02-zHk21(zHM80.226DBTsp
f
OCV
egnaRkcoLOCVLLP 21.13.1zHG
Lt
LES_
emiTtceleS DBTsm
Lt
M_
emiTkcoLLLP DBTsm
t
R
t/
F
tuptuO
emiTllaF/esiR
Qn/Q%08ot%02005sp
TUO_FER%08ot%02005sp
cdoelcyCytuDtuptuO Qn/Q05%
TUO_FER05%
VehtmorfderusaeM:1ETO
N
CC
Vottupniehtfo2/
SOMCVL_OCC
.tuptuoehtfo2/
.latsyrcztrauqzHM44.91agnisuderusaemrettijesahP:2ETON
.56dradnatSCEDEJhtiwecnadroccanide
nifedsiretemarapsihT:3ETON
lobmySretemaraPsnoitidnoCtseTmuminiMlacipyTmumixaMstinU
f
TUO
ycneuqerFtuptuO 65056zHM
t
DP
noitagaporP
1ETON,yaleD
otKLC
TUO_FER DBTsn
t)Ø(tij ;)modnaR(,rettiJesahPSMR
3,2ETON )zHM02-zHk21(zHM80.226DBTsp
f
OCV
egnaRkcoLOCVLLP 21.13.1zHG
Lt
LES_
emiTtceleS DBTsm
Lt
M_
emiTkcoLLLP DBTsm
t
R
t/
F
tuptuO
emiTllaF/esiR
Qn/Q%08ot%02005sp
TUO_FER%08ot%02005sp
cdoelcyCytuDtuptuO Qn/Q05%
TUO_FER05%
VehtmorfderusaeM:1ETO
N
CC
Vottupniehtfo2/
SOMCVL_OCC
.tuptuoehtfo2/
.latsyrcztrauqzHM44.91agnisuderusaemrettijesahP:2ETON
.56dradnatSCEDEJhtiwecnadroccanide
nifedsiretemarapsihT:3ETON
843001AGI-23 www.icst.com/products/hiperclocks.html REV. B JANUARY 6, 2006
7
Integrated
Circuit
Systems, Inc.
ICS843001I-23
FEMTOCLOCKS™ C RYSTAL-TO-3.3V LVPECL/LVCMOS
FREQUENCY SYNTHESIZER
PRELIMINARY
TABLE 6C. AC CHARACTERISTICS, VCC = VCCA = VCCO_LVPECL, VCCO_LVCMOS = 2.5V±5%, TA = -40°C TO 85°C
lobmySretemaraPsnoitidnoCtseTmuminiMlacipyTmumixaMstinU
f
TUO
ycneuqerFtuptuO 65056zHM
t
DP
noitagaporP
1ETON,yaleD
otKLC
TUO_FER DBTsn
t)Ø(tij ;)modnaR(,rettiJesahPSMR
3,2ETON )zHM02-zHk21(zHM80.226DBTsp
f
OCV
egnaRkcoLOCVLLP 21.13.1zHG
Lt
LES_
emiTtceleS DBTsm
Lt
M_
emiTkcoLLLP DBTsm
t
R
t/
F
tuptuO
emiTllaF/esiR
Qn/Q%08ot%02005sp
TUO_FER%08ot%02005sp
cdoelcyCytuDtuptuO Qn/Q05%
TUO_FER05%
VehtmorfderusaeM:1ETO
N
CC
Vottupniehtfo2/
SOMCVL_OCC
.tuptuoehtfo2/
.latsyrcztrauqzHM44.91agnisuderusaemrettijesahP:2ETON
.56dradnatSCEDEJhtiwecnadroccanide
nifedsiretemarapsihT:3ETON
843001AGI-23 www.icst.com/products/hiperclocks.html REV. B JANUARY 6, 2006
8
Integrated
Circuit
Systems, Inc.
ICS843001I-23
FEMTOCLOCKS™ C RYSTAL-TO-3.3V LVPECL/LVCMOS
FREQUENCY SYNTHESIZER
PRELIMINARY
PARAMETER MEASUREMENT INFORMATION
3.3V CORE/2.5V LVPECL OUTPUT LOAD AC TEST CIRCUIT
2.5V LVPECL OUTPUT LOAD AC TEST CIRCUIT
3.3V LVPECL OUTPUT LOAD AC TEST CIRCUIT
SCOPE
Qx
nQx
LVPECL
2V
-1.3V±0.165V
2.5V LVCMOS OUTPUT LOAD AC TEST CIRCUIT
VCC,
VCCA,
VCCO_LVPECL
VEE
3.3V CORE/2.5V LVCMOS OUTPUT LOAD AC TEST CIRCUIT
3.3V LVCMOS OUTPUT LOAD AC TEST CIRCUIT
SCOPE
Qx
LVCMOS
1.65±5%
-1.65V±5%
VCC,
VCCA,
VCCO_LVCMOS
VEE
SCOPE
Qx
nQx
LVPECL
2.8V±0.04V
-0.5V±0.125V
VCC,
VCCA
VEE
SCOPE
Qx
LVCMOS
V
DDO
2
1.25±5%
-1.25V±5%
VCC,
VCCA
VEE
SCOPE
Qx
nQx
LVPECL
2V
-0.5V±0.125V
VCC,
VCCA,
VCCO_LVPECL
VEE
SCOPE
Qx
LVCMOS
1.25±5%
-1.25V±5%
VCC,
VCCA,
VCCO_LVCMOS
VEE
VCCO_LVPECL VCCO_LVCMOS
2V
2.05±5%
843001AGI-23 www.icst.com/products/hiperclocks.html REV. B JANUARY 6, 2006
9
Integrated
Circuit
Systems, Inc.
ICS843001I-23
FEMTOCLOCKS™ C RYSTAL-TO-3.3V LVPECL/LVCMOS
FREQUENCY SYNTHESIZER
PRELIMINARY
t
PD
V
CC
2
V
CCO_LVCMOS
2
REF_OUT
t
PW
tPERIOD
t
PW
t
PERIOD
odc = x 100%
Q
CLK
RMS PHASE JITTER
PROPAGATION DELAY
Clock
Outputs 20%
80% 80%
20%
t
R
t
F
V
SWING
nQ
OUTPUT RISE/FALL TIME
Phase Noise Mas
k
Offset Frequency
f
1
f
2
Phase Noise Plot
RMS Jitter = Area Under the Masked Phase Noise Plot
Noise Power
LVPECL OUTPUT DUTY CYCLE/PULSE WIDTH/PERIOD
tPERIOD
tPW
tPERIOD
odc = x 100%
V
CCO_LVCMOS
2
tPW
REF_OUT
LVCMOS OUTPUT DUTY CYCLE/PULSE WIDTH/PERIOD
843001AGI-23 www.icst.com/products/hiperclocks.html REV. B JANUARY 6, 2006
10
Integrated
Circuit
Systems, Inc.
ICS843001I-23
FEMTOCLOCKS™ C RYSTAL-TO-3.3V LVPECL/LVCMOS
FREQUENCY SYNTHESIZER
PRELIMINARY
APPLICATION INFORMATION
As in any high speed analog circuitry, the power supply pins
are vulnerable to random noise. The ICS843001I-23 provides
separate power supplies to isolate any high switching
noise from the outputs to the internal PLL. VCC, VCCA, and VCCO_x
should be individually connected to the power supply
plane through vias, and bypass capacitors should be
used for each pin. To achieve optimum jitter performance,
power supply isolation is required. Figure 1 illustrates how
a 10Ω resistor along with a 10µF and a .01μF bypass
capacitor should be connected to each VCCA.
POWER SUPPLY FILTERING T ECHNIQUES
FIGURE 1. POWER SUPPLY FILTERING
10Ω
VCCA
10μF
.01μF
3.3V or 2.5V
.01μF
VCC
INPUTS:
CRYSTAL INPUT:
For applications not requiring the use of the crystal oscillator
input, both XTAL_IN and XTAL_OUT can be left floating.
Though not required, but for additional protection, a 1kΩ
resistor can be tied from XTAL_IN to ground.
CLK INPUT:
For applications not requiring the use of the test clock, it can
be left floating. Though not required, but for additional
protection, a 1kΩ resistor can be tied from the CLK input to
ground.
CONTROL PINS:
All control pins have internal pull-ups or pull-downs; additional
resistance is not required but can be added for additional
protection. A 1kΩ resistor can be used.
RECOMMENDATIONS FOR UNUSED INPUT AND OUTPUT PINS
OUTPUTS:
LVCMOS OUTPUT:
All unused LVCMOS output can be left floating. We
recommend that there is no trace attached.
LVPECL OUTPUT
All unused LVPECL outputs can be left floating. We
recommend that there is no trace attached. Both sides of the
differential output pair should either be left floating or
terminated.
843001AGI-23 www.icst.com/products/hiperclocks.html REV. B JANUARY 6, 2006
11
Integrated
Circuit
Systems, Inc.
ICS843001I-23
FEMTOCLOCKS™ C RYSTAL-TO-3.3V LVPECL/LVCMOS
FREQUENCY SYNTHESIZER
PRELIMINARY
TERMINATION FOR 3.3V LVPECL OUTPUT
V
CC
- 2V
50Ω50Ω
RTT
Z
o
= 50Ω
Z
o
= 50Ω
FOUT FIN
RTT = Z
o
1
((V
OH
+ V
OL
) / (V
CC
– 2)) – 2
3.3V
125Ω125Ω
84Ω84Ω
Zo = 50Ω
Zo = 50Ω
FOUT FIN
The clock layout topology shown below is a typical ter-
mination for LVPECL outputs. The two different layouts
mentioned are recommended only as guidelines.
FOUT and nFOUT are low impedance follower outputs
that generate ECL/LVPECL compatible outputs. There-
fore, terminating resistors (DC current path to ground)
or current sources must be used for functionality. These
FIGURE 3B. LVPECL OUTPUT T ERMINATIONFIGURE 3A. LVPECL OUTPUT T ERMINATION
outputs are designed to drive 50Ω transmission lines.
Matched impedance techniques should be used to maxi-
mize operating frequency and minimize signal distor-
tion. Figures 3A and 3B show two different layouts which
are recommended only as guidelines. Other suitable
clock layouts may exist and it would be recommended
that the board designers simulate to guarantee compat-
ibility across all printed circuit and clock component pro-
cess variations.
CRYSTAL INPUT INTERFACE
The ICS843001I-23 has been characterized with 18pF
parallel resonant crystals. The capacitor values shown in
Figure 2. CRYSTAL INPUt INTERFACE
Figure 2 below were determined using an 18pF parallel
resonant crystal and were chosen to minimize the ppm error.
ICS84332
XTA L_ I N
XTA L_OU T
X1
18pF Parallel Cry stal
C2
22p
C1
22p
ICS843001I-23
843001AGI-23 www.icst.com/products/hiperclocks.html REV. B JANUARY 6, 2006
12
Integrated
Circuit
Systems, Inc.
ICS843001I-23
FEMTOCLOCKS™ C RYSTAL-TO-3.3V LVPECL/LVCMOS
FREQUENCY SYNTHESIZER
PRELIMINARY
TERMINATION FOR 2.5V LVPECL OUTPUT
Figure 4A and Figure 4B show examples of termination for
2.5V LVPECL driver. These terminations are equivalent to ter-
minating 50Ω to VCC - 2V. For VCC = 2.5V, the VCC - 2V is very
close to ground level. The R3 in Figure 4B can be eliminated
and the termination is shown in Figure 4C.
FIGURE 4C. 2.5V LVPECL TERMINATION EXAMPLE
FIGURE 4B. 2.5V LVPECL DRIVER T ERMINATION EXAMPLE
FIGURE 4A. 2.5V LVPECL DRIVER T ERMINATION EXAMPLE
R2
62.5
Zo = 50 Ohm
R1
250
+
-
2.5V
2,5V LVPECL
Driv er
R4
62.5
R3
250
Zo = 50 Ohm
2.5V
VCC=2.5V
R1
50
R3
18
Zo = 50 Ohm
Zo = 50 Ohm
+
-
2,5V LVPECL
Driver
VCC=2.5V
2.5V
R2
50
2,5V LVPECL
Driv er
VCC=2.5V
R1
50
R2
50
2.5V
Zo = 50 Ohm
Zo = 50 Ohm
+
-
843001AGI-23 www.icst.com/products/hiperclocks.html REV. B JANUARY 6, 2006
13
Integrated
Circuit
Systems, Inc.
ICS843001I-23
FEMTOCLOCKS™ C RYSTAL-TO-3.3V LVPECL/LVCMOS
FREQUENCY SYNTHESIZER
PRELIMINARY
RELIABILITY INFORMATION
TRANSISTOR COUNT
The transistor count for ICS843001I-23 is: 4165
TABLE 7. θJAVS. AIR FLOW TABLE FOR 24 LEAD TSSOP
θθ
θθ
θJA by Velocity (Meters per Second)
0 1 2.5
Multi-Layer PCB, JEDEC Standard Test Boards 70°C/W 65°C/W 62°C/W
843001AGI-23 www.icst.com/products/hiperclocks.html REV. B JANUARY 6, 2006
14
Integrated
Circuit
Systems, Inc.
ICS843001I-23
FEMTOCLOCKS™ C RYSTAL-TO-3.3V LVPECL/LVCMOS
FREQUENCY SYNTHESIZER
PRELIMINARY
PACKAGE OUTLINE - G SUFFIX FOR 24 LEAD TSSOP
TABLE 8. PACKAGE DIMENSIONS
Reference Document: JEDEC Publication 95, MO-153
LOBMYS sretemilliM
muminiMmumixaM
N42
A--02.1
1A50.051.0
2A08.050.1
b91.003.0
c90.002.0
D07.709.7
ECISAB04.6
1E03.405.4
eCISAB56.0
L5
4.057.0
α°8
aaa--01.0
843001AGI-23 www.icst.com/products/hiperclocks.html REV. B JANUARY 6, 2006
15
Integrated
Circuit
Systems, Inc.
ICS843001I-23
FEMTOCLOCKS™ C RYSTAL-TO-3.3V LVPECL/LVCMOS
FREQUENCY SYNTHESIZER
PRELIMINARY
TABLE 9. ORDERING INFORMATION
While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems, Incorporated (ICS) assumes no responsibility for either its use
or for infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use
in normal commercial and industrial applications. Any other applications such as those requiring high reliability or other extraordinary environmental requirements are not
recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant any ICS product
for use in life support devices or critical medical instruments.
The aforementioned trademarks, HiPerClockS and FemtoClocks are trademarks of Integrated Circuit Systems, Inc. or its subsidiaries in the United States and/or other countries.
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