ANALOG DEVICES LC?M0S Quad SPST Switches ~~ ADG211A/ADG212A FEATURES 44V Supply Maximum Rating +15V Analog Signal Range Low Ron (1150 max) Low Leakage (0.5nA typ} Break Before Make Switching Single Supply Operation Possible Extended Plastic Temperature Range (40C to + 85C) TTL/CMOS Compatible Available in 16-Lead DIP/SOIC and 20-Lead PLCC Packages Superior Second Source: ADG211A Replaces DG211 ADG212A Replaces DG212 GENERAL DESCRIPTION The ADG211A and ADG212A are monolithic CMOS devices comprising four independently selectable switches. They are designed on an enhanced L.C?MOS process which gives an in- creased signal handling capability of +15V. These switches also feature high switching speeds and low Ron. The ADG211A and ADG212A consist of four SPST switches. They differ only in that the digital control logic is inverted. In multiplexer applications, all switches exhibit break-before-make switching action when driven simultaneously. Inherent in the design is low charge injection for minimum transients when switching the digital inputs. _REV. B : Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. ADG211A ADG212A $1 IN1 IN1 D1 $2 IN2 IN2 D2 $3 IN3 IN3 D3 $4 Ina IN4 D4 SWITCHES SHOWN FOR A LOGIC 1 INPUT PRODUCT HIGHLIGHTS 1. Extended Signal Range: These switches are fabricated on an enhanced LC7MOS process, resulting in high breakdown and an increased analog signal range of + 15V. . Single Supply Operation: For applications where the analog signal is unipolar (0V to 15V), the switches can be operated from a single + 15V supply. . Low Leakage: Leakage currents in the range of 500pA make these switches suitable for high precision circuits. The added feature of Break before Make allows for multiple outputs to be tied together for multiplexer applications while keeping leakage errors to a minimum. ADG211A ADG212A SWITCH IN IN CONDITION 0 1 ON 1 0 OFF Table. Truth Table One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 617/329-4700 Fax: 617/326-8703ADG211A/ADG212ASPECIFICATION (Vpp = +15V, Vs = 15V, V, = 5V, unless otherwise noted.) ADG211AKN 7 : ADG212AKN Parameter 25C 40C to + 85C | Units Test Conditions ANALOG SWITCH Analog Signal Range +15 +15 Volts Ron 115 175 Omax 10V<Vs< + 10V, Ips=1mA, Test Circuit 1 Ronvs. Vp (Vs) 20 % typ Ron Drift 0.5 %/C typ Ron Match 5 % typ Vs=0V, Ips = ImA Is (OFF) 0.5 nA typ Vp= + 14V; Vs= +14V; Test Circuit 2 OFF Input Leakage 5 100 nA max Ip (OFF) 0.5 nA typ Vp = + 14V3 Vg = +14V; Test Circuit 2 OFF Output Leakage 5 100 nA max Ip (ON) 0.5 nA typ Vp=Vs= + 14V; Test Circuit 3 ON Channel Leakage 5 200 nA max DIGITALCONTROL Vinu, Input High Voltage 2.4 Vmin TTL Compatibility is Independent of Vi Vint Input Low Voltage 0.8 V max Ty ot Tins 1 pA max Cyn, Digital Input Capacitance 5 pF typ DYNAMIC CHARACTERISTICS topen? 30 ns typ Test Circuit 4 ton! 600 ns max Test Circuit 5 torr! 450 ns max Test Circuit 5 OFF Isolation 80 dB typ Vs = 10V(p-p); f= 100kHz R; = 750; Test Circuit 6 Channel-to-Channel Crosstalk 80 dB typ Test Circuit 7 Cs (OFF) 5 pF typ Cp (OFF) 5 pF typ Cs, Cp (ON) 16 pF typ Qiny, Charge Injection 20 pCtyp Rs = 00; Cy = 1000pF; V5=0V : Test Circuit 8 POWER SUPPLY Ipp 0.6 mA typ Digital Inputs = Vir or Vinnz Ipp 1 mA max Iss 0.1 mA typ Isg 0.2 mA max Ik 0.9 mA max NOTE Sample tested at 25C to ensure compliance. Specifications subject to change without notice. REV. BADG211A/ADG212A ABSOLUTE MAXIMUM RATINGS* Digital Inputs! (Ta = 25C unless otherwise stated) Voltage atIN .. 2... ee ee Vss 2V to Vpp +2Vor Vpp to Vss 2. ee 44V . 20mA, Whichever Occurs First VpptoGND ....... 0.000 eee ee ee ee 25V _ Power Dissipation (Any Package) Vss toGND.............00 000. eee 25V Up to+75C 2... ee ee ee ee 470mW VLtoGND ............00. 0.0000 4G 0.3V, 25V Derates above +75C by ..........200. 6mW/C Analog Inputs! Operating Temperature ........... 40C to + 85C Voltage at$,D ......... Vsg ~0.3V to Vpp +0.3V Storage Temperature Range. ........ 65C to + 150C Continuous Current, SorD ............. 30mA Lead Temperature (Soldering 10sec) ......... + 300C Pulsed Current S or D NOTE lms Duration, 10% Duty Cycle .......... 70mA 'Overvoltage at IN, S$ or D will be clamped by diodes. Current should be limited to the Maximum Rating above. *COMMENT: Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Only one Absolute Maximum Rating may be applied at any one time. CAUTION ESD (electrostatic discharge) sensitive device. The digital control inputs are diode protect- ed; however, permanent damage may occur on unconnected devices subject to high energy electrostatic fields. Unused devices must be stored in conductive foam or shunts. The protective foam should be discharged to the destination socket before devices are removed. WARNING! a ae ESD SENSITIVE DEVICE PIN CONFIGURATIONS DIP, SOIC \/ INI [1] @ 16 | IN2 D1 [ 2 Ts] D2 si] 3 14| s2 ADG211A Ves 13 ADG2I2a vss eo AG 2t2A J Ye Ne [6] TOP VIEW GND [5] (Notto Scale) [12J Ve GND (Not to Scale) $4 | 6 117 S3 S4 | 8 | ba | 7 10 | D3 Ina | 8 9 | IN3 2322 5 NC = NO CONNECT ORDERING GUIDE Temperature Package Model Range Option* ADG211AKN | 40Cto + 85C N-16 ADG211AKR 40C to + 85C R-16A ADG211AKP 40C to + 85C P-20A ADG212AKN 40C to + 85C N-16 ADG212AKR ~ 40C to + 85C R-16A ADG212AKP 40C to + 85C P-20A *N = Plastic DIP; R =0.15 Small Outline IC (SOIC); P = Plastic Leaded Chip Carrier (PLCC). REV..B -3-ADG211A/ADG212ATypical Performance Characteristics The switches can comfortably operate anywhere in the 10V to 15V single or dual supply range, with only a slight degradation in performance. The following graphs show the relevant performance curves. The test circuits and test conditions are given in a following section, Test Circuits, 150 120 Ron - 2 30 0 -20 -15 -10 -5 0 5 10 15 20 Vp (Vs) - Volts Figure 1. Ronas a Function of Vp (V5): Dual + 15 Supplies 0 -20 ~-15 -10 -5 0 5 10 15 20 Vp (Vs) Volts Figure 3. Ron asa Function of Vp (Vs): Dual + 10V Supplies 100 I Vop = 15V Vsg = 15V 10 Loo 2 LL n(ON) La 2 1 4 a e s _ Is(OFF) oer oO 0.1 Ln La 0.01 20 30 40 50 60 70 80 90 TEMPERATURE - C Figure 5. Leakage Currentas a Function of Temperature (Note: Leakage Current Reduces as the Supply Voltages Reduce) 150 120 > ( UW 70C 25C 4 30 0 -20 -15 -10 --5 0 5 10 15 20 Vp (Vs) - Volts Figure 2. Roy asa Function of Vp (Vs): Single + 15V Supply 150 Vop = 10V MA 120 A f \ go INS A\S 70C _ 3 iN 25C 0 60 30 0 -20 -15 -10 -5 0 5 10 15 20 Vo {Vs) - Volts Figure 4. Roy asa Function of Vp (Vs): Single + 10V Supply 25 TEMP =0 TO +70C LEELA LLL LLL TRIGGER LEVEL - Volts 05 10 11 12 13 14 15 SUPPLY VOLTAGE - Volts Figure 6. Trigger Levels vs. Power Supply Voltage, Dual or Single Supply Voltage REV. BTypical Performance Characteristics ADG211A/ADG212A 220 200 180 160 140 ton - ns 120 100 +10 +11 +12 +13 +14 +15 SUPPLY VOLTAGE - Volts Figure 7. ton vs. Supply Voltage, (Dual Supply) 80 70C 25C 60 0 wo c ' 40 m4 o 20 0 +10 #11 +12 +13 +14 +15 SUPPLY VOLTAGE - Volts Figure 9. tore vs. Supply Voltage, (Dual Supply) 50 60 g70 Ss SINGLE DUAL SUFPLY | SUPPLY 80 s 90 10 1" 12 13 14 15 SUPPLY VOLTAGE - Volts Figure 11. Off Isolation and Channel-to-Channel Crosstalk vs. Supply Voltage REV. B CHARGE INJECTION- PC 220 Pa 200 SN 80 70C 2 160 _ > t _ | 25C = 140 re aac 0 -.. 120 100 80 +10 +11 +12 +13 +14 +15 SUPPLY VOLTAGE - Volts Figure 8. ton vs. Supply Voltage, (Single Supply) 80 60 70C a 25C 7 40 * 0 o 20 +10 +11 +12 +13 +14 +15 SUPPLY VOLTAGE - Volts Figure 10. tore vs. Supply Voltage, (Single Supply) 60 | nA Vop=15V Vss = 15V 40 20 Vpp = 15V 0 /) "" Vss = A LT ~20 4 -40 16 -12 -8 -4 o 4 8 12 16 SOURCE VOLTAGE (V5) Volts Figure 12, Charge Injection vs. Source Voltage (V;) for Dual and Single 15V SuppliesADG21 1A/ADG212ATypical Performance Characteristics 60 40 2 Vop=10V a 1 ves 2 5 oo S , 5 7 2 LH Woo 30v < $= 3 0 41 - co a : 20 f ~40 -16 -12 -8 -4 0 4 8 12 16 SOURCE VOLTAGE (Vs) - Volts Figure 13. Charge Injection vs. Source Voltage for Dual and Single 10V Supplies 0.4 Ue | 0.3 q | 0.2 a BO 0.1 | 25C 70C 0 z. 10 +11 x12 +13 =14 +15 SUPPLY VOLTAGE - Volts Figure 15. Iss vs. Supply Voltage, (Dual Supply) TERMINOLOGY Ron Ohmic resistance between terminals OUT and S Ron Match Difference between the Roy of any two channels Is (OFF) Source terminal leakage current when the switch is off Ip (OFF) Drain terminal leakage current when the switch is off Ip (ON) Leakage current that flows from the closed switch into the body Vp (Vs) Analog voltage on terminal D, S Cs (OFF) Switch input capacitance OFF condition Cp (OFF) Switch output capacitance OFF condition Cw Digital input capacitance Cp, Cs (ON) Input or output capacitance when the switch is on ton Delay time between the 50% and 90% points of the digital input and switch ON condition 0.7 os oe > 25C a ad ] _| 70C 1 0.4 3 Lannea 0.3; 0.2 0.1 +10 +11 +12 +13 +14 #15 SUPPLY VOLTAGE - Volts Figure 14. Ipp vs. Supply Voltage, (Dual Supply) ae tore Len LT ee 0.2 0.1 +10 +11 +12 +13 SUPPLY VOLTAGE - Volts +14 +15 Figure 16. Inn vs. Supply Voltage, (Single Supply) torr topEN Vint Vinu Inn dine) Vpp Vss Vy Ipp Iss Delay time between the 50% and 90% points of the digital input and switch OFF condition OFF time measured between 50% points of both switches, which arc connected as a multi- plexer, when switching from one address state to another Maximum Input Voltage for a Logic Low Minimum Input Voltage for a Logic High Input current of the digital input Most positive voltage supply Most negative voltage supply Logic supply voltage Positive supply current Negative supply current REV. BTest CircuitsADG211A/ADG212A CD ls (OFF) Ip (OFF} . $s D Ss Do v1 _ perf Oe o0- === Vs Vo = a Ip (ON) LY 5 CY L_ D Ron = Villps Test Circuit 1 Test Circuit 2 Test Circuit 3 +5V +15V | | ADG211A x ae va N {~ o O Vo 'N woe st D1 L 3V ro 3302 Vin Ey D2 v . ator o 14pF ADG212A d a, Ot IN1 Vo l 50% Vin . IN2 4 GND _Vss ! 1 I s+ 16V topen *BOTH THE BUFFER AND INVERTER SHOULD HAVE THE SAME PROPAGATION DELAY. Test Circuit 4 +5V Vop 3V a t- ADG211A Vin 50% 50% Vi Vpp | Ss ~ oop [ all r0 Vo va fo Yom 50% 50% ' Vv av IN > 3300 { ADG212A b ib er GND Vss T Vin Vow V Test Circuit 5 75Q +5V Vopp ~"_ T Ve VL Vop ~--- +o DRK---~--- ee 8 spo baa a aD pov, 1 Crs D Se---- TY, o Viy O4---- a y Rt Vo O= 070 O NC , m . Ow oT Vs R Vv L GND Vv GND ss 50 ss Vow Vss Vss ADG211A Viy=5V OFFISOLATION = ADG211A Viy=0V CHANNEL-TO-CHANNEL ADG212A Viy=O0V 20x LOG |Vs/Vol ADG212A Vin =5V CROSSTALK = 20x LOG!Vs/Vol Test Circuit 6. Offlsolation Test Circuit 7. Channel-to-Channe!l Crosstalk REV. B -]-ADG211A/ADG212A +5V Vop rs 1 Vi Vop 5V ! Rs | AD711 Vv Ss ~, D in 1 1 O V ov 1 Vs 1 1 cL i ----4 L InF Low diiwg Vo {~ AVo Vin GND Vss OINJ=C, x AVo Vv Vss Test Circuit 8. Charge Injection OUTLINE DIMENSIONS Dimensions shown in inches and (mm). 16-Pin Plastic (N-16) 16-Lead Narrow Body SOIC (R-16A) 0.2440 (6.20) IWAN ENS AVN AN I 0.2284 (5.80) 0.1574 (4.00) 0.26 (6.61) 0.1497 (3.80) 0.24 (6.1) e YSN NEN SSN 0,785 (19.18) 8 0.306 (7.78) mp 0.3937 (10.00) { 0.745 (18.93) 0.294 7.47) 0.3859 (9.80) 0.14 (3.56) moh 0.0688 (1.75) 0.17 (4.32) 0.12 ae 05) 0.0098 (0.25) 00532 (1.35) 0.0040 (0.10) F | SEATING j sats 0.175 (4.45) . 0.0500 (1.27) 0.0192 (0.49) | PLANE 0.12 (3.05), = BSC 0.0738 (0.35) | | ak 0.012 0.012 (0-305) 305) hx 45 0.065 (1.66) 0.02 (0.508! in (2.67) 9-008 (0.203) >| be 0.045 (115) 0.015 (0.381) 6.095 (2.42) LEAD NO. 1 IDENTIFIED BY DOT OR NOTCH LEADS ARE SOLDER OR TIN-PLATED KOVAR OR ALLOY 42 0.0099 (0.25) ty & 0.0075 (0.19) 0.0500 (1. o0s00(1.27) | \F 0.0760 (0.47) 20-Terminal Plastic Leaded Chip Carrier 0.042 (1.07) 0,048 (1.24) {rai fifi rh 3 0.042 (1.07) 1 0.048 (1.21) - PIN 1 IDENTIFIER 18 Hi 0.350 (8.89) H 356 (9.04) TOP VIEW 0.585 (9.78) 0.395 (10.02) Ci ry fd oy 8 14 9 13 Naat 0.950 (8.99) 0.356 (9.04) 0.385 (9,78) 0.395 0.395 (10.02) 02) 0.042 (1.07) "| {*. 0.056 (1.42) h ___ PIN4 0.050 (1.27) 4 psc IDENTIFIER * 4.200 (7.37) 0.013 (0.33) 0.330 (8.38) BOTTOM VIEW 0021 (0.53) * 9.006 (0.66) F 0.032 (0.87) >| 0.018 (0.38) 0.025 (0.63) 0.025 (0.64) 0.040 (1.01) 0.085 (2.16) 7.110 (2.79) 0.165 (4.19) 7.180 (4.57)