UTC MJE13002 NPN EPITAXIAL SILICON TRANSISTOR
UTC UNISONIC TECHNOLOGIES CO. LTD 1
QW-R204-014,B
NPN SILICON POWER TRANSISTOR
The UTC MJE13002 designed for use in high–volatge,high
speed,power switching in inductive circuit, It is particularly suited
for 115 and 220V switchmode applications such as switching
regulator’s,inverters,DC-DC converter,Motor control,
Solenoid/Relay drivers and deflection circuits.
FEATURES
*Collector-Emitter Sustaining Voltage:
VCEO (sus)=300V.
*Collector-Emitter Saturation Voltage:
VCE(sat)=1.0V(Max.) @Ic=1.0A, IB =0.25A
*Switch Time- tf =0.7μs(Max.) @Ic=1.0A.
TO-126
1
1: BASE 2:COLLECTOR 3: EMITTER
ABSOLUTE MAXIMUM RATINGS
PARAMETER SYMBOL RATING UNIT
Collector-Emitter Voltage VCEO (sus) 300 V
Collector-Emitter Voltage VCEV 600 V
Emitter Base Voltage VEBO 9 V
Collector Current- Continuous
- Peak (1)
Ic
ICM
1.5
3
A
Base Current – Continuous
- Peak (1)
IB
IBM
0.75
1.5
A
Emitter Current – Continuous
- Peak (1)
IE
IEM
2.25
4.5 A
Total Power Dissipation @ TA=25
Derate above 25
PD 1.4
11.2
Watts
MW/
Total Power Dissipation @ TC=25
Derate above 25
PD 40
320
Watts
MW/
Operating and Storage Junction
Temperature Range
Tj , Tstg -65 to +150
THERMAL CHARACTERISTICS
CHARACTERISTIC SYMBOL MAX UNIT
Thermal Resistance, Junction to Case RθJC 3.12 /W
Thermal Resistance, Junction to Ambient RθJA 89 /W
Maximum Load Temperature for Soldering Purposes:
1/8” from Case for 5 Seconds
TL 275
(1) Pulse Test : Pulse Width=5ms,Duty Cycle10%
UTC MJE13002 NPN EPITAXIAL SILICON TRANSISTOR
UTC UNISONIC TECHNOLOGIES CO. LTD 2
QW-R204-014,B
Designer 's Data for “Worst Case” Conditions – The Designer 's Data Sheet permits the design of most circuits
entirely from the information presented. SOA Limit curves – representing boundaries on device characteristics – are
given to facilitate “Worst case” design.
ELECTRICAL CHARACTERISTICS (Tc=25 unless otherwise noted)
CHARACTERISTIC SYMBOL MIN TYP MAX UNIT
OFF CHARACTERISTICS (1)
Collector-Emitter Sustaining Voltage
(Ic=10 mA , IB=0) VCEO(SUS) 300
V
Collector Cutoff Current
(VCEV=Rated Value, VBE (off)=1.5 V)
(VCEV=Rated Value, VBE(off)=1.5V,Tc=100)
ICEV
1
5
mA
Emitter Cutoff Current
(VEB=9 V, Ic=0)
IEBO 1 mA
SECOND BREAKDOWN
Second Breakdown Collector Current with bass forward biased Is/b See Figure 10
Clamped Inductive SOA with base reverse biased RBSOA See Figure 11
ON CHARACTERISTICS (1)
DC Current Gain
(Ic=0.5 A, VCE=2 V)
(Ic=1 A, VCE=2 V)
hFE1
hFE2
8
5
40
25
Collector-Emitter Saturation Voltage
(Ic=0.5A,IB=0.1A)
(Ic=1A,IB=0.25A)
(Ic=1.5A,IB=0.5A)
(Ic=1A,IB=0.25A,Tc=100)
VCE(sat)
0.5
1
3
1
V
Base-Emitter Saturation Voltage
(Ic=0.5A,IB=0.1A)
(Ic=1A,IB=0.25 A)
(Ic=1A,IB=0.25A,Tc=100)
VBE(sat)
1
1.2
1.1
V
DYNAMIC CHARACTERISTICS
Current-Gain-Bandwidth Product
(Ic=100mA,VCE=10 V, f=1MHz) fT 4 10
MHz
Output Capacitance
(VCB=10V,IE=0,f=0.1MHz)
Cob 21 pF
SWITCHING CHARACTERISTICS(TABLE 1)
Delay Time td 0.05 0.1
μs
Rise Time tr 0.5 1
μs
Storage Time ts 2 4
μs
Fall Time
(Vcc=125V,Ic=1A,
IB1=IB2=0.2A,tp=25μs,
Duty Cycle1%) tf 0.4 0.7
μs
INDUCTIVE LOAD, CLAMPED (TABLE 1,FIGURE 12)
Storage Time tsv 1.7 4
μs
Crossover Time tc 0.29 0.75
μs
Fall Time
(Ic=1A,Vclamp=300V,
IB1=0.2A,VBE(off)=5V,Tc=100) tfi 0.15 μs
(1) Pulse Test : PW=300μs, Duty Cycle2%
CLASSIFICATION OF HFE1
RANK A B C D E F
RANGE 8 ~ 16 15 ~ 21 20 ~ 26 25 ~ 31 30 ~ 36 35 ~ 40
UTC MJE13002 NPN EPITAXIAL SILICON TRANSISTOR
UTC UNISONIC TECHNOLOGIES CO. LTD 3
QW-R204-014,B
TYPICAL PERFORMANCE CHARACTERISTICS
V
CE
,COLLECTOR -EMITTER VOLTAGE (VOLTS)
0.02
Figure 2. Collector Saturation Region
0.05 0.01 2
2
1.6
1.2
0.8
0.4
0
0.02 0.05 0.1 0.2 0.5 1
IB, BASE CURRENT (AMP)
Ic=0.1A 0.3A 0.5A 1A 1.5A
Tj=25
V,VOLTAGE (VOLTS)
0.02
Figure 3. Base-Emitter Voltage
0.03 0.05 2
1.4
1.2
1
0.8
0.6
0.4
0.07 0.20.1 0.3 0.5 0.7
IC, COLLECTOR CURRENT (AMP)
1
Tj=-55
25
25
150
VBE(sat)@IC/IB=3
- - - - - - VBE(on)@VCE=2V
V,VOLTAGE (VOLTS)
Figure 4. Collector-Emitter Saturation Region
0.35
0.3
0.25
0.2
0.15
0
IC, COLLECTOR CURRENT (AMP)
IC/IB=3
0.1
0.05
0.02 0.03 0.05 2
0.07 0.20.1 0.3 0.5 0.7 1
IC,COLLECTOR CURRENT (
A)
Figure 5. Collector Cutoff Region
VBE,BASE-EMITTER VOLTAGE (VOLTS)
-0.4 -0.2 +0.
6
+0.20+0.4
104
103
102
101
100
10
-1 REVERSE FORWARD
VCE=250V
V,VOLTAGE (VOLTS)
Figure 6. Capacitance
500
300
200
100
70
5
VR,REVERSE VOLTAGE (VOLTS)
50
30
0.1 0.2 0.5 200
1521020
50 100
20
10
7
500 1000
Cib
Cob
Tj=150
125
100
75
50
25
Tj=-55
25
150
hFE,DC CURRENT GAIN
Figure 1. DC Current Gain
80
60
40
30
20
10
8
6
4
Tj=150
25
-55
VCE=2V
- - - - - -VCE=5V
0.02 0.03 0.05 0.07 2
0.1 0.2 0.3 0.5 0.7 1
IC, COLLECTOR CURRENT (AMP)
UTC MJE13002 NPN EPITAXIAL SILICON TRANSISTOR
UTC UNISONIC TECHNOLOGIES CO. LTD 4
QW-R204-014,B
TABLE 1.TEST CONDITIONS FOR DYNAMIC PERFORMANCE
REVERSE BIAS SAFE OPERATING AREA AND INDUCTIVE SWITCHING RESISTIVE
SWITHCING
TEST CIRCUITS
pw 5V
DUTY CYCLE10%
tr,tf10ns 68
0.001μF
1k
1N4933
0.02μF270
+5V
1k
1k
33
1N4933 33
+5V
RB
MJE210
IB
2N2222
2N2905
47
1/2W 100
MJE200
-VBE(off)
T.U.T.
Vcc
MR826*
Vcl amp
*SELECTED FOR1kV
5.1k
51
VCE
L
Ic
NOTE
PW and Vcc Adjusted for Desired Ic
RB Adjusted for Desi red IB1
1N4933
+125V
RB
D1
-4.0V
SCOPE
Rc
TUT
CIRCUIT
VALUES
Coil Data : GAP for 30 mH/2 A Vcc=20V
FERROXCUBE core #6656 Lcoil=50mH Vclamp=300V
Full Bobbin (-200 Turns) #20
Vcc=125V
Rc=125Ω
D1=1N5820 or
Equiv.
RB=47Ω
TEST WAVEFORMS
Ic
Ic(pk)
tf CLAMPED
t
tft1
VCE
TIME t2 t
VCE or
Vclamp
OUTPUT WAVEFORMS
t1 Adjusted to
Obtain Ic
Test Equipment
Scope-Tektronics
475 or Equivalent
t1= Lcoil(Icpk)
Vcc
t2= Lcoil(Icpk)
Vclamp
+10.3V 25μS
0
-8.5V
tr,tf<10ns
Duty Cycly=1.0%
RB and Rc adjusted
for desired IB and Ic
TABLE 2.TYPICAL INDUCTIVE SWITCHING PERFORMANCE
Ic Tc Tsv Trv Tfi Tti Tc
AMP μs μs μs μs μs
0.5 25
100
1.3
1.6
0.23
0.26
0.30
0.30
0.35
0.40
0.30
0.36
1 25
100
1.5
1.7
0.10
0.13
0.14
0.26
0.05
0.06
0.16
0.29
1.5 25
100
1.8
3
0.07
0.08
0.10
0.22
0.05
0.08
0.16
0.28
Note: All Data Recorded in the inductive Switching Circuit Table 1
UTC MJE13002 NPN EPITAXIAL SILICON TRANSISTOR
UTC UNISONIC TECHNOLOGIES CO. LTD 5
QW-R204-014,B
SWITCHING TIMES NOTE
In resistive switching circuits, rise, fall, and storage times have been defined and apply to both current and voltage
waveforms since they are in phase, However, for inductive loads which are common to SWITCHMODE power
supplies and hammer drivers, current and voltage waveforms are not in phase. Therefore, separate measurements
must be made on each wave form to determine the total switching time, For this reason, the following new terms
have been defined.
tsv=Voltage Storage Time, 90% IB1 to 10% Vclamp
trv=Voltage Rise Time, 10-90% Vclamp
tfi=Current Fall Time, 90-10% Ic
tti=Current Tail, 10-2% Ic
tc=Crossover Time, 10% Vclamp to 10% IC
An enlarged portion of the inductive switching waveforms is shown in Figure 7 to aid in the visual identity of these
terms.
For the designer, there is minimal switching loss during storage time and the predominant switching power losses
occur during the crossover interval and can be obtained using the standard equation from AN-222:
PSWT=1/2 VccIc (tc)f
In general, trv + tfitc. However, at lower test currents this relationship may not be valid.
As is common with most switching transistor, resistive switching is specified at 25 and has become a benchmark
for designers. However, for designers of high frequency converter circuits, the user oriented specifications which
make this a “SWITCHMODE” transistor are the inductive switching speeds (tc and tsv) which are guaranteed at 100
SAFE OPERATING AREA INFORMATION
FORWARD BIAS
There are two limitations on the power handling ability of a transistor: average junction temperature and second
break-down. Safe operating area curves indicate Ic – VCE limits of the transistor that must be observed for reliable
operation; i.e., the transistor must not be subjected to greater dissipation than the curves indicate.
The data of Figure 10 is based on Tc=25; TJ(pk) is variable depending on power level. Second breakdown
pulse limits are valid for duty cycles to 10% but must be derated when Tc25. Second breakdown limitations do
not derate the same as thermal limitations. Allowable current at the voltages shown on Figure 10 may be found at
any case tem-perature by using the appropriate curve on Figure 12.
TJ(pk) may be calculated from the data in Figure 10. At high case temperatures, thermal limitations will reduce
the power that can be handled to values less than the limitations imposed by second breakdown.
REVERSE BIAS
For inductive loads, high voltage and high current must be sustained simultaneously during turn–off, in most
cases, with the base to emitter junction reverse biased. Under these conditions the collector voltage must be held to
a safe level at or below a specific value of collector current. This can be accomplished by several means such as
active clamping, RC snubbing, load line shaping, etc. The safe level for these devices is specified as Reverse Bias
Safe Operating Area and represents the voltage–current conditions during re-verse biased turn–off. This rating is
verified under clamped conditions so that the device is never subjected to an ava-lanche mode. Figure 11 gives
RBSOA characteristics.
UTC MJE13002 NPN EPITAXIAL SILICON TRANSISTOR
UTC UNISONIC TECHNOLOGIES CO. LTD 6
QW-R204-014,B
Figure 7. Inductive Switching Measurements
TIME
ICPK Vclamp
90% Vclamp 90% Ic
Ic tsv trv tfi tti
tc
10% Vclamp 10%
ICPK 2% IC
90% IB1
VCE
IB
t,TIME(S)
0.02
Figure 8. Turn-On Time
0.03 0.05 20
2
1
0.7
0.2
0.1
0.02
0.07 0.20.1 0.3 0.5 0.7
IC, COLLECTOR CURRENT (AMP)
1
0
0.5
0.3
0.07
0.05
0.03
Vcc=125V
Ic/IB=5
TJ=25
tr
td @ VBE(off)=5V
t,TIME(S)
0.02
Figure 9. Turn-Off Time
0.03 0.05 2
10
7
5
1
0.7
0.1
0.07 0.20.1 0.3 0.5 0.7
IC, COLLECTOR CURRENT (AMP)
1
3
2
0.5
0.3
0.2
tr
ts Vcc=125V
Ic/IB=5
TJ=25
Ic,COLLECTOR CURRENT (AMP)
5
Figure 10. Active Region Safe Operating Area
10 500
10
5
0.5
0.2
0.0
120 50 100 200
VCE,COLLECTOR-EMITTERVOLTAGE (VOLTS)
300
2
1
0.1
0.05
0.02
THERMAL LIMIT (SINGLE PULSE)
BONDING WIRE LIMIT
SECOND BREAKDOWN LIMIT
CURVES APPLY BELOW RATED VCEO
10μS
100μS
1.0ms
5.0ms
dc
Tc=25
V,VOLTAGE (VOLTS)
Figure 11. Reverse Bias Safe Operating Area
1.6
1.2
0.8
0
VCEV,COLLECTOR-EMITTER LAMP VOLTAGE(VOLTS)
0.4
0100 800
200 40
0
30
0500 600 700
VBE(off)=9V
Tj100
IB1=1A
5V
3V
1.5V
POWER DERATING FACTOR
20
Figure 12. Forward Bias Power Derating
40 60 160
1
0.8
0.6
0.4
0.2
0
80 100 120
IC, CASE TEMPERATURE ()
140
SECOND BREAKDOWN
DERATING
THERMAL
DERATING
UTC MJE13002 NPN EPITAXIAL SILICON TRANSISTOR
UTC UNISONIC TECHNOLOGIES CO. LTD 7
QW-R204-014,B
r(t),EFFECTIVE TRANSIENT THERMAL
RESISTANCE (NORMALIZED)
0.01
Figure 13. Thermal Response
0.02 0.03 2
1
0.7
0.5
0.1
0.07
0.01
30.10.05 0.2 0.3 0.5
IC, COLLECTOR CURRENT (AMP)
1
0.3
0.2
0.05
0.03
0.02
5 10 20 50 100 200 500 1000
P (PK)
t1
t2
DUTY CYCLE,D=t1/t2
ZθJC(t)=r(t) RθJC
RθJC=3.12/W MAX
D CURVES APPLY FOR POWER
PULSE TRAIN SHOWN
READ TIME AT t1
TJ(pk)-TC=P(pk) RθJC(t)
D=0.5
0.2
0.1
0.05
0.02
0.01
SINGLE PULSE
UTC assumes no responsibility for equipment failures that result from using products at values that
exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or
other parameters) listed in products specifications of any and all UTC products described or contained
herein. UTC products are not designed for use in life support appliances, devices or systems where
malfunction of these products can be reasonably expected to result in personal injury. Reproduction in
whole or in part is prohibited without the prior written consent of the copyright owner. The information
presented in this document does not form part of any quotation or contract, is believed to be accurate
and reliable and may be changed without notice.