LF351 Wide bandwidth single JFET operational amplifiers Features Internally adjustable input offset voltage Low power consumption Wide common-mode (up to VCC+) and differential voltage range Low input bias and offset current Output short-circuit protection High input impedance JFET input stage Internal frequency compensation Latch up free operation High slew rate 16 V/s (typical) N DIP8 (Plastic package) D SO-8 (Plastic micro package) Description These circuits are high speed JFET input single operational amplifiers incorporating well matched, high voltage JFET and bipolar transistors in a monolithic integrated circuit. Pin connections (top view) The devices feature high slew rates, low input bias and offset currents, and low offset voltage temperature coefficient. 1 8 2 7 3 6 4 5 1 - Offset null 1 2 - Inverting input 3 - Non-inverting input 4 - VCC5 - Offset null 2 6 - Output 7 - VCC+ 8 - N.C. April 2008 Rev 2 1/14 www.st.com 14 Schematics 1 LF351 Schematics Figure 1. Schematic diagram VCC Non-inverting input Inverting input 100W 200W Output 100W 30k 8.2k 1.3k 35k 1.3k VCC Offset Null1 Figure 2. 2/14 Offset Null2 Input offset voltage null circuit 35k 100W LF351 Absolute maximum ratings and operating conditions 2 Absolute maximum ratings and operating conditions Table 1. Absolute maximum ratings Symbol Value Unit 18 V 15 V Differential input voltage 30 V Rthja Thermal resistance junction to ambient(4) SO-8 DIP8 125 85 C/W Rthjc Thermal resistance junction to case(4) SO-8 DIP8 40 41 C/W VCC Vi Vid Parameter Supply voltage(1) Input voltage (2) (3) Output short-circuit duration(5) Tstg ESD Infinite Storage temperature range -65 to +150 C HBM: human body model(6) 500 V 200 V 1.5 kV MM: machine model (7) CDM: charged device model(8) 1. All voltage values, except differential voltage, are with respect to the zero reference level (ground) of the supply voltages where the zero reference level is the midpoint between VCC+ and VCC-. 2. The magnitude of the input voltage must never exceed the magnitude of the supply voltage or 15 volts, whichever is less. 3. Differential voltages are the non-inverting input terminal with respect to the inverting input terminal. 4. Short-circuits can cause excessive heating and destructive dissipation. Values are typical. 5. The output may be shorted to ground or to either supply. Temperature and/or supply voltages must be limited to ensure that the dissipation rating is not exceeded 6. Human body model: A 100 pF capacitor is charged to the specified voltage, then discharged through a 1.5 k resistor between two pins of the device. This is done for all couples of connected pin combinations while the other pins are floating. 7. Machine model: A 200 pF capacitor is charged to the specified voltage, then discharged directly between two pins of the device with no external series resistor (internal resistor < 5 ). This is done for all couples of connected pin combinations while the other pins are floating. 8. Charged device model: all pins and the package are charged together to the specified voltage and then discharged directly to the ground through only one pin. This is done for all pins. Table 2. Operating conditions Symbol Parameter VCC Supply voltage Toper Operating free-air temperature range LF151 LF251 LF351 6 to 32 -55 to +125 -40 to +105 Unit V 0 to +70 C 3/14 Electrical characteristics LF351 3 Electrical characteristics Table 3. Electrical characteristics at VCC = 15 V, Tamb = +25C (unless otherwise specified) Symbol Parameter Min. Typ. Max. Unit Input offset voltage (Rs = 10k) Tmin Tamb Tmax 3 Input offset voltage drift 10 Iio Input offset current (1) Tmin Tamb Tmax 5 100 4 pA nA Iib Input bias current (1) Tmin Tamb Tmax 20 200 20 pA nA Avd Large signal voltage gain (RL = 2k, Vo = 10V) Tmin Tamb Tmax 50 25 200 SVR Supply voltage rejection ratio (RS = 10k) Tmin Tamb Tmax 80 80 86 Vio DVio mV V/C V/mV dB ICC Supply current, no load Tmin Tamb Tmax Vicm Input common mode voltage range 11 +15 -12 V CMR Common mode rejection ratio (RS = 10k) Tmin Tamb Tmax 70 70 86 dB Output short-circuit current Tmin Tamb Tmax 10 10 40 10 12 12 13.5 IOS Vopp SR Output voltage swing RL = 2k RL = 10k Tmin Tamb Tmax RL = 2k RL = 10k Slew rate, Vi = 10V, RL = 2k, CL = 100pF, unity gain 1.4 10 13 3.4 3.4 60 60 mA mA V 10 12 12 16 V/s tr Rise time, Vi = 20mV, RL = 2k, CL = 100pF, unity gain 0.1 s Kov Overshoot, Vi = 20mV, RL = 2k, CL = 100pF, unity gain 10 % 4 MHz Input resistance 1012 Total harmonic distortion f= 1kHz, Av= 20dB, RL= 2k, CL=100pF, Vo= 2Vpp 0.01 % Equivalent input noise voltage RS = 100, f = 1KHz 15 nV -----------Hz Phase margin 45 Degrees GBP Ri THD en m Gain bandwidth product, f = 100kHz, Vin = 10mV, RL = 2k, CL = 100pF 2.5 1. The input bias currents are junction leakage currents which approximately double for every 10C increase in the junction temperature. 4/14 LF351 Electrical characteristics Figure 3. Maximum peak-to-peak output voltage versus frequency Figure 4. Maximum peak-to-peak output voltage versus frequency Figure 5. Maximum peak-to-peak output voltage versus frequency Figure 6. Maximum peak-to-peak output voltage versus free air temp. Figure 7. Maximum peak-to-peak output voltage versus load resistance Figure 8. Maximum peak-to-peak output voltage versus supply voltage 5/14 Electrical characteristics Figure 9. Input bias current versus free air temperature Figure 11. Large signal differential voltage amplification and phase shift versus frequency LF351 Figure 10. Large signal differential voltage amplification versus free air temp. Figure 12. Total power dissipation versus free air temperature Figure 13. Supply current per amplifier versus Figure 14. Supply current per amplifier versus free air temperature supply voltage 6/14 LF351 Figure 15. Common mode rejection ratio versus free air temperature Electrical characteristics Figure 16. Voltage follower large signal pulse response Figure 17. Output voltage versus elapsed time Figure 18. Equivalent input noise voltage versus frequency Figure 19. Total harmonic distortion versus frequency 7/14 Parameter measurement information 4 Parameter measurement information Figure 20. Voltage follower 8/14 LF351 Figure 21. Gain-of-10 inverting amplifier LF351 5 Typical application Typical application Figure 22. Square wave oscillator (0.5 Hz) Figure 23. High Q notch filter 9/14 Package information 6 LF351 Package information In order to meet environmental requirements, STMicroelectronics offers these devices in ECOPACK(R) packages. These packages have a lead-free second level interconnect. The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an STMicroelectronics trademark. ECOPACK specifications are available at: www.st.com. 10/14 LF351 6.1 Package information DIP8 package information Figure 24. DIP8 package mechanical drawing Table 4. DIP8 package mechanical data Dimensions Ref. Millimeters Min. Typ. A Inches Max. Min. Typ. 5.33 Max. 0.210 A1 0.38 0.015 A2 2.92 3.30 4.95 0.115 0.130 0.195 b 0.36 0.46 0.56 0.014 0.018 0.022 b2 1.14 1.52 1.78 0.045 0.060 0.070 c 0.20 0.25 0.36 0.008 0.010 0.014 D 9.02 9.27 10.16 0.355 0.365 0.400 E 7.62 7.87 8.26 0.300 0.310 0.325 E1 6.10 6.35 7.11 0.240 0.250 0.280 e 2.54 0.100 eA 7.62 0.300 eB L 10.92 2.92 3.30 3.81 0.430 0.115 0.130 0.150 11/14 Package information 6.2 LF351 SO-8 package information Figure 25. SO-8 package mechanical drawing Table 5. SO-8 package mechanical data Dimensions Ref. Millimeters Min. Typ. A Max. Min. Typ. 1.75 0.25 Max. 0.069 A1 0.10 A2 1.25 b 0.28 0.48 0.011 0.019 c 0.17 0.23 0.007 0.010 D 4.80 4.90 5.00 0.189 0.193 0.197 E 5.80 6.00 6.20 0.228 0.236 0.244 E1 3.80 3.90 4.00 0.150 0.154 0.157 e 0.004 0.010 0.049 1.27 0.050 h 0.25 0.50 0.010 0.020 L 0.40 1.27 0.016 0.050 k 1 8 1 8 ccc 12/14 Inches 0.10 0.004 LF351 7 Ordering information Ordering information Table 6. Order codes Order code Temperature range LF151N Packing Marking DIP8 Tape LF151N SO-8 Tape or Tape & reel 151 DIP8 Tape LF251N SO-8 Tape or Tape & reel 251 DIP8 Tape LF351N SO-8 Tape or Tape & reel 351 -55C, +125C LF151D LF151DT LF251N -40C, +105C LF251D LF251DT LF351N 0C, +70C LF351D LF351DT 8 Package Revision history Table 7. Document revision history Date Revision Changes 17-May-2001 1 Initial release. 28-April-2008 2 Updated document format. 13/14 LF351 Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries ("ST") reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST's terms and conditions of sale. Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no liability whatsoever relating to the choice, selection or use of the ST products and services described herein. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. 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