NC7S08 — TinyLogic
®
HS 2-Input AND Gate
©1995 Fairchild Semiconductor Corporation www.fairchildsemi.com
NC7S08 Rev. 1.9.0
March 2008
NC7S08
TinyLogic
®
HS 2-Input AND Gate
Features
Space saving SOT23 or SC70 5-lead package
Ultra small MicroPak™ Pb-Free leadless package
High Speed; t
PD
3.5ns typ
Low Quiescent Power; I
CC
<
1µA
Balanced Output Drive; 2mA I
OL
, –2mA I
OH
Broad V
CC
Operating Range; 2V–6V
Balanced Propagation Delays
Specified for 3V operation
General Description
The NC7S08 is a single 2-Input high performance
CMOS AND Gate. Advanced Silicon Gate CMOS fabri-
cation assures high speed and low power circuit opera-
tion over a broad V
CC
range. ESD protection diodes
inherently guard both inputs and output with respect to
the V
CC
and GND rails. Three stages of gain between
inputs and outputs assures high noise immunity and
reduced sensitivity to input edge rate.
Ordering Information
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number.
All packages are lead free per JEDEC: J-STD-020B standard.
Order
Number
Package
Number
Product Code
Top Mark Package Description Supplied As
NC7S08M5X MA05B 7S08 5-Lead SOT23, JEDEC MO-178,
1.6mm
3k Units on Tape and Reel
NC7S08P5X MAA05A S08 5-Lead SC70, EIAJ SC-88a,
1.25mm Wide
3k Units on Tape and Reel
NC7S08L6X MAC06A PP 6-Lead MicroPak, 1.0mm Wide 5k Units on Tape and Reel
©1995 Fairchild Semiconductor Corporation www.fairchildsemi.com
NC7S08 Rev. 1.9.0 2
NC7S08 — TinyLogic
®
HS 2-Input AND Gate
Connection Diagram
Pin Assignments for SC70 and SOT23
(Top View)
Pad Assignments for MicroPak
(Top Thru View)
Pin Description
Logic Symbol
IEEE/IEC
Function Table
Y
=
AB
H
=
HIGH Logic Level
L
=
LOW Logic Level
Pin Names Description
A, B Inputs
Y Output
NC No Connect
Inputs Output
ABY
LLL
LHL
HLL
HHH
©1995 Fairchild Semiconductor Corporation www.fairchildsemi.com
NC7S08 Rev. 1.9.0 3
NC7S08 — TinyLogic
®
HS 2-Input AND Gate
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only.
Recommended Operating Conditions
(1)
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to absolute maximum ratings.
Notes:
1. Unused inputs must be held HIGH or LOW. They may not float.
Symbol Parameter Rating
V
CC
Supply Voltage –0.5V to +7.0V
I
IK
DC Input Diode Current
@ V
IN
–0.5V
@ V
IN
V
CC
+0.5V
–20mA
+20mA
V
IN
DC Input Voltage –0.5V to V
CC
+0.5V
I
OK
DC Output Diode Current
@ V
OUT
<
–0.5V
@ V
OUT
>
V
CC
+0.5V
–20mA
+20mA
V
OUT
DC Output Voltage –0.5V to V
CC
+ 0.5V
I
OUT
DC Output Sourceor Sink Current ±12.5mA
I
CC
or I
GND
DC V
CC
or Ground Current per Output Pin ±25mA
T
STG
Storage Temperature –65°C to +150°C
T
J
Junction Temperature 150°C
T
L
Lead Temperature (Soldering, 10 seconds) 260°C
P
D
Power Dissipation @ +85°C
SOT23-5
SC70-5
200mW
150mW
Symbol Parameter Rating
V
CC
Supply Voltage 2.0V to 6.0V
V
IN
Input Voltage 0V to V
CC
V
OUT
Output Voltage 0V to V
CC
T
A
Operating Temperature –40°C to +85°C
t
r
, t
f
Input Rise and Fall Time
V
CC
@ 2.0V
V
CC
@ 3.0V
V
CC
@ 4.5V
V
CC
@ 6.0V
0ns to 1000ns
0ns to 750ns
0ns to 500ns
0ns to 400ns
θ
JA
Thermal Resistance
SOT23-5
SC70-5
300°C/W
425°C/W
©1995 Fairchild Semiconductor Corporation www.fairchildsemi.com
NC7S08 Rev. 1.9.0 4
NC7S08 — TinyLogic
®
HS 2-Input AND Gate
DC Electrical Characteristics
Symbol Parameter V
CC
(V) Conditions
T
A
=
+25°C
T
A
=
–40°C
to +85°C
UnitsMin. Typ. Max. Min. Max.
V
IH
HIGH Level Input
Voltage
2.0 1.50 1.50 V
3.0-6.0 0.7 x V
CC
0.7 x V
CC
V
IL
LOW Level Input
Voltage
2.0 0.50 0.50 V
3.0-6.0 0.3 x V
CC
0.3 x V
CC
V
OH
HIGH Level Output
Voltage
2.0 I
OH
=
–20µA,
V
IN
=
V
IH
1.90 2.0 1.90 V
3.0 2.90 3.0 2.90
4.5 4.40 4.5 4.40
6.0 5.90 6.0 5.90
3.0 V
IN
=
V
IH
,
I
OH
=
–1.3mA
2.68 2.85 2.63
4.5 V
IN
=
V
IH
,
I
OH
=
–2mA
4.18 4.35 4.13
6.0 V
IN
=
V
IH
,
I
OH
=
–2.6mA
5.68 5.85 5.63
V
OL
LOW Level Output
Voltage
2.0 I
OL
=
20µA
V
IN
=
V
IL
0.0 0.10 0.10 V
3.0 0.0 0.10 0.10
4.5 0.0 0.10 0.10
6.0 0.0 0.10 0.10
3.0 V
IN
=
V
IH
or V
IL
,
I
OH
=
1.3mA
0.1 0.26 0.33
4.5 V
IN
=
V
IH
or VIL,
IOL = 2mA
0.1 0.26 0.33
6.0 VIN = VIH or VIL,
IOL = 2.6mA
0.1 0.26 0.33
IIN Input Leakage
Current
6.0 VIN = VCC, GND ±0.1 ±1.0 µA
ICC Quiescent Supply
Current
6.0 VIN = VCC, GND 1.0 10.0 µA
©1995 Fairchild Semiconductor Corporation www.fairchildsemi.com
NC7S08 Rev. 1.9.0 5
NC7S08 — TinyLogic® HS 2-Input AND Gate
AC Electrical Characteristics
Note:
2. CPD is defined as the value of the internal equivalent capacitance which is derived from dynamic operating current
consumption (ICCD) at no output loading and operating at 50% duty cycle. (See Figure 2.) CPD is related to ICCD
dynamic operating current by the expression: ICCD = (CPD)(VCC)(fIN) + (ICCstatic).
AC Loading and Waveforms
CL includes load and stray capacitance
Input PRR = 1.0 MHz; tW = 500 ns
Figure 1. AC Test Circuit
Input = AC Waveform;
PRR = variable; Duty Cycle = 50%
Figure 2. ICCD Test Circuit
Figure 3. AC Waveforms
Symbol Parameter VCC (V) Conditions
TA = +25°C
TA = –40°C
to +85°C
Units
Figure
NumberMin. Typ. Max. Min. Max.
tPLH, tPHL Propagation Delay 5.0 CL = 15pF 3.5 15 ns Figure 1
Figure 3
2.0 CL = 50pF 20 100 125
3.0 11 27 35
4.5 8 20 25
6.0 7 17 21
tTLH, tTHL Output Transition
Time
5.0 CL = 15pF 3.0 10 ns Figure 1
Figure 3
2.0 CL = 50pF 25 125 155
3.0 16 35 45
4.5 11 25 31
6.0 9 21 26
CIN Input Capacitance Open 2 10 10 pF
CPD Power Dissipation
Capacitance
5.0 (2) 6pFFigure 2
©1995 Fairchild Semiconductor Corporation www.fairchildsemi.com
NC7S08 Rev. 1.9.0 6
NC7S08 — TinyLogic® HS 2-Input AND Gate
Tape and Reel Specifications
Tape Format for SC70 and SOT23
Tape Dimensions inches (millimeters)
Package
Designator Tape Section Number Cavities Cavity Status Cover Tape Status
M5X, P5X Leader (Start End) 125 (typ.) Empty Sealed
Carrier 3000 Filled Sealed
Trailer (Hub End) 75 (typ.) Empty Sealed
PackageTape Size Dim A Dim B Dim F Dim KoDim P1 Dim W
SC70-5 8mm 0.093
(2.35)
0.096
(2.45)
0.138 ± 0.004
(3.5 ± 0.10)
0.053 ± 0.004
(1.35 ± 0.10)
0.157
(4)
0.315 ± 0.004
(8 ± 0.1)
SOT23-5 8mm 0.130
(3.3)
0.130
(3.3)
0.138 ± 0.002
(3.5 ± 0.05)
0.055 ± 0.004
(1.4 ± 0.11)
0.157
(4)
0.315 ± 0.012
(8 ± 0.3)
©1995 Fairchild Semiconductor Corporation www.fairchildsemi.com
NC7S08 Rev. 1.9.0 7
NC7S08 — TinyLogic® HS 2-Input AND Gate
Tape and Reel Specifications (Continued)
Tape Format for MicroPak
Reel Dimensions inches (millimeters)
Package Designator Tape Section Number Cavities Cavity Status Cover Tape Status
L6X Leader (Start End) 125 (typ.) Empty Sealed
Carrier 5000 Filled Sealed
Trailer (Hub End) 75 (typ.) Empty Sealed
Tape Size ABCDN W1 W2 W3
8mm 7.0
(177.8)
0.059
(1.50)
0.512
(13.00)
0.795
(20.20)
2.165
(55.00)
0.331 + 0.059/–0.000
(8.40 + 1.50/–0.00)
0.567
(14.40)
W1 + 0.078/–0.039
(W1 + 2.00/–1.00)
©1995 Fairchild Semiconductor Corporation www.fairchildsemi.com
NC7S08 Rev. 1.9.0 8
NC7S08 — TinyLogic® HS 2-Input AND Gate
Physical Dimensions
Figure 4. 5-Lead SOT23, JEDEC MO-178, 1.6mm
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions,
specifically the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/
5
1
4
32
LAND PATTERN RECOMMENDATION
B
A
L
C
0.10 C
0.20 C A B
0.60 REF
0.55
0.35 SEATING PLANE
0.25
GAGE PLANE
NOTES: UNLESS OTHEWISE SPECIFIED
A) THIS PACKAGE CONFORMS TO JEDEC
MO-178, ISSUE B, VARIATION AA,
B) ALL DIMENSIONS ARE IN MILLIMETERS.
1.45 MAX
1.30
0.90
0.15
0.05
1.90
0.95 0.50
0.30
3.00
2.60
1.70
1.50
3.00
2.80
C
0.950.95
2.60
0.70
1.00
SEE DETAIL A
0.22
0.08
C) MA05Brev5
TOP VIEW
(0.30)
©1995 Fairchild Semiconductor Corporation www.fairchildsemi.com
NC7S08 Rev. 1.9.0 9
NC7S08 — TinyLogic® HS 2-Input AND Gate
Physical Dimensions (Continued)
Figure 5. 5-Lead SC70, EIAJ SC-88a, 1.25mm Wide
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions,
specifically the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/
©1995 Fairchild Semiconductor Corporation www.fairchildsemi.com
NC7S08 Rev. 1.9.0 10
NC7S08 — TinyLogic® HS 2-Input AND Gate
Physical Dimensions (Continued)
Figure 6. 6-Lead MicroPak, 1.0mm Wide
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions,
specifically the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/
2. DIMENSIONS ARE IN MILLIMETERS
1. CONFORMS TO JEDEC STANDARD M0-252 VARIATION UAAD
MAC06AREVC
Notes:
3. DRAWING CONFORMS TO ASME Y14.5M-1994
TOP VIEW
RECOMMENED
LAND PATTERN
BOTTOM VIEW
1.45
1.00
A
B0.05 C
0.05 C
2X
2X
0.55MAX
0.05 C
(0.49)
(1)
(0.75)
(0.52)
(0.30)
6X
1X
6X
PIN 1
DETAIL A
0.075 X 45
CHAMFER
0.25
0.15
0.35
0.25
0.40
0.30
0.5
(0.05)
1.0
5X
DETAIL A
PIN 1 TERMINAL
0.40
0.30
0.45
0.35
0.10
0.00
0.10 C B A
0.05 C
C
0.05 C
0.05
0.00
5X
5X
6X (0.13)
4X
6X
©1995 Fairchild Semiconductor Corporation www.fairchildsemi.com
NC7S08 Rev. 1.9.0 11
TRADEMARKS
Thefollowing includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global
subsidiaries, and is not intended to be an exhaustive list of all such trademarks.
ACEx®
Build it Now
CorePLUS™
CROSSVOLT
CTL™
Current Transfer Logic™
EcoSPARK®
EZSWITCH™ *
®
Fairchild®
Fairchild Semiconductor®
FACT Quiet Series™
FACT®
FAST®
FastvCore™
FlashWriter®*
FPS™
FRFET®
Global Power ResourceSM
Green FPS™
Green FPS™e-Series™
GTO™
i-Lo
IntelliMAX™
ISOPLANAR™
MegaBuck™
MICROCOUPLER™
MicroFET™
MicroPak™
MillerDrive™
Motion-SPM™
OPTOLOGIC®
OPTOPLANAR®
®
PDP-SPM
Power220®
POWEREDGE®
Power-SPM™
PowerTrench®
Programmable Active Droop™
QFET®
QS™
QT Optoelectronics™
Quiet Series™
RapidConfigure™
SMART START™
SPM®
STEALTH™
SuperFET™
SuperSOT™-3
SuperSOT™-6
SuperSOT™-8
SupreMOS™
SyncFET™®
The Power Franchise®
TinyBoost™
TinyBuck™
TinyLogic®
TINYOPTO™
TinyPower™
TinyPWM™
TinyWire™
µSerDes™
UHC®
Ultra FRFET™
UniFET™
VCX
*EZSWITCH™ and FlashWriter®are trademarks of System General Corporation, used under license by Fairchild Semiconductor.
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS
HEREIN TO IMPROVE RELIABILITY, FUNCTION, OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE
APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS
PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD’S
WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY THEREIN, WHICH COVERS THESE PRODUCTS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR
SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the body or
(b) support or sustain life, and (c) whose failure to perform
when properly used in accordance with instructions for use
provided in the labeling, can be reasonably expected to
result in a significant injury of the user.
2. A critical component in any component of a life support,
device, or system whose failure to perform can be
reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification Product Status Definition
Advance Information Formative or In Design This datasheet contains the design specifications for product
development. Specifications may change in any manner without notice.
Preliminary First Production
This datasheet contains preliminary data; supplementary data will be
published at a later date. Fairchild Semiconductor reserves the right to
make changes at any time without notice to improve design.
No Identification Needed Full Production
This datasheet contains final specifications. Fairchild Semiconductor
reserves the right to make changes at any time without notice to improve
the design.
Obsolete Not In Production
This datasheet contains specifications on a product that has been
discontinued by Fairchild Semiconductor. The datasheet is printed for
reference information only.
Rev. I33
NC7S08 — TinyLogic® HS 2-Input AND Gate