This is information on a product in full production.
July 2014 DocID11739 Rev 3 1/8
EMIF02-MIC03F2
2-line IPAD™, EMI filter and ESD protection
Datasheet - production data
Figure 1. Pin configuration (bump side) and
basic cell configuration
Features
EMI symmetrical (I/O) low-pass filter
High efficiency in EMI filtering
Very low PCB space consuming:
1.07 mm x 1.47 mm
Very thin package: 0.65 mm
High efficiency in ESD suppression
High reliability offered by monolithic integration
High reducing of parasitic elements through
integration and wafer level packaging
Complies with the following standards:
IEC 61000-4-2 level 4, on input pins
15 kV (air discharge)
8 kV (contact discharge)
IEC 61000-4-2 Level 1, on output pins
2 kV (air discharge)
2 kV (contact discharge)
MIL STD 883E - Method 3015-6 Class 3
Application
Mobile phones (differential microphone filtering
and ESD protection).
Description
The EMIF02-MIC03F2 is a highly integrated
device designed to suppress EMI/RFI noise in all
systems subjected to electromagnetic
interferences. The EMIF02 Flip-Chip packaging
means the package size is equal to the die size.
This filter includes an ESD protection circuitry
which prevents damage to the application when
subjected to ESD surges up 15 kV.
TM: IPAD is a trademark of STMicroelectronics.
Flip-Chip package
B
132
C
A
I1
O1
GND
I2
O2
Input Output
GND GND GND
Low-pass Filter
Ri/o = 68
Cline = 100 pF
Ω
www.st.com
Electrical characteristics EMIF02-MIC03F2
2/8 DocID11739 Rev 3
1 Electrical characteristics
Table 1. Absolute maximum ratings (TAMB = 25 °C)
Symbol Parameter Value Unit
Tj Maximum junction temperature 125 °C
Top Operating temperature range -40 to +85 °C
Tstg Storage temperature range -55 to +150 °C
Table 2. Electrical characteristics (Tamb = 25 °C)
Symbol Parameters
VBR Breakdown voltage
IRM Leakage current @ VRM
VRM Stand-off voltage
VCL Clamping voltage
RdDynamic impedance
IPP Peak pulse current
RI/O Series resistance between Input & Output
Cline Input capacitance per line
Table 3.
Symbol Test condition Min Typ Max Unit
VBR IR = 1 mA 6 8 V
IRM VRM = 3 V per line 500 nA
RI/O Tolerance ± 20% 68 Ω
Cline VR = 0 V 100 pF
I
V
IPP
VCL
VBRVRM
IR
IRM
IRM
IR
IPP
VRMVBR
VCL
DocID11739 Rev 3 3/8
EMIF02-MIC03F2 Electrical characteristics
8
Figure 6. Line capacitance versus applied voltage.
Figure 2. Attenuation simulation with
1 kΩ input and 10 kΩ ouput
Figure 3. Analog crosstalk measurements
db
10 100 1k 10k 100k 1M 10M 100M 1G
-80
-70
-60
-50
-40
-30
-20
-10
0
F (Hz)
Input: 1 k
Ω
Ω
Output: 10 k
AC simulations
50Ωmeasurements
50Ωsimulations
100.0k 1.0M 10.0M 100.0M 1.0G
-80.00
-70.00
-60.00
-50.00
-40.00
-30.00
-20.00
-10.00
0.00
dB
f/Hz
100.0k 1.0M 10.0M 100.0M 1.0G
-80.00
-70.00
-60.00
-50.00
-40.00
-30.00
-20.00
-10.00
0.00
dB
f/Hz
Figure 4. ESD response to IEC61000-4-2 (+15kV
air discharge) on one input V(in) and one output
V(out)
Figure 5. ESD response to IEC61000-4-2
(–15kV air discharge) on one input V(in) and
one output V(out)
0
20
40
60
80
100
120
140
012345
V(V)R
F=1MHz
Vosc=30mV
RMS
Tj=25°C
C(pF)
Electrical characteristics EMIF02-MIC03F2
4/8 DocID11739 Rev 3
Figure 7. Aplac mode
Figure 8. Aplac parameters
Model D1
CJO=Cdiode1
BV=7
IBV=1u
IKF=1000
IS=10f
ISR=100p
N=1
M=0.3333
RS=0.7
VJ=0.6
TT=50n
Model D3
CJO=Cdiode3
BV=7
IBV=1u
IKF=1000
IS=10f
ISR=100p
N=1
M=0.3333
RS=0.12
VJ=0.6
TT=50n
Model D2
CJO=Cdiode2
BV=7
IBV=1u
IKF=1000
IS=10f
ISR=100p
N=1
M=0.3333
RS=0.3
VJ=0.6
TT=50n
aplacvar Rmic 68
aplacvar Lmic 10p
aplacvar Cdiode1 100pF
aplacvar Cdiode2 3.6pF
aplacvar Cdiode3
1.17nF
aplacvar Lbump 50pH
aplacvar Rbump 20m
aplacvar Rsub 0.5m
aplacvar Rgnd 10m
aplacvar Lgnd 50pH
aplacvar Cgnd 0.15pF
aplacvar Lsub 10pH
DocID11739 Rev 3 5/8
EMIF02-MIC03F2 Ordering information scheme
8
2 Ordering information scheme
Figure 9. Ordering information scheme
3 Package information
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK® is an ST trademark.
Figure 10. Flip Chip dimensions
EMIF yy - xxx zz Fx
EMI Filter
Number of lines
Information
Package
x = resistance value (Ohms)
z = capacitance value / 10 (pF)
or
3 letters = application
2 digits = version
F = Flip Chip
x = 2: Lead-free, pitch = 500 µm
1.07mm ± 50µm
1.47mm ± 50µm
500µm ± 15
315µm ± 50
500µm ± 10
250µm ± 10
650µm ± 50
Ordering information EMIF02-MIC03F2
6/8 DocID11739 Rev 3
Figure 13. Flip Chip tape and reel specification
4 Ordering information
Note: More packing information is available in the applications note:
AN1235: “Flip Chip: package description and recommendations for use”
AN 1751: “EMI filters: Recomendations and measurements”
Figure 11. Footprint Figure 12. Marking
Copper pad Diameter:
250 µm recommended, 300 µm max
Solder stencil opening: 330 µm
Solder mask opening recommendation:
340 µm min for 315 µm copper pad diameter
x
y
x
w
z
w
Dot, ST logo
xx = marking
z = manufacturing location
yww = datecode
(y = year ww = week) E
User direction of unreeling
All dimensions in mm
4.0 ± 0.1
2.0 ± 0.05
8.0 ± 0.3
2.0 ± 0.1
1.75 ± 0.1
3.5 ±- 0.05
Ø 1.55 ± 0.05
0.55 ± 0.1
0.20 ± 0.05
xxz
yww
ST
E
xxz
yww
ST
E
xxz
yww
ST
E
Dot identifying Pin A1 location
Table 4. Ordering information
Order code Marking Package Weight Base qty Delivery mode
EMIF02-MIC03F2 FW Flip Chip 2.1 mg 5000 Tape and reel (7”)
DocID11739 Rev 3 7/8
EMIF02-MIC03F2 Revision history
8
5 Revision history
Table 5. Document revision history
Date Revision Changes
14-Oct-2006 1 Initial release
31-Mar-2014 2 Reformatted to current standards. Added ECOPACK statement. Updated
Figure 2 and Figure 13.
18/07/2014 3 Updated typo error on Features.
EMIF02-MIC03F2
8/8 DocID11739 Rev 3
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