FDS6612A Single N-Channel, Logic-Level, PowerTrench MOSFET General Description Features This N-Channel Logic Level MOSFET is produced using Fairchild Semiconductor's advanced PowerTrench process that has been especially tailored to minimize the on-state resistance and yet maintain superior switching performance. * 8.4 A, 30 V. RDS(ON) = 22 m @ VGS = 10 V RDS(ON) = 30 m @ VGS = 4.5 V * Fast switching speed * Low gate charge These devices are well suited for low voltage and battery powered applications where low in-line power loss and fast switching are required. * High performance trench technology for extremely low RDS(ON) * High power and current handling capability DD DD DD DD G SS G S SS S SO-8 Pin 1 SO-8 Absolute Maximum Ratings Symbol Drain-Source Voltage VGSS Gate-Source Voltage ID Drain Current - Continuous (Note 1a) - Pulsed TJ, TSTG 6 3 7 2 8 1 Ratings Units 30 V 20 V 8.4 A 40 Power Dissipation for Single Operation PD 4 TA=25oC unless otherwise noted Parameter VDSS 5 (Note 1a) 2.5 (Note 1b) 1.0 Operating and Storage Junction Temperature Range W -55 to +150 C C/W Thermal Characteristics RJA Thermal Resistance, Junction-to-Ambient (Note 1a) 50 RJA Thermal Resistance, Junction-to-Ambient (Note 1b) 125 RJC Thermal Resistance, Junction-to-Case (Note 1) 25 Package Marking and Ordering Information Device Marking Device Reel Size Tape width Quantity FDS6612A FDS6612A 13'' 12mm 2500 units 2003 Fairchild Semiconductor Corporation FDS6612A Rev D (W) FDS6612A June 2003 Symbol TA = 25C unless otherwise noted Parameter Test Conditions Min Typ Max Units Off Characteristics BVDSS BVDSS TJ IDSS Drain-Source Breakdown Voltage Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current VGS = 0 V, ID = 250 A 30 ID = 250 A, Referenced to 25C VDS = 24 V, V 26 VGS = 0 V VDS = 24 V, VGS = 0 V, TJ=55C IGSS VGS = 20 V, Gate-Body Leakage On Characteristics VDS = 0 V mV/C 1 A 10 A 100 nA 3 V (Note 2) VGS(th) VGS(th) TJ RDS(on) Gate Threshold Voltage Gate Threshold Voltage Temperature Coefficient Static Drain-Source On-Resistance VDS = VGS, ID = 250 A ID = 250 A, Referenced to 25C ID(on) On-State Drain Current VGS = 10 V, VDS = 5 V gFS Forward Transconductance VDS = 15 V, ID = 8.4 A 30 S VDS = 15 V, f = 1.0 MHz V GS = 0 V, 560 pF 1 1.9 -4.4 VGS = 10 V, ID = 8.4 A VGS = 4.5 V, ID = 7.2 A VGS= 10 V, ID = 8.4 A, TJ=125C 19 24 25 mV/C 22 30 37 20 m A Dynamic Characteristics Ciss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance RG Gate Resistance VGS = 15 mV, f = 1.0 MHz Switching Characteristics td(on) Turn-On Delay Time tr Turn-On Rise Time td(off) Turn-Off Delay Time tf Turn-Off Fall Time Qg Total Gate Charge Qgs Gate-Source Charge Qgd Gate-Drain Charge 140 pF 55 pF 2.5 (Note 2) VDD = 15 V, VGS = 10 V, VDS = 15 V, VGS = 5 V ID = 1 A, RGEN = 6 ID = 8.4 A, 7 14 ns 5 10 ns 22 35 ns 3 6 ns 5.4 7.6 nC 1.7 nC 1.9 nC Drain-Source Diode Characteristics and Maximum Ratings IS VSD trr Qrr Maximum Continuous Drain-Source Diode Forward Current Drain-Source Diode Forward VGS = 0 V, IS = 2.1 A (Note 2) Voltage Diode Reverse Recovery Time IF = 8.4 A, diF/dt = 100 A/s Diode Reverse Recovery Charge 0.77 2.1 A 1.2 V 19 nS 9 nC Notes: 1. RJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RJC is guaranteed by design while RCA is determined by the user's board design. a) 50C/W when mounted on a 1in2 pad of 2 oz copper b) 125C/W when mounted on a minimum pad. Scale 1 : 1 on letter size paper 2 Test: Pulse Width < 300s, Duty Cycle < 2.0% FDS6612A Rev D (W) FDS6612A Electrical Characteristics FDS6612A Typical Characteristics 2 40 VGS = 3.5V 4.5V RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE VGS = 10V ID, DRAIN CURRENT (A) 4.0V 30 6.0V 20 3.5V 10 3.0V 0 0.5 1 1.5 2 2.5 VDS, DRAIN TO SOURCE VOLTAGE (V) 4.0V 1.4 4.5V 5.0V 1.2 6.0V 10V 1 3 0 Figure 1. On-Region Characteristics. 10 20 ID, DRAIN CURRENT (A) 30 40 Figure 2. On-Resistance Variation with Drain Current and Gate Voltage. 0.1 1.6 ID = 8.4A VGS = 10V ID = 4.2A RDS(ON), ON-RESISTANCE (OHM) RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE 1.6 0.8 0 1.4 1.2 1 0.8 0.6 0.08 0.06 TA = 125oC 0.04 TA = 25oC 0.02 0 -50 -25 0 25 50 75 100 TJ, JUNCTION TEMPERATURE (oC) 125 150 2 Figure 3. On-Resistance Variation with Temperature. 4 6 8 VGS, GATE TO SOURCE VOLTAGE (V) 10 Figure 4. On-Resistance Variation with Gate-to-Source Voltage. 40 100 VGS = 0V IS, REVERSE DRAIN CURRENT (A) VDS = 5V ID, DRAIN CURRENT (A) 1.8 30 20 TA = 125oC o -55 C 10 10 1 o TA = 125 C 0.1 25oC 0.01 o -55 C 0.001 25oC 0.0001 0 1.5 2 2.5 3 3.5 VGS, GATE TO SOURCE VOLTAGE (V) 4 Figure 5. Transfer Characteristics. 4.5 0 0.2 0.4 0.6 0.8 1 VSD, BODY DIODE FORWARD VOLTAGE (V) 1.2 Figure 6. Body Diode Forward Voltage Variation with Source Current and Temperature. FDS6612A Rev D (W) FDS6612A Typical Characteristics 800 f = 1 MHz VGS = 0 V ID = 8.4A 8 VDS = 10V 600 CAPACITANCE (pF) VGS, GATE-SOURCE VOLTAGE (V) 10 20V 6 15V 4 Ciss 400 Coss 200 2 Crss 0 0 0 2 4 6 8 Qg, GATE CHARGE (nC) 10 0 12 Figure 7. Gate Charge Characteristics. 25 30 50 P(pk), PEAK TRANSIENT POWER (W) 100s RDS(ON) LIMIT 1ms 10ms 100ms 10 1s 10s 1 DC VGS = 10V SINGLE PULSE RJA = 125oC/W 0.1 o TA = 25 C 0.01 0.01 0.1 1 10 VDS, DRAIN-SOURCE VOLTAGE (V) 100 SINGLE PULSE o RJA = 125 C/W 40 TA = 25oC 30 20 10 0 0.001 Figure 9. Maximum Safe Operating Area. r(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE 10 15 20 VDS, DRAIN TO SOURCE VOLTAGE (V) Figure 8. Capacitance Characteristics. 100 ID, DRAIN CURRENT (A) 5 0.01 0.1 1 t1, TIME (sec) 10 100 Figure 10. Single Pulse Maximum Power Dissipation. 1 D = 0.5 RJA(t) = r(t) * RJA 0.2 0.1 o RJA = 125 C/W 0.1 0.05 P(pk) 0.02 0.01 t1 t2 0.01 TJ - TA = P * RJA(t) Duty Cycle, D = t1 / t2 SINGLE PULSE 0.001 0.0001 0.001 0.01 0.1 1 10 100 1000 t1, TIME (sec) Figure 11. Transient Thermal Response Curve. Thermal characterization performed using the conditions described in Note 1c. Transient thermal response will change depending on the circuit board design. FDS6612A Rev D (W) FDS6612A PSPICE Electrical Model N-Channel .SUBCKT FDS6612A 2 1 3 *NOM TEMP=25 DEG C *REV A - JULY 2003 CA 12 8 1E-9 CB 15 14 4.0E-10 CIN 6 8 5.1E-10 LDRAIN DPLCAP DBODY 7 5 DBODYMOD DBREAK 5 11 DBREAKMOD DPLCAP 10 5 DPLCAPMOD DRAIN 2 10 DBREAK + RSLC2 5 51 ESLC 11 - RDRAIN 6 8 EVTHRES + 19 8 + LGATE GATE 1 + 50 ESG IT 8 17 1 EVTEMP RGATE + 18 9 20 22 21 EBREAK 16 17 18 - D BODY MWEAK 6 MMED MSTRO RLGATE LSOURCE CIN 8 RLGATE 1 9 38.4 RLDRAIN 2 5 10 RLSOURCE 3 7 40 SOURC E 3 7 RSOURCE RLSOURCE S1A 12 13 MMED 16 6 8 8 MMEDMOD MSTRO 16 6 8 8 MSTROMOD MWEAK 16 21 8 8 MWEAKMOD RBREAK 17 18 RBREAKMOD 1 RDRAIN 50 16 RDRAINMOD 8E-3 RGATE 9 20 4.2 RLDRAIN RSLC1 51 EBREAK 11 7 17 18 34.2 EDS 14 8 5 8 1 EGS 13 8 6 8 1 ESG 6 10 6 8 1 EVTHRES 6 21 19 8 1 EVTEMP 20 6 18 22 1 LGATE 1 9 3.84E-9 LDRAIN 2 5 1.00E-9 LSOURCE 3 7 4E-9 5 S2A S1B CA 15 14 13 8 RBREAK 17 18 S2B 13 RVTEMP CB 6 8 EGS RSLC1 5 51 RSLCMOD 1E-6 RSLC2 5 50 1E3 RSOURCE 8 7 RSOURCEMOD 7.5E-3 RVTHRES 22 8 RVTHRESMOD 1 RVTEMP 18 19 RVTEMPMOD 1 - 19 VBAT + IT 14 + + 5 8 EDS - 8 22 RVTHRES S1A 6 12 13 8 S1AMOD S1B 13 12 13 8 S1BMOD S2A 6 15 14 13 S2AMOD S2B 13 15 14 13 S2BMOD VBAT 22 19 DC 1 ESLC 51 50 VALUE={(V(5,51)/ABS(V(5,51)))*(PWR(V(5,51)/(1E-6*105),3))} .MODEL DBODYMOD D (IS=7E-15 RS=6.1E-3 N=0.84 TRS1=1.7E-3 TRS2=1.0E-6 + CJO=3.2E-10 TT=10E-9 M=0.5 IKF=0.3 XTI=3.0) .MODEL DBREAKMOD D (RS=1E-1 TRS1=1.12E-3 TRS2=1.25E-6) .MODEL DPLCAPMOD D (CJO=14E-11 IS=1E-30 N=10 M=0.34) .MODEL MWEAKMOD NMOS (VTO=1.82 KP=0.05 IS=1E-30 N=10 TOX=1 L=1U W=1U RG=42 RS=.1) .MODEL MMEDMOD NMOS (VTO=2.1 KP=6 IS=1E-30 N=10 TOX=1 L=1U W=1U RG=4.2) .MODEL MSTROMOD NMOS (VTO=2.55 KP=50 IS=1E-30 N=10 TOX=1 L=1U W=1U) .MODEL RBREAKMOD RES (TC1=0.83E-3 TC2=1E-7) .MODEL RDRAINMOD RES (TC1=6E-3 TC2=5E-6) .MODEL RSLCMOD RES (TC1=2.5E-3 TC2=4.5E-6) .MODEL RSOURCEMOD RES (TC1=1.0E-3 TC2=1E-6) .MODEL RVTHRESMOD RES (TC1=-2.013E-3 TC2=-7E-6) .MODEL RVTEMPMOD RES (TC1=-1.5E-3 TC2=1E-6) .MODEL S1AMOD VSWITCH (RON=1E-5 ROFF=0.1 VON=-4 VOFF=-3) .MODEL S1BMOD VSWITCH (RON=1E-5 ROFF=0.1 VON=-3 VOFF=-4) .MODEL S2AMOD VSWITCH (RON=1E-5 ROFF=0.1 VON=-1.3 VOFF=-0.5) .MODEL S2BMOD VSWITCH (RON=1E-5 ROFF=0.1 VON=-0.5 VOFF=-1.3) .ENDS Note: For further discussion of the PSPICE model, consult A New PSPICE Sub-Circuit for the Power MOSFET Featuring Global Temperature Options; IEEE Power Electronics Specialist Conference Records, 1991, written by William J. Hepp and C. Frank Wheatley. FDS6612A Rev D (W) FDS6612A SPICE Thermal Model .SUBCKT FDS6612A_THERM TH TL *THERMAL MODEL SUBCIRCUIT *REV A - JULY 2003 *MIN PAD RJA th RTHERM1 CTHERM1 CTHERM2 CTHERM3 CTHERM4 CTHERM5 CTHERM6 CTHERM7 CTHERM8 TH 8 7 6 5 4 3 2 8 7 6 5 4 3 2 TL 0.005 0.05 0.10 0.35 0.45 0.50 0.55 3.00 RTHERM1 RTHERM2 RTHERM3 RTHERM4 RTHERM5 RTHERM6 RTHERM7 RTHERM8 TH 8 7 6 5 4 3 2 8 7 6 5 4 3 2 TL 5.000 6.250 7.500 8.750 10.625 11.875 31.250 43.750 .ENDS JUNCTION CTHERM1 8 RTHERM2 CTHERM2 7 RTHERM3 CTHERM3 6 RTHERM4 CTHERM4 5 RTHERM5 CTHERM5 4 CTHERM6 RTHERM6 3 CTHERM7 RTHERM7 2 CTHERM8 RTHERM8 tl AMBIENT FDS6612A Rev D (W) TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACExTM FACT Quiet SeriesTM ActiveArrayTM FAST BottomlessTM FASTrTM CoolFETTM FRFETTM CROSSVOLTTM GlobalOptoisolatorTM DOMETM GTOTM EcoSPARKTM HiSeCTM E2CMOSTM I2CTM TM EnSigna ImpliedDisconnectTM FACTTM ISOPLANARTM Across the board. Around the world.TM The Power FranchiseTM Programmable Active DroopTM LittleFETTM MICROCOUPLERTM MicroFETTM MicroPakTM MICROWIRETM MSXTM MSXProTM OCXTM OCXProTM OPTOLOGIC OPTOPLANARTM PACMANTM POPTM Power247TM PowerTrench QFET QSTM QT OptoelectronicsTM Quiet SeriesTM RapidConfigureTM RapidConnectTM SILENT SWITCHER SMART STARTTM SPMTM StealthTM SuperSOTTM-3 SuperSOTTM-6 SuperSOTTM-8 SyncFETTM TinyLogic TINYOPTOTM TruTranslationTM UHCTM UltraFET VCXTM DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component is any component of a life 1. Life support devices or systems are devices or support device or system whose failure to perform can systems which, (a) are intended for surgical implant into be reasonably expected to cause the failure of the life the body, or (b) support or sustain life, or (c) whose support device or system, or to affect its safety or failure to perform when properly used in accordance with instructions for use provided in the labeling, can be effectiveness. reasonably expected to result in significant injury to the user. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Product Status Definition Advance Information Formative or In Design This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. Preliminary First Production This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. No Identification Needed Full Production This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. Rev. I5