Data sheet acquired from Cypress Semiconductor Corporation. Data sheet modified to remove devices not offered. CY74FCT16823T CY74FCT162823T 18-Bit Registers SCCS062B - August 1994 - Revised September 2001 Features Functional Description * Ioff supports partial-power-down mode operation * Edge-rate control circuitry for significantly improved noise characteristics * Typical output skew < 250 ps * ESD > 2000V * TSSOP (19.6-mil pitch) and SSOP (25-mil pitch) packages * Industrial temperature range of -40C to +85C * VCC = 5V 10% CY74FCT16823T Features: * 64 mA sink current, 32 mA source current * Typical VOLP (ground bounce) <1.0V at VCC = 5V, TA = 25C CY74FCT162823T Features: * Balanced 24 mA output drivers * Reduced system switching noise * Typical VOLP (ground bounce) <0.6V at VCC = 5V, TA = 25C The CY74FCT16823T and the CY74FCT162823T 18-bit bus interface registers are designed for use in high-speed, low-power systems needing wide registers and parity. 18-bit operation is achieved by connecting the control lines of the two 9-bit registers. Flow-through pinout and small shrink packaging aids in simplifying board layout. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. The CY74FCT16823T is ideally suited for driving high-capacitance loads and low-impedance backplanes. The CY74FCT162823T has 24-mA balanced output drivers with current limiting resistors in the outputs. This reduces the need for external terminating resistors and provides for minimal undershoot and reduced ground bounce. The CY74FCT162823T is ideal for driving transmission lines. Logic Block Diagrams Pin Configuration SSOP/TSSOP Top View 1OE 1CLR 1CLK 1CLKEN R C D 1Q1 1D1 FCT16823-1 TO 8 OTHER CHANNELS 2OE 2CLR 2CLK 2CLKEN R C D 2Q1 2D2 TO 8 OTHER CHANNELS 1CLR 1 56 1CLK 1OE 2 55 1CLKEN 1D1 1Q1 3 54 GND 4 53 GND 1Q 2 5 52 1D2 1D3 1Q 3 6 51 VCC 7 50 VCC 1Q4 8 49 1D4 1Q5 9 48 1D5 1Q 6 10 47 1D6 GND 11 46 GND 1Q7 12 45 1 D7 1Q 8 13 44 1 D8 1Q 9 14 43 1D9 2Q1 42 2D1 2Q2 15 16 41 2D2 2Q3 17 40 2D3 GND 18 39 GND 2Q4 19 38 2D4 2Q5 20 37 2D5 2D6 2Q6 21 36 VCC 22 35 VCC 2Q7 23 34 2 D7 2Q8 24 25 33 2 D8 GND 32 GND 2Q9 26 31 2D9 2OE 27 30 2CLKEN 2CLR 28 29 2CLK FCT16823-3 FCT16823-2 Copyright (c) 2001, Texas Instruments Incorporated CY74FCT16823T CY74FCT162823T Function Table[1] Pin Description Name Description Inputs Outputs D Data Inputs OE CLR CLKEN CLK D Q Function CLK Clock Inputs H X X X X Z High Z CLKEN Clock Enable Inputs (Active LOW) L L X X X L Clear X [2] Hold CLR Asynchronous Clear Inputs (Active LOW) L H H X Q OE Output Enable Inputs (Active LOW) H H L L Z Q Three-State Outputs H H L H Z L H L L L L H L H H Load Maximum Ratings[3, 4] (Above which the useful life may be impaired. For user guidelines, not tested.) Power Dissipation .......................................................... 1.0W Storage Temperature ..................................... -55C to +125C Static Discharge Voltage............................................>2001V (per MIL-STD-883, Method 3015) Ambient Temperature with Power Applied .................................................. -55C to +125C Operating Range DC Input Voltage .................................................-0.5V to +7.0V Range DC Output Voltage ..............................................-0.5V to +7.0V Industrial DC Output Current (Maximum Sink Current/Pin) ...........................-60 to +120 mA Ambient Temperature VCC -40C to +85C 5V 10% Notes: 1. H = HIGH Voltage Level. L = LOW Voltage Level. X = Don't Care. Z = HIGH Impedance. =LOW-to-HIGH transition. 2. Output level before indicated steady-state input conditions were established. 3. Operation beyond the limits set forth may impair the useful life of the device. Unless otherwise noted, these limits are over the operating free-air temperature range. 4. Unused inputs must always be connected to an appropriate logic voltage level, preferably either VCC or ground. 2 CY74FCT16823T CY74FCT162823T Electrical Characteristics Over the Operating Range Parameter Description VIH Input HIGH Voltage VIL Input LOW Voltage Test Conditions Min. Typ.[5] Max. 2.0 V 0.8 [6] VH Input Hysteresis VIK Input Clamp Diode Voltage VCC=Min., IIN=-18 mA IIH Input HIGH Current IIL Unit 100 mV -1.2 V VCC=Max., VI=VCC 1 A Input LOW Current VCC=Max., VI=GND 1 A IOZH High Impedance Output Current (Three-State Output pins) VCC=Max., VOUT=2.7V 1 A IOZL High Impedance Output Current (Three-State Output pins) VCC=Max., VOUT=0.5V 1 A IOS Short Circuit Current[7] VCC=Max., VOUT=GND -80 -200 mA Current[7] VCC=Max., VOUT=2.5V -50 -180 mA 1 A Max. Unit IO IOFF Output Drive Power-Off Disable VCC=0V, -0.7 V -140 VOUT4.5V[8] Output Drive Characteristics for CY74FCT16823T Parameter VOH VOL Min. Typ.[5] VCC=Min., IOH=-3 mA 2.5 3.5 VCC=Min., IOH=-15 mA 2.4 3.5 VCC=Min., IOH=-32 mA 2.0 3.0 Description Output HIGH Voltage Output LOW Voltage Test Conditions VCC=Min., IOL=64 mA V 0.2 0.55 V Min. Typ.[5] Output Drive Characteristics for CY74FCT162823T Parameter Max. Unit Output LOW Voltage[7] VCC=5V, VIN=VIH or VIL, VOUT=1.5V 60 115 150 mA IODH Output HIGH Voltage[7] VCC=5V, VIN=VIH or VIL, VOUT=1.5V -60 -115 -150 mA VOH Output HIGH Voltage VCC=Min., IOH=-24 mA 2.4 3.3 VOL Output LOW Voltage VCC=Min., IOL=24 mA IODL Description Test Conditions V 0.3 0.55 V Typ.[5] Capacitance[9] (TA = +25C, f = 1.0 MHz) Parameter Description Test Conditions Max. Unit CIN Input Capacitance VIN = 0V 4.5 6.0 pF COUT Output Capacitance VOUT = 0V 5.5 8.0 pF Notes: 5. Typical values are at VCC= 5.0V, TA= +25C ambient. 6. This input is specified but not tested. 7. Not more than one output should be shorted at a time. Duration of short should not exceed one second. The use of high-speed test apparatus and/or sample and hold techniques are preferable in order to minimize internal chip heating and more accurately reflect operational values. Otherwise prolonged shorting of a high output may raise the chip temperature well above normal and thereby cause invalid readings in other parametric tests. In any sequence of parameter tests, IOS tests should be performed last. 8. Tested at +25C. 9. This parameter is specified but not tested. 3 CY74FCT16823T CY74FCT162823T Power Supply Characteristics Parameter Test Conditions[10] Description Min. Typ.[5] Max. Unit ICC Quiescent Power Supply Current VCC=Max. VIN<0.2V VIN>VCC-0.2V -- 5 500 A ICC Quiescent Power Supply Current (TTL inputs HIGH) VCC=Max. VIN=3.4V[11] -- 0.5 1.5 mA ICCD Dynamic Power Supply Current[12] VCC=Max., One Input Toggling, 50% Duty Cycle, Outputs Open, OE=CLKEN=GND VIN=VCC or VIN=GND -- 75 120 A/ MHz IC Total Power Supply Current[13] VCC=Max., f0=10 MHz, 50% Duty Cycle, Outputs Open, One Bit Toggling, OE=CLKEN=GND at f1=5 MHz VIN=VCC or VIN=GND -- 0.8 1.7 mA VIN=3.4V or VIN=GND -- 1.3 3.2 VCC=Max., at f1=2.5 MHz, 50% Duty Cycle, Outputs Open, Eighteen Bits Toggling, OE=CLKEN=GND f0=10 MHz VIN=VCC or VIN=GND -- 4.2 7.1[14] VIN=3.4V or VIN=GND -- 9.2 22.1[14] Notes: 10. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type. 11. Per TTL driven input (VIN=3.4V); all other inputs at VCC or GND. 12. This parameter is not directly testable, but is derived for use in Total Power Supply calculations. = IQUIESCENT + IINPUTS + IDYNAMIC 13. IC IC = ICC+ICCDHNT+ICCD(f0/2 + f1N1) ICC = Quiescent Current with CMOS input levels ICC = Power Supply Current for a TTL HIGH input (VIN=3.4V) = Duty Cycle for TTL inputs HIGH DH = Number of TTL inputs at DH NT ICCD = Dynamic Current caused by an input transition pair (HLH or LHL) = Clock frequency for registered devices, otherwise zero f0 = Input signal frequency f1 = Number of inputs changing at f1 N1 All currents are in milliamps and all frequencies are in megahertz. 14. Values for these conditions are examples of the ICC formula. These limits are specified but not tested. 4 CY74FCT16823T CY74FCT162823T Switching Characteristics Over the Operating Range[15] CY74FCT16823AT CY74FCT162823AT Parameter tPLH tPHL Description Condition[16] Min. Max. Unit Fig.No.[16] CL=50 pF RL=500 1.5 10.0 ns 1, 5 CL=300 pF[17] RL=500 1.5 20.0 Propagation Delay CLK to Q tPHL Propagation Delay CLR to Q CL=50 pF RL=500 1.5 14.0 ns 1, 5 tPZH tPZL Output Enable Time OE to Q CL=50 pF RL=500 1.5 12.0 ns 1, 7, 8 CL=300 pF[17] RL=500 1.5 23.0 CL=5 pF[17] RL=500 1.5 7.0 ns 1, 7, 8 CL=50 pF RL=500 1.5 8.0 CL=50 pF RL=500 3.0 -- ns 4 tPHZ tPLZ Output Disable Time OE to Q tSU Set-Up Time HIGH or LOW, D to CLK tH Hold Time HIGH or LOW, D to CLK 1.5 -- ns 4 tSU Set-Up Time HIGH or LOW, CLKEN to CLK 3.0 -- ns 9 tH Hold Time HIGH or LOW CLKEN to CLK 0.0 -- ns 9 tW CLK Pulse Width HIGH or LOW 6.0 -- ns 5 tW CLR Pulse Width LOW 6.0 -- ns 5 tREM Recovery Time CLR to CLK 6.0 -- ns 6 -- 0.5 ns -- tSK(O) Output Skew[18] Switching Characteristics Over the Operating Range[15] CY74FCT16823CT CY74FCT162823CT Parameter tPLH tPHL Description Propagation Delay CLK to Q Condition[16] Min. Max. Unit Fig.No.[16] CL=50 pF RL=500 1.5 6.0 ns 1, 5 CL=300 pF[17] RL=500 1.5 12.5 tPHL Propagation Delay CLR to Q CL=50 pF RL=500 1.5 6.1 ns 1, 5 tPZH tPZL Output Enable Time OE to Q CL=50 pF RL=500 1.5 5.5 ns 1, 7, 8 CL=300 pF[17] RL=500 1.5 12.5 CL=5 pF[17] RL=500 1.5 5.2 ns 1, 7, 8 CL=50 pF RL=500 1.5 6.5 tPHZ tPLZ Output Disable Time OE to Q 5 CY74FCT16823T CY74FCT162823T Switching Characteristics Over the Operating Range[15] (continued) CY74FCT16823CT CY74FCT162823CT Parameter Description Condition[16] Min. Max. Unit Fig.No.[16] CL=50 pF RL=500 2.0 -- ns 4 tSU Set-Up Time HIGH or LOW, D to CLK tH Hold Time HIGH or LOW, D to CLK 1.5 -- ns 4 tSU Set-Up Time HIGH or LOW, CLKEN to CLK 3.0 -- ns 9 tH Hold Time HIGH or LOW CLKEN to CLK 0.0 -- ns 9 tW CLK Pulse Width HIGH or LOW 3.3 -- ns 5 tW CLR Pulse Width LOW 3.3 -- ns 5 tREM Recovery Time CLR to CLK 6.0 -- ns 6 tSK(O) Output Skew[18] -- 0.5 ns -- Notes: 15. Minimum limits are specified but not tested on Propagation Delays. 16. See "Parameter Measurement Information" in the General Information section. 17. These limits are specified but not tested. 18. Skew between any two outputs of the same package switching in the same direction. This parameter is ensured by design. Ordering Information CY74FCT16823 Speed (ns) 6.0 10.0 Ordering Code Package Name Package Type CY74FCT16823CTPACT Z56 56-Lead (240-Mil) TSSOP CY74FCT16823CTPVC/PVCT O56 56-Lead (300-Mil) SSOP CY74FCT16823ATPACT Z56 56-Lead (240-Mil) TSSOP Operating Range Industrial Industrial Ordering Information CY74FCT162823 Speed (ns) 6.0 10.0 Ordering Code Package Name Package Type 74FCT162823CTPACT Z56 56-Lead (240-Mil) TSSOP CY74FCT162823CTPVC O56 56-Lead (300-Mil) SSOP 74FCT162823CTPVCT O56 56-Lead (300-Mil) SSOP 74FCT162823ATPACT Z56 56-Lead (240-Mil) TSSOP 6 Operating Range Industrial Industrial CY74FCT16823T CY74FCT162823T Package Diagrams 56-Lead Shrunk Small Outline Package O56 56-Lead Thin Shrunk Small Outline Package Z56 7 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are sold subject to TI's terms and conditions of sale supplied at the time of order acknowledgment. TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI's standard warranty. Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty. Except where mandated by government requirements, testing of all parameters of each product is not necessarily performed. TI assumes no liability for applications assistance or customer product design. Customers are responsible for their products and applications using TI components. To minimize the risks associated with customer products and applications, customers should provide adequate design and operating safeguards. TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right, copyright, mask work right, or other TI intellectual property right relating to any combination, machine, or process in which TI products or services are used. Information published by TI regarding third-party products or services does not constitute a license from TI to use such products or services or a warranty or endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual property of the third party, or a license from TI under the patents or other intellectual property of TI. Reproduction of information in TI data books or data sheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties, conditions, limitations, and notices. Reproduction of this information with alteration is an unfair and deceptive business practice. TI is not responsible or liable for such altered documentation. Resale of TI products or services with statements different from or beyond the parameters stated by TI for that product or service voids all express and any implied warranties for the associated TI product or service and is an unfair and deceptive business practice. TI is not responsible or liable for any such statements. Mailing Address: Texas Instruments Post Office Box 655303 Dallas, Texas 75265 Copyright 2001, Texas Instruments Incorporated