SPICE Device Model Si2302DS Vishay Siliconix N-Channel 1.25-W, 2.5-V Rated MOSFET CHARACTERISTICS * N-Channel Vertical DMOS * Macro Model (Subcircuit Model) * Level 3 MOS * Apply for both Linear and Switching Application * Accurate over the -55 to 125C Temperature Range * Model the Gate Charge, Transient, and Diode Reverse Recovery Characteristics DESCRIPTION The attached spice model describes the typical electrical characteristics of the n-channel vertical DMOS. The subcircuit model is extracted and optimized over the -55 to 125C temperature ranges under the pulsed 0-to-5V gate drive. The saturated output impedance is best fit at the gate bias near the threshold voltage. A novel gate-to-drain feedback capacitance network is used to model the gate charge characteristics while avoiding convergence difficulties of the switched Cgd model. All model parameter values are optimized to provide a best fit to the measured electrical data and are not intended as an exact physical interpretation of the device. SUBCIRCUIT MODEL SCHEMATIC This document is intended as a SPICE modeling guideline and does not constitute a commercial product data sheet. Designers should refer to the appropriate data sheet of the same number for guaranteed specification limits. Document Number: 70983 17-Apr-01 www.vishay.com 1 SPICE Device Model Si2302DS Vishay Siliconix SPECIFICATIONS (TJ = 25C UNLESS OTHERWISE NOTED) Parameter Symbol Test Conditions Typical Unit VGS(th) VDS = VGS, ID = 250 A 0.91 V VDS 5 V, VGS = 4.5 V 62 VDS 5 V, VGS = 2.5 V 16 VGS = 4.5 V, ID = 3.6 A 0.071 VGS = 2.5 V, ID = 3.1 A 0.081 Static Gate Threshold Voltage a On-State Drain Current ID(on) a Drain-Source On-State Resistance a Forward Transconductance a Diode Forward Voltage rDS(on) A gfs VDS = 5 V, ID = 3.6 A 11 S VSD IS = 1.6 A, VGS = 0 V 0.79 V VDS = 10 V, VGS = 4.5 V, ID = 3.6 A 0.65 Dynamic Total Gate Charge Qg Gate-Source Charge Qgs 4.9 Gate-Drain Charge Qgd 1.60 Input Capacitance Ciss 336 Output Capacitance Coss Reverse Transfer Capacitance Crss 40 Turn-On Delay Time td(on) 8 Rise Time Turn-Off Delay Time Fall Time tr td(off) tf VDS = 10 V, VGS = 0 V, f = 1 MHz VDD = 10 V, RL = 5.5 ID 3.6 A, VGEN = 4.5 V, RG = 6 113 nC pf 12 ns 21 30 Notes a. Pulse test; pulse width 300 s, duty cycle 2% www.vishay.com 2 Document Number: 70983 17-Apr-01 SPICE Device Model Si2302DS Vishay Siliconix COMPARISON OF MODEL WITH MEASURED DATA (TJ=25C UNLESS OTHERWISE NOTED) Document Number: 70983 17-Apr-01 www.vishay.com 3