SN65LBC171, SN75LBC171
TRIPLE DIFFERENTIAL TRANSCEIVERS
SLLS460A – NOVEMBER 2000 – REVISED FEBRUAR Y 2001
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
D
Three Differential Transceivers in One
Package
D
Signaling Rates1 Up to 30 Mbps
D
Low Power and High Speed
D
Designed for TIA/EIA-485, TIA/EIA-422, ISO
8482, and ANSI X3.277 (HVD SCSI Fast–20)
Applications
D
Common-Mode Bus Voltage Range
–7 V to 12 V
D
ESD Protection on Bus Terminals
Exceeds 12 kV
D
Driver Output Current up to ±60 mA
D
Thermal Shutdown Protection
D
Driver Positive and Negative Current
Limiting
D
Power-Up, Power-Down Glitch-Free
Operation
D
Pin-Compatible With the SN75ALS171
D
Available in Shrink Small-Outline Package
description
The SN65LBC171 and SN75LBC171 are
monolithic integrated circuits designed for
bidirectional data communication on multipoint
bus-transmission lines. Potential applications
include serial or parallel data transmission, cabled
peripheral buses with twin axial, ribbon, or
twisted-pair cabling. These devices are suitable
for FAST–20 SCSI and can transmit or receive
data pulses as short as 25 ns, with skew less than
3 ns.
These devices combine three 3-state differential
line drivers and three differential input line
receivers, all of which operate from a single 5-V
power supply.
The driver differential outputs and the receiver differential inputs are connected internally to form three
differential input/output (I/O) bus ports that are designed to offer minimum loading to the bus whenever the driver
is disabled or VCC = 0. These ports feature a wide common-mode voltage range making the device suitable for
party-line applications over long cable runs.
The SN75LBC171 is characterized for operation over the temperature range of 0°C to 70°C. The SN65LBC171
is characterized for operation over the temperature range of –40°C to 85°C.
Copyright 2001, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
1The signaling rate of a line is the number of voltage transitions that are made per second expressed in the units bps (bits per second).
logic diagram
1R
1DE
1D
GND
GND
2R
2DE
2D
3R
3DE
1B
1A
RE
CDE
VCC
2B
2A
3B
3A
3D
SN65LBC171DB (Marked as BL171)
SN75LBC171DB (Marked as LB171)
SN65LBC171DW (Marked as 65LBC171)
SN75LBC171DW (Marked as 75LBC171)
(TOP VIEW)
CDE
1A
1DE
1D
RE
1R
2DE
2D
3DE
2R
3D
3R
1B
2A
2B
3A
3B
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
SN65LBC171, SN75LBC171
TRIPLE DIFFERENTIAL TRANSCEIVERS
SLLS460A – NOVEMBER 2000 – REVISED FEBRUARY 2001
2POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
AVAILABLE OPTIONS
{
PACKAGE
TAPLASTIC SMALL-OUTLINE
(JEDEC MS-013) PLASTIC SHRINK SMALL-OUTLINE
(JEDEC MO-150)
0°C to 70°C SN75LBC171DW SN75LBC171DB
–40°C to 85°C SN65LBC171DW SN65LBC171DB
†Add R suffix for taped and reel
INPUT
DOUTPUTS
H
L
OPEN
X
X
X
X
EACH DRIVER
A
H
L
L
Z
Z
Z
Z
L
H
H
Z
Z
Z
Z
B
ENABLE DIFFERENTIAL INPUT
(VA–VB)OUTPUT
R
ENABLE
RE
VID ≥ 0.2 V L H
–0.2 V < VID < 0.2 V L ?
VID ≤ –0.2 V L L
XHZ
H = high level, L = low level, X = irrelevant,
Z = high impedance (off), ? = indeterminate
EACH RECEIVER
Function Tables
DE CDE
H
H
H
L
X
OPEN
X
H
H
H
X
L
X
OPEN OPEN LH
equivalent input and output schematic diagrams
VCC
RE INPUT
1 kΩ
8 V
Input
100 kΩ
VCC
D, DE,CDE INPUTS
1 kΩ
8 V
Input
100 kΩ
Output
R OUTPUT
VCC
VCC
A INPUT
16 V
16 V
100 kΩ
18 kΩ
4 kΩ
4 kΩ
Input
VCC
B INPUT
16 V
16 V 100 kΩ
18 kΩ
4 kΩ
4 kΩ
Input
16 V
16 V
18 kΩ
4 kΩ
4 kΩ
VCC
Output
A AND B OUTPUT
40 Ω
SN65LBC171, SN75LBC171
TRIPLE DIFFERENTIAL TRANSCEIVERS
SLLS460A – NOVEMBER 2000 – REVISED FEBRUARY 2001
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
absolute maximum ratings†
Supply voltage, VCC (see Note 1) –0.3 V to 6 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Voltage range at any bus I/O terminal (steady state) –10 V to 15 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Voltage input range, A and B, (transient pulse through 100 Ω, see Figure 12) –30 V to 30 V. . . . . . . . . . . . . .
Voltage range at any DE, RE, or CDE terminal – 0.5 V to VCC + 0.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Electrostatic discharge: Human body model (A, B, GND) (see Note 2) 12 kV. . . . . . . . . . . . . . . . . . . . . . . . . .
All pins 5 kV. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Charged-device model (all pins) (see Note 3) 1 kV. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous total power dissipation See Power Dissipation Rating Table
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, Tstg –65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds 260°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
†Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only , and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may af fect device reliability.
NOTES: 1. All voltage values, except differential I/O bus voltages, are with respect to network ground terminal.
2. Tested in accordance with JEDEC Standard 22, Test Method A1 14 –A.
3. Tested in accordance with JEDEC Standard 22, Test Method C101.
POWER DISSIPATION RATING TABLE
PACKAGE TA ≤ 25°C
POWER RATING DERATING FACTOR‡
ABOVE TA = 25°CTA = 70°C
POWER RATING TA = 85°C
POWER RATING
DB 995 mW 8.0 mW/°C635 mW 515 mW
DW 1480 mW 11.8 mW/°C950 mW 770 mW
‡This is the inverse of the junction-to-ambient thermal resistance when board-mounted and with no air flow.
recommended operating conditions
MIN NOM MAX UNIT
Supply voltage, VCC 4.75 5 5.25 V
Voltage at any bus I/O terminal A, B –7 12 V
High-level input voltage, VIH
DE CDE RE
2 VCC
V
Low-level input voltage, VIL
DE
,
CDE
,
RE
0 0.8
V
Differential input voltage, VID A with respect to B –12 12 V
Out
p
ut current
Driver –60 60
mA
Output
current
Receiver –8 8
mA
O
p
erating free air tem
p
erature TA
SN75LBC171 0 70
°C
Operating
free
-
air
temperature
,
T
ASN65LBC171 –40 85
°C
SN65LBC171, SN75LBC171
TRIPLE DIFFERENTIAL TRANSCEIVERS
SLLS460A – NOVEMBER 2000 – REVISED FEBRUARY 2001
4POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
DRIVER SECTION
electrical characteristics over recommended operating conditions
PARAMETER TEST CONDITIONS MIN TYP†MAX UNIT
VIK Input clamp voltage D, DE, CDE II = 18 mA –1.5 –0.7 V
VOOpen-circuit output voltage (single-ended) A or B, No load 0 VCC V
St d t t diff ti l t t lt
No load 3.8 4.3 VCC V
|VOD
(
SS
)
|Steady-state differential output voltage
magnitude‡
RL = 54 Ω,See Figure 1 1 1.6 2.4 V
()
magnitude‡
With common-mode loading, See Figure 2 1 1.6 2.4 V
∆VOD Change in differential output voltage
magnitude, | VOD(H) | – |VOD(L) |
R54Ω
–0.2 0.2 V
VOC(SS) Steady-state common-mode output voltage RL = 54 Ω,
CL=50
p
F
See Figure 1 2 2.4 2.8 V
∆VOC(SS) Change in steady-state common-mode
output voltage (VOC(H) – VOC(L))
CL
=
50
F
–0.2 0.2 V
IIInput current D, DE, CDE –100 100 µA
IOOutput current with power off VCC = 0 V, VO = –7 V to 12 V –700 900 µA
IOS Short-circuit output current VO = –7 V to 12 V, See Figure 7 –250 250 mA
ICC Supply current (driver enabled) D at 0 V or VCC,CDE, DE, RE at
VCC, No load 14 20 mA
†All typical values are at VCC = 5 V and TA = 25°C.
‡The minimum VOD may not fully comply with TIA/EIA-485-A at operating temperatures below 0°C. System designers should take the possibly
lower output signal into account in determining the maximum signal-transmission distance.
switching characteristics over recommended operating conditions
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
tPLH Differential output propagation delay, low-to high 4 8.5 12
tPHL Differential output propagation delay , high-to-low 4 8.5 11
trDifferential output rise time
R54Ω
C50pF
3 7.5 11
tfDifferential output fall time
R
L =
54
Ω
,
See Figure 3
C
L =
50
p
F
,37.5 11 ns
tsk(p) Pulse skew | (tPLH – tPHL) |
See
Figure
3
2
tsk(o) Output skew§1.5
tsk(pp) Part-to-part skew2
tPLH Differential output propagation delay, low-to high 3 7 10
tPHL Differential output propagation delay , high-to-low 3 7.5 10
trDifferential output rise time
See Figure 4
3 7.5 12
tfDifferential output fall time
S
ee
Fi
gure
4
,
(HVD SCSI double
-
terminated load)
3 7.5 12 ns
tsk(p) Pulse skew | (tPLH – tPHL) |
(HVD
SCSI
double-terminated
load)
3
tsk(o) Output skew§1.5
tsk(pp) Part-to-part skew2.5
tPZH Output enable time to high level
See Figure 5
15 25
tPHZ Output disable time from high level
See
Figure
5
18 25
tPZL Output enable time to low level
See Figure 6
10 25
tPLZ Output disable time from low level
See
Figure
6
17 25
§Output skew (tsk(o)) is the magnitude of the time delay difference between the outputs of a single device with all of the inputs connected together.
Part-to-part skew (tsk(pp)) is the magnitude of the dif ference in propagation delay times between any specified terminals of two devices when
both devices operate with the same input signals, the same supply voltages, at the same temperature, and have identical packages and test
circuits.
SN65LBC171, SN75LBC171
TRIPLE DIFFERENTIAL TRANSCEIVERS
SLLS460A – NOVEMBER 2000 – REVISED FEBRUARY 2001
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
RECEIVER SECTION
electrical characteristics over recommended operating conditions
PARAMETER TEST CONDITIONS MIN TYP†MAX UNIT
VIT+ Positive-going differential input voltage threshold 0.2
V
VIT–Negative-going differential input voltage threshold –0.2
V
Vhys Hysteresis voltage (VIT+ – VIT–) 40 mV
VOH High-level output voltage VID = 200 mV, IOH = –8 mA , see Figure 10 4 4.7 VCC
V
VOL Low-level output voltage VID = –200 mV, IOL = –8 mA , see Figure 10 0 0.2 0.4
V
II
Line in
p
ut current
Other in
p
ut=0V
VI = 12 V 0.9
mA
I
I
Line
input
current
Other
input
=
0
V
VI = –7 V –0.7
mA
IIInput current RE –100 100 µA
RIInput resistance A, B 12 kΩ
ICC Supply current (receiver enabled) A, B, D open, RE, DE, and CDE at 0 V 16 mA
†All typical values are at VCC = 5 V and TA = 25°C.
switching characteristics over recommended operating conditions
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
tPLH Propagation delay time, low-to-high level output 7 16 ns
tPHL Propagation delay time, high-to-low level output
VID =3Vto3VSeeFigure9
7 16 ns
trReceiver output rise time
V
ID = –
3
V
to
3
V
,
See
Figure
9
1.3 3 ns
tfReceiver output fall time 1.3 3 ns
tPZH Receiver output enable time to high level
See Figure 10
26 40
ns
tPHZ Receiver output disable time from high level
See
Figure
10
40
ns
tPZL Receiver output enable time to low level
See Figure 11
29 40
ns
tPLZ Receiver output enable time to high level
See
Figure
11
40
ns
tsk(p) Pulse skew (| ( tPLH – tPHL |) 2 ns
tsk(o) Output skew
}
1.5 ns
tsk(pp) Part-to-part skew
w
3 ns
‡Output skew (tsk(o)) is the magnitude of the time delay difference between the outputs of a single device with all of the inputs connected together.
§Part-to-part skew (tsk(pp)) is the magnitude of the dif ference in propagation delay times between any specified terminals of two devices when
both devices operate with the same input signals, the same supply voltages, at the same temperature, and have identical packages and test
circuits.
SN65LBC171, SN75LBC171
TRIPLE DIFFERENTIAL TRANSCEIVERS
SLLS460A – NOVEMBER 2000 – REVISED FEBRUARY 2001
6POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
IO
IO
VOD
VOC
II
VO
27 Ω
VO50 pF
{
27 Ω
0 V or 3 V
†Includes probe and jig capacitance
Figure 1. Driver Test Circuit, VOD and VOC Without Common-Mode Loading
375 Ω
VTEST = –7 V to 12 V
VOD
Input 60 Ω375 Ω
VTEST
Figure 2. Driver Test Circuit, VOD With Common-Mode Loading
VOD
RL = 54 Ω
50 Ω
Signal
Generator
{
CL = 50 pF
}
90%
Output 0 V
10%
tf
tr
Input
0 V
3 V
tPHL
1.5 V
tPLH
90% 10%
VOD(H)
VOD(L)
1.5 V
† PRR = 1 MHz, 50% Duty Cycle, tr < 6 ns, tf < 6 ns, Zo = 50 Ω
‡ Includes Probe and Jig Capacitance
Figure 3. Driver Switching Test Circuit and Waveforms, 485-Loading
SN65LBC171, SN75LBC171
TRIPLE DIFFERENTIAL TRANSCEIVERS
SLLS460A – NOVEMBER 2000 – REVISED FEBRUARY 2001
7
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
VOD
75 Ω
50 Ω
Signal
Generator
{
90%
Output 0 V
10%
tf
tr
Input
0 V
3 V
tPHL
1.5 V
tPLH
90% 10%
VOD(H)
VOD(L)
1.5 V
S1
0 V
5 V
375 Ω
165 Ω
165 Ω375 Ω
S2
0 V
5 V
60 pF
}
60 pF
}
† PRR = 1 MHz, 50% Duty Cycle, tr < 6 ns, tf < 6 ns, Zo = 50 Ω
‡ Includes Probe and Jig Capacitance
Figure 4. Driver Switching Test Circuit and Waveforms, HVD SCSI-Loading (double terminated)
Output 2.3 V
Input
0 V
3 V
1.5 V
tPZH 0.5 V
0 V
VOH
tPHZ
S1
50 Ω
Generator
}
0 V or 3 V
{
Input
RL = 110 Ω
Output
CL = 50 pF
w
1.5 V
† 3 V if testing A output, 0 V if testing B output
‡ PRR = 1 MHz, 50% Duty Cycle, tr < 6 ns, tf < 6 ns, Zo = 50 Ω
w
Includes Probe and Jig Capacitance
A
B
Figure 5. Driver Enable/Disable Test, High Output
SN65LBC171, SN75LBC171
TRIPLE DIFFERENTIAL TRANSCEIVERS
SLLS460A – NOVEMBER 2000 – REVISED FEBRUARY 2001
8POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
Output 2.3 V
Input
0 V
3 V
1.5 V
tPZH
0.5 V
5 V
VOL
tPHZ
S1
50 Ω
Generator
}
0 V or 3 V
{
Input
RL = 110 Ω
Output
CL = 50 pF
w
1.5 V
5 V
† 0 V if testing A output, 3 V if testing B output
‡ PRR = 1 MHz, 50% Duty Cycle, tr < 6 ns, tf < 6 ns, Zo = 50 Ω
w
Includes Probe and Jig Capacitance
A
B
Figure 6. Driver Enable/Disable Test, Low Output
Voltage
Source
VO
IOS
Figure 7. Driver Short-Circuit Test
VID
VO
IO
Figure 8. Receiver DC Parameters
VID
IO
50 Ω
Generator
{
CL = 15 pF‡
50 Ω
A
B
R
VO
1.5 V
1.5 V1.5 V
trtf
90% 90%
10%10%
tPLH tPHL
3 V
0 V
VOH
VOL
Input B
Input A
Output
Generator
{
† PRR = 1 MHz, 50% Duty Cycle, tr < 6 ns, tf < 6 ns, Zo = 50 Ω
‡ Includes Probe and Jig Capacitance
Figure 9. Receiver Switching Test Circuit and Waveforms
SN65LBC171, SN75LBC171
TRIPLE DIFFERENTIAL TRANSCEIVERS
SLLS460A – NOVEMBER 2000 – REVISED FEBRUARY 2001
9
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
50 Ω
Generator
{
A
B
R1.5 V
1.5 V
tPZH tPHZ
3 V
0 V
VOH
GND
CL = 15 pF
}
1.5 V 1 kΩ
EN
VCC
1.5 V
VOH –0.5 V
† PRR = 1 MHz, 50% Duty Cycle, tr < 6 ns, tf < 6 ns, Zo = 50 Ω
‡ Includes Probe and Jig Capacitance
Figure 10. Receiver Enable/Disable Test, High Output
50 Ω
Generator
{
A
B
R1.5 V
1.5 V
tPZL tPLZ
3 V
0 V
VCC
CL = 15 pF
}
–1.5 V 1 kΩ
EN
VCC
1.5 V
VOL + 0.5 V
VOL
† PRR = 1 MHz, 50% Duty Cycle, tr < 6 ns, tf < 6 ns, Zo = 50 Ω
‡ Includes Probe and Jig Capacitance
Figure 11. Receiver Enable/Disable Test, Low Output
100 Ω
Pulse
Generator,
15-µs Duration,
1% Duty Cycle
VTEST
–VTEST
15 µs1.5 ms
0 V
Figure 12. Test Circuit and Waveform, Transient Over Voltage Test
SN65LBC171, SN75LBC171
TRIPLE DIFFERENTIAL TRANSCEIVERS
SLLS460A – NOVEMBER 2000 – REVISED FEBRUARY 2001
10 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
Figure 13
0
0.5
1
1.5
2
2.5
3
3.5
4
0 20406080100
VCC = 5.25 V VCC = 5 V
VCC = 4.75 V
– Differential Output Voltage – V
DIFFERENTIAL OUTPUT VOLTAGE
vs
OUTPUT CURRENT
IO – Output Current – mA
VOD
Figure 14
0
0.5
1
1.5
2
2.5
–60 –40 –20 0 20 40 60 80 100
VCC = 5.25 V
VCC = 5 V
VCC = 4.75 V
– Differential Output Voltage – V
DIFFERENTIAL OUTPUT VOLTAGE
vs
FREE-AIR TEMPERATURE
VOD
TA – Free-Air Temperature – °C
Figure 15
4
5
6
7
8
9
10
11
12
–40 –200 20406080
SCSI Load
RS–485 Load
TA – Free-Air Temperature – °C
Driver Propagation Delay – ns
DRIVER PROPAGATION DELAY
vs
FREE-AIR TEMPERATURE
Figure 16
135
140
145
150
155
160
165
0.1 1 10 100
– Supply Current – mA
Signaling Rate – Mbps
SUPPLY CURRENT
vs
SIGNALING RATE
ICC
All 3 Channels Driving
RL = 54 Ω,
CL = 50 pF (Each Channel),
Pseudorandom NRZ Data
SN65LBC171, SN75LBC171
TRIPLE DIFFERENTIAL TRANSCEIVERS
SLLS460A – NOVEMBER 2000 – REVISED FEBRUARY 2001
11
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
Figure 17
–600
–400
–200
0
200
400
600
800
–10 –5051015
VCC = 0 V
VCC = 5 V
Bus Input Current –
Bus Input Voltage – V
BUS INPUT CURRENT
vs
BUS INPUT VOLTAGE
Aµ
Figure 18
4
5
6
7
8
9
10
11
12
–40 –20 0 20 40 60 80
tPLH
tPHL
– Receiver Propagation Delay Time – ns
RECEIVER PROPAGATION DELAY TIME
vs
FREE-AIR TEMPERATURE
TA – Free-Air Temperature °C
tpd
Signal
Generator
SN65LBC171
(as Driver)
100 Ω
15 pF
SN65LBC171
(as Receiver)
15 Meters, Cat. 5
Twisted-Pair Cable
Figure 19. Circuit Diagram for Signaling Characteristics
SN65LBC171, SN75LBC171
TRIPLE DIFFERENTIAL TRANSCEIVERS
SLLS460A – NOVEMBER 2000 – REVISED FEBRUARY 2001
12 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
Driver Input
(5 V/div)
Driver Output
(2 V/div)
Receiver Input
(2 V/div)
Receiver Output
(5 V/div)
25 ns
Figure 20. Signal Waveforms at 30 Mbps
Driver Input
(5 V/div)
Driver Output
(2 V/div)
Receiver Input
(2 V/div)
Receiver Output
(5 V/div)
12.5 ns
Figure 21. Eye Patterns, Pseudorandom Data at 30 Mbps
SN65LBC171, SN75LBC171
TRIPLE DIFFERENTIAL TRANSCEIVERS
SLLS460A – NOVEMBER 2000 – REVISED FEBRUARY 2001
13
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
Driver Input
(5 V/div)
Driver Output
(2 V/div)
Receiver Input
(2 V/div)
Receiver Output
(5 V/div)
25 ns
Figure 22. Signal Waveforms at 50 Mbps
12.5 ns
Driver Input
(5 V/div)
Driver Output
(2 V/div)
Receiver Input
(2 V/div)
Receiver Output
(5 V/div)
Figure 23. Eye Patterns, Pseudorandom Data at 50 Mbps
SN65LBC171, SN75LBC171
TRIPLE DIFFERENTIAL TRANSCEIVERS
SLLS460A – NOVEMBER 2000 – REVISED FEBRUARY 2001
14 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
MECHANICAL DATA
DB (R-PDSO-G**) PLASTIC SMALL-OUTLINE
4040065 /D 09/00
28 PINS SHOWN
Gage Plane
8,20
7,40
0,15 NOM
0,55
0,95
0,25
38
12,90
12,30
28
10,50
24
8,50
Seating Plane
9,907,90
30
10,50
9,90
0,38
5,60
5,00
15
0,22
14
A
28
1
2016
6,50
6,50
14
0,05 MIN
5,905,90
DIM
A MAX
A MIN
PINS **
2,00 MAX
6,90
7,50
0,65 M
0,15
0°–8°
0,10
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.
D. Falls within JEDEC MO-150
SN65LBC171, SN75LBC171
TRIPLE DIFFERENTIAL TRANSCEIVERS
SLLS460A – NOVEMBER 2000 – REVISED FEBRUARY 2001
15
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
MECHANICAL DATA
DW (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE
16 PINS SHOWN
4040000/D 01/00
Seating Plane
0.400 (10,15)
0.419 (10,65)
0.104 (2,65) MAX
1
0.012 (0,30)
0.004 (0,10)
A
8
16
0.020 (0,51)
0.014 (0,35)
0.291 (7,39)
0.299 (7,59)
9
0.010 (0,25)
0.050 (1,27)
0.016 (0,40)
(15,24)
(15,49)
PINS **
0.010 (0,25) NOM
A MAX
DIM
A MIN
Gage Plane
20
0.500
(12,70)
(12,95)
0.510
(10,16)
(10,41)
0.400
0.410
16
0.600
24
0.610
(17,78)
28
0.700
(18,03)
0.710
0.004 (0,10)
M
0.010 (0,25)
0.050 (1,27)
0°–8°
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0.006 (0,15).
D. Falls within JEDEC MS-013
PACKAGING INFORMATION
Orderable Device Status (1) Package
Type Package
Drawing Pins Package
Qty Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
SN65LBC171DB ACTIVE SSOP DB 20 70 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN65LBC171DBG4 ACTIVE SSOP DB 20 70 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN65LBC171DBR ACTIVE SSOP DB 20 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN65LBC171DBRG4 ACTIVE SSOP DB 20 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN65LBC171DW ACTIVE SOIC DW 20 25 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN65LBC171DWG4 ACTIVE SOIC DW 20 25 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN65LBC171DWR ACTIVE SOIC DW 20 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN65LBC171DWRG4 ACTIVE SOIC DW 20 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN75LBC171DB ACTIVE SSOP DB 20 70 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN75LBC171DBG4 ACTIVE SSOP DB 20 70 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN75LBC171DW ACTIVE SOIC DW 20 25 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN75LBC171DWG4 ACTIVE SOIC DW 20 25 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
PACKAGE OPTION ADDENDUM
www.ti.com 27-Aug-2009
Addendum-Page 1
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
PACKAGE OPTION ADDENDUM
www.ti.com 27-Aug-2009
Addendum-Page 2
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
SN65LBC171DBR SSOP DB 20 2000 330.0 16.4 8.2 7.5 2.5 12.0 16.0 Q1
SN65LBC171DWR SOIC DW 20 2000 330.0 24.4 10.8 13.0 2.7 12.0 24.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 29-Jul-2009
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
SN65LBC171DBR SSOP DB 20 2000 346.0 346.0 33.0
SN65LBC171DWR SOIC DW 20 2000 346.0 346.0 41.0
PACKAGE MATERIALS INFORMATION
www.ti.com 29-Jul-2009
Pack Materials-Page 2
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