54AC/74AC373 # 54ACT/74ACT373 Octal Transparent Latch with TRI-STATEE Outputs General Description Features The 'AC/'ACT373 consists of eight latches with TRI-STATE outputs for bus organized system applications. The flip-flops appear transparent to the data when Latch Enable (LE) is HIGH. When LE is LOW, the data that meets the setup time is latched. Data appears on the bus when the Output Enable (OE) is LOW. When OE is HIGH, the bus output is in the high impedance state. Y Commercial Y Y Y Y Y ICC and IOZ reduced by 50% Eight latches in a single package TRI-STATE outputs for bus interfacing Outputs source/sink 24 mA 'ACT373 has TTL-compatible inputs Standard Military Drawing (SMD) 'AC373: 5962-87555 'ACT373: 5962-87556 Package Number Military Package Description 74ACT373PC N20A 20-Lead Molded Dual-In-Line (0.300x Wide) 74ACT373SC (Note 1) M20B 20-Lead Molded Small Outline (0.300x Wide), JEDEC 74ACT373SJ (Note 1) M20D 20-Lead Molded Small Outline, EIAJ Type II 74ACT373MTC (Note 1) MTC20 20-Lead Molded Thin Shrink Small Outline Package, JEDEC 74ACT373MSA (Note 1) MSA20 20-Lead Molded Small Shrink Outline Package, (EIAJ SSOP) 54ACT373DM (Note 2) J20A 20-Lead Ceramic Dual-In-Line 54ACT373FM (Note 2) W20A 20-Lead Cerpak Note 1: Devices also available in 13x Tape and Reel. Use suffix SCX, SJX, and MTCX. Note 2: Military grade device with environmental and burn-in processing, use suffix DMQB, FMQB and LMQB. Logic Symbols IEEE/IEC TL/F/9958 - 1 Pin Names D0 - D7 LE OE O0 - O7 Description Data Inputs Latch Enable Input Output Enable Input TRI-STATE Latch Outputs TL/F/9958 - 2 TRI-STATEE is a registered trademark of National Semiconductor Corporation. FACTTM is a trademark of National Semiconductor Corporation. C1996 National Semiconductor Corporation TL/F/9958 RRD-B30M66/Printed in U. S. A. http://www.national.com 54AC/74AC373 # 54ACT/74ACT373 Octal Transparent Latch with TRI-STATE Outputs June 1996 Connection Diagrams Pin Assignment for DIP, Flatpak, SSOP, SOIC and TSSOP Pin Assignment for LCC TL/F/9958 - 4 TL/F/9958-3 Functional Description Truth Table The 'AC/'ACT373 contains eight D-type latches with TRISTATE standard outputs. When the Latch Enable (LE) input is HIGH, data on the Dn inputs enters the latches. In this condition the latches are transparent, i.e., a latch output will change state each time its D input changes. When LE is LOW, the latches store the information that was present on the D inputs a setup time preceding the HIGH-to-LOW transition of LE. The TRI-STATE standard outputs are controlled by the Output Enable (OE) input. When OE is LOW, the standard outputs are in the 2-state mode. When OE is HIGH, the standard outputs are in the high impedance mode but this does not interfere with entering new data into the latches. Inputs Outputs LE OE Dn On X H H L H L L L X L H X Z L H O0 H e HIGH Voltage Level L e LOW Voltage Level Z e High Impedance X e Immaterial O0 e Previous O0 before HIGH to Low transition of Latch Enable Logic Diagram TL/F/9958 - 5 Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays. http://www.national.com 2 Absolute Maximum Rating (Note 1) Recommended Operating Conditions If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/Distributors for availability and specifications. Supply Voltage (VCC) DC Input Diode Current (IIK) VI e b0.5V VI e VCC a 0.5V DC Input Voltage (VI) DC Output Diode Current (IOK) VO e b0.5V VO e VCC a 0.5V DC Output Voltage (VO) DC Output Source or Sink Current (IO) DC VCC or Ground Current per Output Pin (ICC or IGND) Storage Temperature (TSTG) Junction Temperature (TJ) CDIP PDIP Supply Voltage (VCC) 'AC 'ACT Input Voltage (VI) b 0.5V to a 7.0V b 20 mA a 20 mA 2.0V to 6.0V 4.5V to 5.5V 0V to VCC 0V to VCC Output Voltage (VO) Operating Temperature (TA) 74AC/ACT 54AC/ACT b 0.5V to VCC a 0.5V b 20 mA a 20 mA b 40 C to a 85 C b 55 C to a 125 C Minimum Input Edge Rate (DV/Dt) 'AC Devices VIN from 30% to 70% of VCC VCC @ 3.3V, 4.5V, 5.5V Minimum Input Edge Rate (DV/Dt) 'ACT Devices VIN from 0.8V to 2.0V VCC @ 4.5V, 5.5V b 0.5V to VCC a 0.5V g 50 mA g 50 mA b 65 C to a 150 C 125 mV/ns 125 mV/ns 175 C 140 C Note 1: Absolute maximum ratings are those values beyond which damage to the device may occur. The databook specifications should be met, without exception, to ensure that the system design is reliable over its power supply, temperature, and output/input loading variables. National does not recommend operation of FACT TM circuits outside databook specifications. DC Characteristics for 'AC Family Devices Symbol Parameter VCC (V) 74AC 54AC 74AC TA e a 25 C TA e b 55 C to a 125 C TA e b 40 C to a 85 C Typ VIH VIL VOH IIN Conditions Guaranteed Limits Minimum High Level Input Voltage 3.0 4.5 5.5 1.5 2.25 2.75 2.1 3.15 3.85 2.1 3.15 3.85 2.1 3.15 3.85 V VOUT e 0.1V or VCC b 0.1V Maximum Low Level Input Voltage 3.0 4.5 5.5 1.5 2.25 2.75 0.9 1.35 1.65 0.9 1.35 1.65 0.9 1.35 1.65 V VOUT e 0.1V or VCC b 0.1V Minimum High Level Output Voltage 3.0 4.5 5.5 2.99 4.49 5.49 2.9 4.4 5.4 2.9 4.4 5.4 2.9 4.4 5.4 V 2.56 3.86 4.86 2.4 3.7 4.7 2.46 3.76 4.76 V 0.1 0.1 0.1 0.1 0.1 0.1 0.1 0.1 0.1 V 3.0 4.5 5.5 0.36 0.36 0.36 0.50 0.50 0.50 0.44 0.44 0.44 V 5.5 g 0.1 g 1.0 g 1.0 mA 3.0 4.5 5.5 VOL Units Maximum Low Level Output Voltage Maximum Input Leakage Current 3.0 4.5 5.5 0.002 0.001 0.001 IOUT e b50 mA *VIN e VIL or VIH b 12 mA b 24 mA IOH b 24 mA IOUT e 50 mA *VIN e VIL or VIH 12 mA IOL 24 mA 24 mA VI e VCC, GND *All outputs loaded, thresholds on input associated with output under test. 3 http://www.national.com DC Characteristics for 'AC Family Devices (Continued) Symbol Parameter VCC (V) 74AC 54AC 74AC TA e a 25 C TA e b 55 C to a 125 C TA e b 40 C to a 85 C Typ IOZ Maximum TRI-STATE Current Minimum Dynamic Output Current IOLD IOHD ICC Maximum Quiescent Supply Current Units Conditions Guaranteed Limits g 5.0 g 2.5 mA VI (OE) e VIL, VIH VI e VCC, GND VO e VCC, GND 5.5 50 75 mA VOLD e 1.65V Max 5.5 b 50 b 75 mA VOHD e 3.85V Min 80.0 40.0 mA VIN e VCC or GND 5.5 g 0.25 5.5 4.0 Maximum test duration 2.0 ms, one output loaded at a time. Note: IIN and ICC @ ICC for 54AC 3.0V are guaranteed to be less than or equal to the respective limit @ 25 C is identical to 74AC @ @ 5.5V VCC. 25 C. DC Characteristics for 'ACT Family Devices 74ACT Symbol Parameter 54ACT 74ACT TA e VCC TA e TA e a 25 C Units b 55 C to a 125 C b 40 C to a 85 C (V) Typ Conditions Guaranteed Limits VIH Minimum High Level Input Voltage 4.5 5.5 1.5 1.5 2.0 2.0 2.0 2.0 2.0 2.0 V VOUT e 0.1V or VCC b 0.1V VIL Maximum Low Level Input Voltage 4.5 5.5 1.5 1.5 0.8 0.8 0.8 0.8 0.8 0.8 V VOUT e 0.1V or VCC b 0.1V VOH Minimum High Level Output Voltage 4.5 5.5 4.49 5.49 4.4 5.4 4.4 5.4 4.4 5.4 V 3.86 4.86 3.70 4.70 3.76 4.76 V 0.1 0.1 0.1 0.1 0.1 0.1 V 4.5 5.5 0.36 0.36 0.50 0.50 0.44 0.44 V IIN Maximum Input Leakage Current 5.5 g 0.1 g 1.0 g 1.0 mA VI e VCC, GND IOZ Maximum TRI-STATE Current 5.5 ICCT Maximum ICC/Input 5.5 IOLD Minimum Dynamic 5.5 IOHD Output Current 5.5 ICC Maximum Quiescent Supply Current 5.5 4.5 5.5 VOL Maximum Low Level Output Voltage 4.5 5.5 0.001 0.001 g 0.25 0.6 4.0 *All outputs loaded; thresholds on input associated with output under test. Maximum test duration 2.0 ms, one output loaded at a time. Note: ICC for 54ACT @ http://www.national.com 25 C is identical to 74ACT @ 25 C. 4 IOUT e b50 mA *VIN e VIL or VIH b 24 mA IOH b 24 mA IOUT e 50 mA *VIN e VIL or VIH 24 mA IOL 24 mA g 5.0 g 2.5 mA VI e VIL, VIH VO e VCC, GND 1.6 1.5 mA VI e VCC b 2.1V 50 75 mA VOLD e 1.65V Max b 50 b 75 mA VOHD e 3.85V Min 80.0 40.0 mA VIN e VCC or GND AC Electrical Characteristics Symbol Parameter VCC* (V) 74AC 54AC 74AC TA e a 25 C CL e 50 pF TA e b55 C to a 125 C CL e 50 pF TA e b40 C to a 85 C CL e 50 pF Units Min Typ Max Min Max Min Max tPLH Propagation Delay Dn to On 3.3 5.0 1.5 1.5 10.0 7.0 13.5 9.5 1.0 1.5 16.5 11.5 1.5 1.5 15.0 10.5 ns tPHL Propagation Delay Dn to On 3.3 5.0 1.5 1.5 9.5 7.0 13.0 9.5 1.0 1.5 16.0 11.5 1.5 1.5 14.5 10.5 ns tPLH Propagation Delay LE to On 3.3 5.0 1.5 1.5 10.0 7.5 13.5 9.5 1.0 1.5 16.5 12.0 1.5 1.5 15.0 10.5 ns tPHL Propagation Delay LE to On 3.3 5.0 1.5 1.5 9.5 7.0 12.5 9.5 1.0 1.5 15.0 11.0 1.5 1.5 14.0 10.5 ns tPZH Output Enable Time 3.3 5.0 1.5 1.5 9.0 7.0 11.5 8.5 1.0 1.5 14.0 10.5 1.0 1.0 13.0 9.5 ns tPZL Output Enable Time 3.3 5.0 1.5 1.5 8.5 6.5 11.5 8.5 1.0 1.5 13.5 10.0 1.0 1.0 13.0 9.5 ns tPHZ Output Disable Time 3.3 5.0 1.5 1.5 10.0 8.0 12.5 11.0 1.0 1.5 16.0 13.5 1.0 1.0 14.5 12.5 ns tPLZ Output Disable Time 3.3 5.0 1.5 1.5 8.0 6.5 11.5 8.5 1.0 1.5 13.0 10.5 1.0 1.0 12.5 10.0 ns *Voltage Range 3.3 is 3.3V g 0.3V Voltage Range 5.0 is 5.0V g 0.5V AC Operating Requirements 74AC 54AC 74AC TA e a 25 C CL e 50 pF TA e b55 C to a 125 C CL e 50 pF TA e b40 C to a 85 C CL e 50 pF Parameter VCC* (V) ts Setup Time, HIGH or LOW Dn to LE 3.3 5.0 3.5 2.0 5.5 4.0 6.5 5.0 6.0 4.5 ns th Hold Time, HIGH or LOW Dn to LE 3.3 5.0 b 3.0 b 1.5 1.0 1.0 1.0 1.0 1.0 1.0 ns tw LE Pulse Width, HIGH 3.3 5.0 4.0 2.0 5.5 4.0 6.5 5.0 6.0 4.5 ns Symbol Typ Units Guaranteed Minimum *Voltage Range 3.3 is 3.3V g 0.3V Voltage Range 5.0 is 5.0V g 0.5V 5 http://www.national.com AC Electrical Characteristics Symbol VCC* (V) Parameter 74ACT 54ACT 74ACT TA e a 25 C CL e 50 pF TA e b55 C to a 125 C CL e 50 pF TA e b40 C to a 85 C CL e 50 pF Units Min Typ Max Min Max Min Max 5.0 2.5 8.5 10.0 1.5 12.5 1.5 11.5 ns Propagation Delay Dn to On 5.0 2.0 8.0 10.0 1.5 12.5 1.5 11.5 ns tPLH Propagation Delay LE to On 5.0 2.5 8.5 11.0 1.5 12.5 2.0 11.5 ns tPHL Propagation Delay LE to On 5.0 2.0 8.0 10.0 1.5 11.5 1.5 11.5 ns tPZH Output Enable Time 5.0 2.0 8.0 9.5 1.5 11.5 1.5 10.5 ns tPZL Output Enable Time 5.0 2.0 7.5 9.0 1.5 11.0 1.5 10.5 ns tPHZ Output Disable Time 5.0 2.5 9.0 11.0 1.5 14.0 2.5 12.5 ns tPLZ Output Disable Time 5.0 1.5 7.5 8.5 1.5 11.0 1.0 10.0 ns tPLH Propagation Delay Dn to On tPHL *Voltage Range 5.0 is 5.0V g 0.5V AC Operating Requirements Symbol Parameter VCC* (V) 74ACT 54ACT 74ACT TA e a 25 C CL e 50 pF TA e b55 C to a 125 C CL e 50 pF TA e b40 C to a 85 C CL e 50 pF Typ Units Guaranteed Minimum ts Setup Time, HIGH or LOW Dn to LE 5.0 0.8 2.5 8.5 3.5 ns th Hold Time, HIGH or LOW Dn to LE 5.0 0 0 1.0 1.0 ns tw LE Pulse Width, HIGH 5.0 2.0 7.0 8.5 8.0 ns *Voltage Range 5.0 is 5.0V g 0.5V Capacitance Typ Units Conditions CIN Symbol Input Capacitance 4.5 pF VCC e OPEN CPD Power Dissipation Capacitance 40.0 pF VCC e 5.0V http://www.national.com Parameter 6 Ordering Information The device number is used to form part of a simplified purchasing code where the package type and temperature range are defined as follows: TL/F/9958 - 7 7 http://www.national.com Physical Dimensions inches (millimeters) unless otherwise noted 20 Terminal Ceramic Leadless Chip Carrier (L) NS Package Number E20A 20 Lead Ceramic Dual-In-Line Package (D) NS Package Number J20A http://www.national.com 8 Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20 Lead Small Outline Integrated Circuit (S) NS Package Number M20B 9 http://www.national.com Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20 Lead Plastic EIAJ SSOP (MSA) NS Package Number MSA20 http://www.national.com 10 Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Molded Thin Shrink Small Outline Package, JEDEC NS Package Number MTC20 20-Lead Plastic Dual-In-Line Package (P) NS Package Number N20A 11 http://www.national.com 54AC/74AC373 # 54ACT/74ACT373 Octal Transparent Latch with TRI-STATE Outputs Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Ceramic Flatpak (F) NS Package Number W20A LIFE SUPPORT POLICY NATIONAL'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION. 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