HV9110NG-GM905 - Supertex, Inc. - Datasheet.Directory

General Description

The Supertex HV9110 through HV9113 are a series of BiCMOS/

DMOS single-output, pulse width modulator ICs intended for use

in high-speed high-efficiency switchmode power supplies. They

provide all the functions necessary to implement a single-switch

current-mode PWM, in any topology, with a minimum of external

parts.

Because they utilize Supertex’s proprietary BiCMOS/DMOS tech-

nology, they require less than one tenth of the operating power of

conventional bipolar PWM ICs, and can operate at more than

twice their switching frequency. Dynamic range for regulation is

also increased, to approximately 8 times that of similar bipolar

parts. They start directly from any DC input voltages between 10

and 120VDC, requiring no external power resistor. The output

stage is push-pull CMOS and thus requires no clamping diodes

for protection, even when significant lead length exists between

the output and the external MOSFET. The clock frequency is set

with a single external resistor.

Accessory functions are included to permit fast remote shutdown

(latching or nonlatching) and undervoltage shutdown.

For similar ICs intended to operate directly from up to 450VDC

input, please consult the data sheet for the HV9120/9123.

Ordering Information

+VIN Feedback Max Package Options

Min Max Accuracy Duty Cycle

10V 120V < ± 1% 49% HV9110P HV9110PJ HV9110NG HV9110X

9.0V 80V ± 2% 49% HV9112P HV9112PJ HV9112NG HV9112X

10V 120V < ± 1% 99% HV9113P HV9113PJ HV9113NG HV9113X

Standard temperature range for all parts is industrial (-40° to +85°C).

Absolute Maximum Ratings

+VIN, Input Voltage HV9110/9113 120V

HV9112 80V

VDD, Logic Voltage 15.5V

Logic Linear Input, FB and

Sense Input Voltage -0.3V to VDD+0.3V

Storage Temperature -65°C to 150°C

Power Dissipation, SOIC 750mW

Power Dissipation, Plastic DIP 1000mW

Power Dissipation PLCC 1400mW

High-Voltage Current-Mode PWM Controller

Features

❏10 to 120V input range

❏Current-mode control

❏High efficiency

❏Up to 1.0MHz internal oscillator

❏Internal start-up circuit

❏Low internal noise

Applications

❏DC/DC converters

❏Distributed power systems

❏ISDN equipment

❏PBX systems

❏Modems

14 Pin 20 Pin 14 Pin Die

Plastic DIP Plastic PLCC Narrow Body SOIC

For detailed circuit and application information, please refer

to application notes AN-H13 and AN-H21 to AN-H24.

HV9110

HV9112

HV9113

11/12/01

Supertex Inc. does not recommend the use of its products in life support applications and will not knowingly sell its products for use in such applications unless it receives an adequate "products liability

indemnification insurance agreement." Supertex does not assume responsibility for use of devices described and limits its liability to the replacement of devices determined to be defective due to

workmanship. No responsibility is assumed for possible omissions or inaccuracies. Circuitry and specifications are subject to change without notice. For the latest product specifications, refer to the

Supertex website: http://www.supertex.com. For complete liability information on all Supertex products, refer to the most current databook or to the Legal/Disclaimer page on the Supertex website.

HV9110/HV9112/HV9113

PWM

DMAX Maximum Duty Cycle1HV9110/12 49.0 49.4 49.6 %

HV9113 95 97 99

Deadtime1HV9113 225 nsec

DMIN Minimum Duty Cycle 0 %

Minimum Pulse Width 80 125 nsec

Before Pulse Drops Out1

Current Limit

Maximum Input Signal 1.0 1.2 1.4 V VFB = 0V

tdDelay to Output180 120 ns VSENSE = 1.5V, VCOMP ≤ 2.0V

Oscillator

fMAX Oscillator Frequency 1.0 3.0 MHz ROSC = 0Ω

fOSC Initial Accuracy2 80 100 120 KHz ROSC = 330KΩ

160 200 240 ROSC = 150KΩ

Voltage Stability 15 % 9.5V < VDD <13.5V

Temperature Coefficient1170 ppm/°CT

A = -55°C to 125°C

Reference

VREF Output Voltage HV9110/13 3.92 4.00 4.08 V RL = 10MΩ

HV9112 3.88 4.00 4.12

HV9110/13 3.82 4.00 4.16 RL = 10MΩ,

TA = -55°C to 125°C

ZOUT Output Impedance115 30 45 KΩ

ISHORT Short Circuit Current 125 250 µAV

REF = -VIN

∆VREF Change in VREF with Temperature1 0.25 mV/°CT

A = -55°C to 125°C

Electrical Characteristics

(Unless otherwise specified, VDD = 10V, +VIN = 48V, Discharge = -VIN = 0V, RBIAS = 390KΩ, ROSC = 330KΩ,TA = 25°C.)

Symbol Parameters Min Typ Max Unit Conditions

Error Amplifier

VFB Feedback Voltage HV9110/13 3.96 4.00 4.04 V VFB Shorted to Comp

HV9112 3.92 4.00 4.08

IIN Input Bias Current 25 500 nA VFB = 4.0V

VOS Input Offset Voltage nulled during trim except HV9111

AVOL Open Loop Voltage Gain160 80 dB

GB Unity Gain Bandwidth11.0 1.3 MHz

ZOUT Output Impedance1see Fig. 1 Ω

ISOURCE Output Source Current -1.4 -2.0 mA VFB = 3.4V

ISINK Output Sink Current 0.12 0.15 mA VFB = 4.5V

PSRR Power Supply Rejection1see Fig. 2 dB

Notes:

1. Guaranteed by design. Not subject to production test.

2. Stray capacitance on OSC In pin must be ≤5pF.

HV9110/HV9112/HV9113

Electrical Characteristics (continued)

(Unless otherwise specified, VDD = 10V, +VIN = 48V, Discharge = -VIN = 0V, RBIAS = 390KΩ, ROSC = 330KΩ,TA = 25°C.)

Symbol Parameters Min Typ Max Unit Conditions

Pre-regulator/Startup

+VIN Input Voltage HV9110/13 120 V IIN < 10µA; VCC > 9.4V

HV9112 80

+IIN Input Leakage Current 10 µAV

DD > 9.4V

VTH VDD Pre-regulator Turn-off Threshold Voltage 8.0 8.7 9.4 V IPREREG = 10µA

VLOCK Undervoltage Lockout 7.0 8.1 8.9 V

Supply

IDD Supply Current 0.75 1.0 mA CL < 75pF

IQQuiescent Supply Current 0.55 mA Shutdown = -VIN

IBIAS Nominal Bias Current 20 µA

VDD Operating Range 9.0 13.5 V

Shutdown Logic

tSD Shutdown Delay150 100 ns CL = 500pF, VSENSE = -VIN

tSW Shutdown Pulse Width150 ns

tRW RESET Pulse Width150 ns

tLW Latching Pulse Width125 ns Shutdown and reset low

VIL Input Low Voltage 2.0 V

VIH Input High Voltage 7.0 V

IIH Input Current, Input Voltage High 1.0 5.0 µAV

IN = VDD

IIL Input Current, Input Voltage Low -25 -35 µAV

IN = 0V

Output

VOH Output High Voltage HV9110/13 VDD -0.25 V IOUT = 10mA

HV9112 VDD -0.3

HV9110/13 VDD -0.3 IOUT = 10mA,

TA = -55°C to 125°C

VOL Output Low Voltage All 0.2 V IOUT = -10mA

HV9110/13 0.3 IOUT = -10mA,

TA = -55°C to 125°C

ROUT Output Resistance Pull Up 15 25 ΩIOUT = ±10mA

Pull Down 8.0 20

Pull Up 20 30 ΩIOUT = ±10mA,

Pull Down 10 30 TA = -55°C to 125°C

tRRise Time130 75 ns CL = 500pF

tFFall Time120 75 ns CL = 500pF

Note:

1. Guaranteed by design. Not subject to production test.

HV9110/HV9112/HV9113

Shutdown Reset Output

H H Normal Operation

HH → L Normal Operation, No Change

L H Off, Not Latched

L L Off, Latched

L → H L Off, Latched, No Change

Truth Table

Shutdown Timing Waveforms

Functional Block Diagram

VDD

50%

Output

Sense

1.5V

tSD

50%

90%90%

VDD

Output 0

Shutdown

VDD

tLW

50%

tSW

50%

tRW

Reset 0

VDD

Shutdown 0

VDD

50%

, t

≤ 10ns

Pin numbers in parentheses are for PLCC package

–

REF

GEN

–

Modulator

Comparator

OSC

Current Limit

Comparator

9110

9112

COMP Discharge

OSC

Out

REF

BIAS

Pre-regulator/Startup

8.6V

8.1V

Undervoltage

Comparator S

Shutdown

Reset

-V

Current Sense

Output

Error

Amplifier

Internal

Circuits

1.2V

Current

Sources

To V

2V TQ

9113

4 (6)

5 (8)

3 (5)

11 (16)

12 (17)

2 (3)

6 (9)

1 (20)

10 (14)

(19)

(18)

(12) 8 (11) 7 (10)

HV9110/HV9112/HV9113

PSRR — Error Amplifier and Reference

1M10K100 100K1K10

Output Switching Frequency

vs. Oscillator Resistance

100 k

10k

OSC

(Ω)

f (Hz)

OUT

-10

100 1K 10K

Error Amplifier

Open Loop Gain/Phase

100K 1M

Gain (dB)

Phase (°C)

180

120

-60

-120

-180

Frequency (Hz)

10MHz

1MHz

100Hz 1KHz 10KHz

Error Amplifier Output Impedance (Z0)

100KHz

-10

-20

-30

-40

-50

-60

-70

-80

100k

HV9113

HV9110, 9111, 9112

Bias Resistance (Ω)

Bias Current (µA)

100

= 10V

= 12V

PSSR (dB)

Frequency (Hz)

(Ω)

Frequency

RDISCHARGE

vs. t

OFF

(9113 only)

DISCHARGE (Ω)

-1

tOFF (nsec)

OSC

= 100K

OSC

= 10K

OSC

= 1K

Typical Performance Curves

Fig. 1

Fig. 2 Fig. 5

Fig. 3

Fig. 4

Fig. 6

–

Reference

0.1V swept 10Hz – 1MHz

0.1µF

10.0V

4.00V

100K1%

PSRR

Test Circuits

Detailed Description

Preregulator

The preregulator/startup circuit for the HV911X consists of a high-

voltage n-channel depletion-mode DMOS transistor driven by an

error amplifier to form a variable current path between the VIN

terminal and the VDD terminal. Maximum current (about 20 mA)

occurs when VDD = 0, with current reducing as VDD rises. This path

shuts off altogether when VDD rises to somewhere between 7.8

and 9.4V, so that if VDD is held at 10 or 12V by an external source

(generally the supply the chip is controlling). No current other than

leakage is drawn through the high voltage transistor. This mini-

mizes dissipation.

An external capacitor between VDD and VSS is generally required

to store energy used by the chip in the time between shutoff of the

high voltage path and the VDD supply’s output rising enough to

take over powering the chip. This capacitor should have a value

of 100X or more the

effective

gate capacitance of the MOSFET

being driven, i.e.,

Cstorage ≥ 100 x (gate charge of FET at 10V ÷ 10V)

as well as very good high frequency characteristics. Stacked

polyester or ceramic caps work well. Electrolytic capacitors are

generally not suitable.

A common resistor divider string is used to monitor VDD for both

the undervoltage lockout circuit and the shutoff circuit of the high

voltage FET. Setting the undervoltage sense point about 0.6V

lower on the string than the FET shutoff point guarantees that the

undervoltage lockout always releases before the FET shuts off.

Bias Circuit

An external bias resistor, connected between the bias pin and VSS

is required by the HV911X to set currents in a series of current

mirrors used by the analog sections of the chip. Nominal external

bias current requirement is 15 to 20µA, which can be set by a

390KΩ to 510KΩ resistor if a 10V VDD is used, or a 510kΩ to

680KΩ resistor if VDD will be 12V. A precision resistor is

not

required; ± 5% is fine.

Clock Oscillator

The clock oscillator of the HV911X consists of a ring of CMOS

inverters, timing capacitors, a capacitor discharge FET, and, in

the 50% maximum duty cycle versions, a frequency dividing flip-

flop. A single external resistor between the OSC In and OSC Out

pins is required to set oscillator frequency (see graph). For the

50% maximum duty cycle versions the Discharge pin is internally

connected to GND. For the 99% duty cycle version, the discharge

pin can either be connected to VSS directly or connected to VSS

through a resistor used to set a deadtime.

One difference exists between the Supertex HV911X and com-

petitive 911X’s: On the Supertex part the oscillator is shut off

when a shutoff command is received. This saves about 150µA of

quiescent current, which aids in the construction of power sup-

plies to meet CCITT specification I-430, and in other situations

where an absolute minimum of quiescent power dissipation is

required.

Reference

The Reference of the HV911X consists of a stable bandgap

reference followed by a buffer amplifier which scales the voltage

up to approximately 4.0V. The scaling resistors of the reference

buffer amplifier are trimmed during manufacture so that the output

of the error amplifier when connected in a gain of –1 configuration

is as close to 4.000V as possible. This nulls out any input offset

of the error amplifier. As a consequence, even though the ob-

served reference voltage of a specific part may not be exactly

4.0V, the feedback voltage required for proper regulation will be.

A ≈50KΩ resistor is placed internally between the output of the

reference buffer amplifier and the circuitry it feeds (reference

output pin and non-inverting input to the error amplifier). This

allows overriding the internal reference with a low-impedance

voltage source ≤6.0V. Using an external reference reinstates the

input offset voltage of the error amplifier, and its effect of the exact

value of feedback voltage required.

Because the reference of the 911X is a high impedance node, and

usually there will be significant electrical noise near it, a bypass

capacitor between the reference pin and VSS is strongly recom-

mended. The reference buffer amplifier is intentionally compen-

sated to be stable with a capacitive load of 0.01 to 0.1µF.

–

Reference V1V2

60.4K

40.2K

1.0V swept 100Hz – 2.2MHz

Tektronix

P6021

(1 turn

secondary)

0.1µF

+10V

(VDD)

GND

(–VIN)

(FB)

NOTE: Set Feedback Voltage so that

VCOMP = VDIVIDE ± 1mV before connecting transformer

Error Amp ZOUT

HV9110/HV9112/HV9113

Error Amplifier

The error amplifier in the HV911X is a true low-power differential

input operational amplifier intended for around-the-amplifier com-

pensation. It is of mixed CMOS-bipolar construction: A PMOS

input stage is used so the common-mode range includes ground

and the input impedance is very high. This is followed by bipolar

gain stages which provide high gain without the electrical noise of

all-MOS amplifiers. The amplifier is unity-gain stable.

Current Sense Comparators

The HV911X uses a true dual comparator system with indepen-

dent comparators for modulation and current limiting. This allows

the designer greater latitude in compensation design, as there are

no clamps (except ESD protection) on the compensation pin. Like

the error amplifier, the comparators are of low-noise BiCMOS

construction.

Remote Shutdown

The shutdown and reset pins of the 911X can be used to perform

either latching or non-latching shutdown of a converter as re-

quired. These pins have internal current source pull-ups so they

can be driven from open-drain logic. When not used they should

be left open, or connected to VDD.

Output Buffer

The output buffer of the HV911X is of standard CMOS construc-

tion (P-channel pull-up, N-channel pull-down). Thus the body-

drain diodes of the output stage can be used for spike clipping if

necessary, and external Schottky diode clamping of the output is

not required.

Detailed Description (continued)

Pinout

14 Pin SOIC/DIP Package

COMP

Reset

Shutdown

VREF

Discharge

OSC In

BIAS

+VIN

Sense

Output

–VIN

VDD

OSC Out

BIAS

+VIN

18 17 16 15 14

4 5 6 7 8

•

Discharge

OSC In

OSC Out

VDD

Sense

Output

–V

20-pin PJ Package

top view

COMP

Reset

Shutdown

REF

HV9110/HV9112/HV9113

1235 Bordeaux Drive, Sunnyvale, CA 94089

TEL: (408) 744-0100 • FAX: (408) 222-4895

www.supertex.com

11/12/01