ICS9158M-01 - Integrated Device Technology

ICS9158RevB111595

Integrated

Circuit

Systems, Inc.

ICS9158

Block Diagram

General Description

The ICS9158 is a low cost frequency generator designed

specifically for desktop and notebook PC applications. Eight

high dr ive, skew-c ont rol led copies of th e CPU clo ck a re a vail-

able, eliminating the need for an external buffer .

Each high drive (50mA) output is capable of driving a 30pF

load and has a typical duty cycle of 50/50. The CPU clock

outputs are ske w-con troll ed to within ±250ps. The CPU clocks

provide all necessary frequencies for 286, 386, 486 and Pen-

tium systems, including support for the latest speeds of proc-

essors.

The CPU cloc k offers the uniqu e feature of smoot h, glitch-free

transitions from one frequency to the next, making this the

ideal device to use whenever slowing the CPU speeds. The

ICS9158 makes a gradual transition between frequencies so

that it meets the Intel cycle-to-cycle timing specification for

486 systems.

ICS has been shipping Motherboard Frequency Generators

since April 1990, and is the leader in the area of multiple output

clocks on a single chip. The ICS9158 is a third generation

device, and uses ICS’s patented analog CMOS Phase-Locked

Loop technology for lo w phase jitte r. I CS off ers a broad family

of frequency generators for motherboards, graphics and other

applications, including cost effective versions with only one or

two output clocks. Consu lt ICS for all of your clock gener ation

needs.

Features

•• Eigh t ske w-fre e, high d riv e CPU clo ck o utp uts

•• Up to 1 00 MHz outp ut at 5V

••±250ps sk ew bet wee n CPU and 2XC PU outp uts

•• Out put s ca n dri ve u p to 30pF load

•• 50mA output drivers

•• Typical 50/50 duty cycle

•• Compatible with 486 and Pentium CPUs

•• Glitc h- fre e star t and stop c loc k opt ion

•• Optional power-down mode supports Energy Star

(“green”) PCs

•• On-chi p loop filt er compo ne nts

•• Low power, high spee d 0.8 µ CMOS tec hnology

•• 24- pin PDIP or SOIC pac ka ge

Integrated Buffer and Motherboard Frequency Generator

Clock Table (in MHz)

Clock ICS9158

BUSCLK

FDCLK

REFCLK

14.318

CPUCLK

2XCPUCLK 4,8,30,20,2 5,33.3,40, or 50

8,16,60, 40,50,66.6,80, or 100

Pin Configuration

CPU2 1 24 S0

X14OUT 2 23 S1

X14IN 3 22 CPU1

VDD 4 21 2XCPU

GND 5 20 VDD

BUSCLK 6 19 GND

FDCLK 7 18 REFCLK

CPU3 8 17 CPU4

AGND 9 16 AVDD

OE 10 15 S2

CPU5 11 14 CPU6

GND 12 13 CPU7

ICS9158

Pin Descriptions for ICS9158

PIN NUMBER PI N NAME TYPE DESCRIPT I ON

1 CPU2 Output CPU clock output .

2 X14OUT - Crystal connecti on.

3 X14IN - Cryst al connec ti on.

4 VDD - Digital POWER SUPPLY (+5V).

5 GND - Digital GROUND.

6 BUSCLK Output 16 MHz cl oc k out put .

7 FDCLK Output 24 MHz f loppy disk /combi na tion I/O c loc k output .

8 CPU3 Output CPU clock output .

9 AGND - ANALOG GROUND.

10 OE Input OUTPUT ENABLE . Tristate s a l l outputs whe n low.*

11 CPU5 Out put CPU clock output.

12 GND - Digital GROUND.

13 CPU7 Out put CPU clock output.

14 CPU6 Out put CPU clock output.

15 S2 Input CPU cloc k frequ en cy se lec t 2.*

16 AVDD - ANALOG power supply (+5 V).

17 CPU4 Out put CPU clock output.

18 REFCLK Output 14.318 MHz cl ock output.

19 GND - Digital GROUND.

20 VDD - Digital POWER SUPPLY (+5V).

21 2XCPU Output 2X CPU clock output .

22 CPU1 Out put CPU clock output.

23 S1 Input CPU cloc k frequ en cy se lec t #1.*

24 S0 Input CPU cloc k frequ en cy se lec t #0.*

* Input has interna l pull -up to VDD.

24-Pin PDIP or SOIC

ICS9158

Absolute Maximum Ratings

AVDD, VDD refere nce d to GND . . . . . . . . . . . . . . . 7V

Ope ra ting t em pe ra t ure unde r bi as. . . . . . . . . . . . . . . . 0 °C to +70°C

Storage temperature . . . . . . . . . . . . . . . . . . . . . . . . . . -40°C to +150°C

Volta ge on I/O pins re fere nc ed to GND. . . . . . . . . . . GND -0. 5V to VDD +0.5V

Power dissi pation . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 Watts

Stresse s ab ove those liste d under Absol ute Maxim um R atin gs m ay c ause perm ane nt da ma ge t o the device . This is a stres s r ating

onl y a nd funct io na l o pe ra ti on of t he devi ce at the se or a ny oth er c ond it ion s above tho se ind ica te d in the opera t ional sec tions o f

the specifi cations is not implie d. Exposure t o abs olu te maximum rating conditions for ext ended periods may affect produc t

reliability.

Electrical Characteristics at 5V

VDD = +5 V±1 0%, TA=0°C to 70°C unless otherwise stated

DC Charac te ristic s

PARAME TER SYMBOL TEST CONDITIONS MIN T YP MAX UNITS

Input Low Vol ta ge VIL 0.8 V

Input Hi gh Voltage VIH 2.0 V

Input Low Curr en t IIL VIN=0V -5 5 µA

Input Hig h Curren t IIH VIN=VDD -5 5 µA

Output Low Vo ltag e VOL IOL=20.0mA 0.25 0.4 V

Output Hi gh Voltage (Note 1) VOH IOH=-30mA 2.4 3.5 V

Output Low Cur re nt (Note 1) IOL VOL=0.8V 45 65 mA

Output Hi gh Curre nt (Note 1) I OH VOH=2.0V -55 -35 mA

Supply Cur re nt I DD No load, 80 MHz 43 65 mA

Outp ut Frequ en cy C ha nge ove r

Suppl y and Tempe ra t ure (N ote 1) FDWith respe c t to typ ic a l

frequency 0.002 0.01 %

Short Circuit Current (Note 1) ISC Each output clock 25 56 mA

Pull -up R esi stor Val ue (Not e 1) RPU Inp ut pin 680 k Ω

Input Capa c itan ce (Note 1) CiExcept X1, X2 8 pf

Load Capacitance (Note 1) CLPins X1, X 2 20 pf

Not e 1: Para m e ter is guara nt e ed b y desi gn and cha ra c teri zat ion . Not 100% teste d in p rodu ct ion.

ICS9158

Electri cal Characteristics

(continued)

VDD = +5 V±1 0%, TA=0°C to 70°C unless otherwise stated

AC Charac te ristic s

PARAME TER SYMBOL TEST CONDITIONS MIN T YP MAX UNITS

Output Rise tim e, 0.8 to 2.0V

(Note 1) tr30pF lo ad - 1 2 ns

Rise ti me , 20% to 80% VDD

(Note 1) tr30pF lo ad - 2.5 3 ns

Output Fa ll time, 2.0 to 0.8 V

(Note 1) tf30pF lo ad - 0.5 1 ns

Fal l time , 80% to 20% V DD

(Note 1) tf30pF lo ad - 1.5 2 ns

Duty cycle (Note 1) dt30pF load 40/60 48/52 60/40 %

Jitter, one sigma (Note 1) tj1s As compared with

clock pe ri o d 0.5 2.0 %

Jitter, absol ute (Note 1) t jab -5 2 5 %

Jitter, absol ute (Note 1) t jab 16- 100 MHz clocks -500 500 ps

Input Fre que nc y fi14.318 MHz

Clo ck skew win dow be twe e n

CPU and 2XCPU out put s

(Note 1)

Tsk 100 250 ps

Fre quenc y Tr an si ti on t im e

(Note 1) tft From 4 to 5 0 MHz 13 2 0 m s

Not e 1: Para m e ter is guara nt e ed b y desi gn and cha ra c teri zat ion . Not 100% teste d in p rodu ct ion.

ICS9158

ICS9158 CPU Clock Decoding Table

(usin g 14.318 MHz in put. All freq u en cies in MHz)

CLOCK#2 CPU and 2XCPU

(Pin 15) S1

(Pin 23) S0

(Pin 24) 2XCPU

(Pin 21) CPU

7.580

15.511

59.875

40.090

50.113

66.476

79.772*

100.226*

3.790

7.756

29.938

20.045

25.057

33.238

39.886*

50.113*

*5V onl y

Periph eral Clo c ks

BUSCLK

(Pin 6) FDCLK

(Pin 7)

16.002 24.003

Reference Clock

REFCLK

(Pin 18)

14.318

Frequency Transitions

A key feature of the ICS9158 is its ability to provide smooth,

glitch-free frequency transitions on the CPU and 2XCPU

clocks when the frequency sele ct pins are changed . The fre-

quency transi tion rate does not violate the Intel 486 or Pentium

specification of less than 0.1% frequency change per clock

period.

Using an Input Clock as a Reference

The ICS9158 is designed to accept a 14.318 MHz crystal as the

input r efer ence. Wit h some externa l changes, it is possible to

use a crystal oscillator or other clock sources. Please see

application note AAN04 for details on driving the ICS9158

with a cl ock.

Stop Clock Feature (Optional Mask Version)

The ICS9158 incorpo rates a uni que stop cloc k fe ature c ompat-

ible with stat ic logic processors. W hen the stop clock pin goes

low, the CPUCLK will go low after the next occurring f alling

edge. When ST OPCLK again goes high, CPUCLK resumes on

the next rising edge of the in terna l clock. This feature enables

fast, glitch-free starts and stops of the CPUCLK and is useful

in Energy Sta rt motherboard applications. Please contact ICS

marketing for more details.

CPUCLK

STOPCLK

ICS9158

24 -DI P Pa ck ag e

Ordering Information

ICS9158N-01

Example:

ICS XXXX M -PPP

Pattern Number (2 or 3 digit number for parts with ROM code patterns)

Package Type

N=DIP

Devic e Type (cons i st s of 3 or 4 digi t num be rs )

Prefix

ICS, AV=Standa rd Device; GSP=Genlock Device

ICS9158

LEAD COUNT 24L

DIMENSION L 0.604

24 Lead SOIC

Ordering Information

ICS9158M-01

Example:

ICS XXXX M -PPP

Pattern Number (2 or 3 digit number for parts with ROM code patterns)

Package Type

M=SOIC

Devic e Type (cons i st s of 3 or 4 digi t num be rs )

Prefix

ICS, AV=Standa rd Device; GSP=Genlock Device

ICS9158