IRL2203NSTRLPBF - INTERNATIONAL RECTIFIER

IRL2203NSPbF

IRL2203NLPbF

HEXFET® Power MOSFET

10/01/10

www.irf.com 1

VDSS = 30V

RDS(on) = 7.0mΩ

ID = 116A

Advanced HEXFET® Power MOSFETs from International Rectifier

utilize advanced processing techniques to achieve extremely low on-

resistance per silicon area. This benefit, combined with the fast switching

speed and ruggedized device design that HEXFET power MOSFETs

are well known for, provides the designer with an extremely efficient and

reliable device for use in a wide variety of applications.

The D2Pak is a surface mount power package capable of accommodating

die sizes up to HEX-4. It provides the highest power capability and the lowest

possible on-resistance in any existing surface mount package. The D2Pak

is suitable for high current applications because of its low internal connection

resistance and can dissipate up to 2.0W in a typical surface mount application.

The through-hole version (IRL2203NL) is available for low-profile applications.

lAdvanced Process Technology

lUltra Low On-Resistance

lDynamic dv/dt Rating

l175°C Operating Temperature

lFast Switching

lFully Avalanche Rated

l100% RG Tested

lLead-Free

Description

TO-262

IRL2203NLPbF

D2Pak

IRL2203NSPbF

Absolute Maximum Ratings

Symbol Parameter Units

ID @ TC = 25°C Continuous Drain Current, VGS @ 10V

ID @ TC = 100°C Continuous Drain Current, VGS @ 10V A

IDM

d D

urrent

PD @TA = 25°C Power Dissipation W

PD @TC = 25°C Power Dissipation W

Linear Derating Factor W/°C

VGS Gate-to-Source Voltage V

IAR

anc

urrent



EAR

epet

anc

ner

dv/dt Peak Diode Recovery dv/dt

V/ns

Operating Junction and

Storage Temperature Range

TSTG Soldering Temperature, for 10 seconds

Thermal Resistance

Symbol Parameter Typ Max Units

RθJC

unct

on-to-

ase

––– 0.85

RθJA

unct

on-to-

ent

(PCB

mount,

stea

state

)

––– 40 °C/W

300 (1.6mm from case)

5.0

°C

-55 to + 175TJ

3.8

180

1.2

± 16

Max

116

400

PD - 95219A

IRL2203NS/LPbF

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 Repetitive rating; pulse width limited by

max. junction temperature. ( See fig. 11 )

 Starting TJ = 25°C, L = 0.16mH RG = 25Ω,

IAS = 60A, VGS=10V (See Figure 12)

ISD ≤ 60A, di/dt ≤ 110A/µs, VDD ≤ V(BR)DSS,

TJ ≤ 175°C

 Pulse width ≤ 400µs; duty cycle ≤ 2%.

Notes:  This is a typical value at device destruction and represents

operation outside rated limits.

 This is a calculated value limited to TJ = 175°C .

 Calculated continuous current based on maximum allowable

junction temperature. Package limitation current is 75A.

 When mounted on 1" square PCB (FR-4 or G-10 Material). For

recommended footprint and soldering techniques refer to

application note #AN-994.

 Rθ is measured at TJ approximately 90°C

Electrical Characteristics @ TJ = 25°C (unless otherwise specified)

Symbol Parameter Min Typ Max Units

V(BR)DSS Drain-to-Source Breakdown Voltage 30 ––– ––– V

∆V(BR)DSS

∆TJ Breakdown Voltage Temp. Coefficient ––– 0.029 ––– V/°C

RDS(on) Static Drain-to-Source On-Resistance ––– ––– 7.0

––– ––– 10

VGS(th) Gate Threshold Voltage 1.0 ––– 3.0 V

fs Forward Transconductance 73 ––– ––– S

IDSS Drain-to-Source Leakage Current ––– ––– 25

––– ––– 250

IGSS Gate-to-Source Forward Leakage ––– ––– 100

Gate-to-Source Reverse Leakage ––– ––– -100

QgTotal Gate Charge ––– ––– 60

Qgs Gate-to-Source Charge ––– ––– 14

Qgd Gate-to-Drain ("Miller") Charge ––– ––– 33

RGGate Resistance 0.2 ––– 3.0 Ω

td(on) Turn-On Delay Time ––– 11 –––

trRise Time ––– 160 –––

td(off) Turn-Off Delay Time ––– 23 –––

tfFall Time ––– 66 –––

Between lead,

6mm (0.25in.)

from package

and center of die contact

Ciss Input Capacitance ––– 3290 –––

Coss Output Capacitance ––– 1270 –––

Crss Reverse Transfer Capacitance ––– 170 –––

EAS Sin

le Pulse Avalanche Ener

––– 1320

290

Source-Drain Ratings and Characteristics

Symbol Parameter Min Typ Max Units

ISContinuous Source Current

(Body Diode) A

ISM Pulsed Source Current

(Body Diode)

c

VSD Diode Forward Voltage ––– ––– 1.2 V

trr Reverse Recovery Time ––– 56 84 ns

Qrr Reverse Recovery Charge ––– 110 170 nC

ton Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)

di/dt = 100A/µs

Conditions

VGS = 0V, ID = 250µA

Reference to 25°C, ID = 1mA

VDS = VGS, ID = 250µA

VDS = 30V, VGS = 0V

VDS = 24V, VGS = 0V, TJ = 125°C

IAS = 60A, L = 0.16mH

VGS = 4.5V, See Fig. 6 and 13

integral reverse

p-n junction diode.

TJ = 25°C, IS = 60A, VGS = 0V

TJ = 25°C, IF = 60A

VGS = 16V

VGS = -16V

MOSFET symbol

showing the

VDD = 15V

ID = 60A

RG = 1.8Ω

ID = 60A

VDS = 24V

Conditions

VGS = 4.5V, See Fig. 10

VGS = 0V

VDS = 25V

ƒ = 1.0MHz, See Fig. 5

µA

VDS = 25V, ID = 60A

VGS = 10V, ID = 60A

VGS = 4.5V, ID = 48A

––– 116

––– ––– 400

Internal Drain Inductance

Internal Source Inductance

4.5 –––

7.5 –––

–––

IRL2203NS/LPbF

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Fig 4. Normalized On-Resistance

Vs. Temperature

Fig 2. Typical Output CharacteristicsFig 1. Typical Output Characteristics

Fig 3. Typical Transfer Characteristics

100

1000

0.1 1 10 100

20µs PULSE WIDTH

T = 25 C

J°

TOP

BOTTOM

VGS

15V

10V

4.5V

3.7V

3.5V

3.3V

3.0V

2.7V

V , Drain-to-Source Voltage (V)

I , Drain-to-Source Current (A)

2.7V

100

1000

0.1 1 10 100

20µs PULSE WIDTH

T = 175 C

J°

TOP

BOTTOM

VGS

15V

10V

4.5V

3.7V

3.5V

3.3V

3.0V

2.7V

V , Drain-to-Source Voltage (V)

I , Drain-to-Source Current (A)

2.7V

100

1000

2.0 3.0 4.0 5.0 6.0 7.0

V = 15V

20µs PULSE WIDTH

V , Gate-to-Source Voltage (V)

I , Drain-to-Source Current (A)

T = 25 C

J°

T = 175 C

J°

-60 -40 -20 020 40 60 80 100 120 140 160 180

0.0

0.5

1.0

1.5

2.0

2.5

T , Junction Temperature ( C)

R , Drain-to-Source On Resistance

(Normalized)

DS(on)

V =

I =

10V

100A

IRL2203NS/LPbF

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Fig 8. Maximum Safe Operating Area

Fig 6. Typical Gate Charge Vs.

Gate-to-Source Voltage

Fig 5. Typical Capacitance Vs.

Drain-to-Source Voltage

Fig 7. Typical Source-Drain Diode

Forward Voltage

020 40 60 80

Q , Total Gate Charge (nC)

V , Gate-to-Source Voltage (V)

FOR TEST CIRCUIT

SEE FIGURE

I =

60A

V = 15V

V = 24V

0.1

100

1000

0.0 0.4 0.8 1.2 1.6 2.0 2.4

V ,Source-to-Drain Voltage (V)

I , Reverse Drain Current (A)

V = 0 V

T = 25 C

J°

T = 175 C

J°

1 10 100

1000

2000

3000

4000

5000

6000

V , Drain-to-Source Voltage (V)

C, Capacitance (pF)

0V,

f = 1MHz

+ C

C SHORTED

iss gs gd , ds

rss gd

oss ds gd

Ciss

Coss

Crss

1 10 100

VDS , Drain-toSource Voltage (V)

100

1000

10000

ID, Drain-to-Source Current (A)

Tc = 25°C

Tj = 175°C

Single Pulse

1msec

10msec

OPERATION IN THIS AREA

LIMITED BY R DS(on)

100µsec

IRL2203NS/LPbF

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Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case

Fig 9. Maximum Drain Current Vs.

Case Temperature

0.01

0.1

0.00001 0.0001 0.001 0.01 0.1

Notes:

1. Duty factor D = t / t

2. Peak T = P x Z + T

1 2

JDM thJC C

t , Rectangular Pulse Duration (sec)

Thermal Response (Z )

thJC

0.01

0.02

0.05

0.10

0.20

D = 0.50

SINGLE PULSE

(THERMAL RESPONSE)

VDS

90%

10%

VGS

d(on)

d(off)

VDS

Pulse Width ≤ 1 µs

Duty Factor ≤ 0.1 %

VGS

D.U.T.

VGS

VDD

Fig 10a. Switching Time Test Circuit

Fig 10b. Switching Time Waveforms

25 50 75 100 125 150 175

100

120

T , Case Temperature ( C)

I , Drain Current (A)

LIMITED BY PACKAGE

IRL2203NS/LPbF

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QGS QGD

Charge

D.U.T. V

3mA

.3µF

50KΩ

.2µF

12V

Current Regulator

Same Type as D.U.T.

Current Sampling Resistors

VGS

Fig 13b. Gate Charge Test Circuit

Fig 13a. Basic Gate Charge Waveform

Fig 12b. Unclamped Inductive Waveforms

Fig 12a. Unclamped Inductive Test Circuit

(BR)DSS

Fig 12c. Maximum Avalanche Energy

Vs. Drain Current

25 50 75 100 125 150 175

100

200

300

400

500

600

Starting T , Junction Temperature ( C)

E , Single Pulse Avalanche Energy (mJ)

TOP

BOTTOM

24A

42A

60A

0.01

Ω

D.U.T

VDS

-V

DRIVER

15V

20V

VGS

IRL2203NS/LPbF

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Peak Diode Recovery dv/dt Test Circuit

P.W. Period

di/dt

Diode Recovery

dv/dt

Ripple ≤5%

Body Diode Forward Drop

Re-Applied

Voltage

Reverse

Recovery

Current

Body Diode Forward

Current

=10V

Driver Gate Drive

D.U.T. I

Waveform

D.U.T. V

Waveform

Inductor Curent

D = P. W .

Period







VDD

• dv/dt controlled by RG

• ISD controlled by Duty Factor "D"

• D.U.T. - Device Under Test

D.U.T*Circuit Layout Considerations

• Low Stray Inductance

• Ground Plane

• Low Leakage Inductance

Current Transformer



* Reverse Polarity of D.U.T for P-Channel

VGS

[ ]

*** VGS = 5.0V for Logic Level and 3V Drive Devices

[ ] ***

Fig 14. For N-channel HEXFET® power MOSFETs

IRL2203NS/LPbF

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D2Pak (TO-263AB) Part Marking Information

D2Pak (TO-263AB) Package Outline

Dimensions are shown in millimeters (inches)

DAT E CODE

YEAR 0 = 2000

WE E K 02

A = AS S E MB L Y S I T E COD E

RECTIFIER

INT E RNAT IONAL PART NUMBER

P = DES IGNATES LEAD - FREE

PRODUCT (OPT IONAL )

F530S

IN THE ASS EMBLY LINE "L"

AS S E MB LED ON WW 02, 2000

THIS IS AN IRF530S WITH

LOT CODE 8024 INTERNATIONAL

LOGO

RECTIFIER

LOT CODE

ASSEMBLY YEAR 0 = 2000

PART NUMBER

DAT E CODE

LINE L

WE E K 02

F530S

LOGO

AS S E MB L Y

LOT CODE

Notes:

1. For an Automotive Qualified version of this part please seehttp://www.irf.com/product-info/auto/

2. For the most current drawing please refer to IR website at http://www.irf.com/package/

IRL2203NS/LPbF

www.irf.com 9

TO-262 Part Marking Information

TO-262 Package Outline

Dimensions are shown in millimeters (inches)

LOGO

RECT IFIE R

INTERNATIONAL

LOT CODE

AS S E MB L Y

LOGO

RECTIFIER

INTERNATIONAL

DAT E CODE

WE E K 19

YEAR 7 = 1997

PART NUMBER

A = AS S E MB L Y S IT E CODE

PRODUCT (OPTIONAL)

P = DESIGNATES LEAD-FREE

EXAMPLE: THIS IS AN IRL3103L

LOT CODE 1789

AS S E MB L Y

PART NUMBE R

DAT E CODE

WE E K 1 9

LINE C

LOT CODE

YEAR 7 = 1997

ASS EMBLED ON WW 19, 1997

IN THE ASS EMBLY LINE "C"

Notes:

1. For an Automotive Qualified version of this part please seehttp://www.irf.com/product-info/auto/

2. For the most current drawing please refer to IR website at http://www.irf.com/package/

IRL2203NS/LPbF

10 www.irf.com

Data and specifications subject to change without notice.

This product has been designed and qualified for the Industrial market.

Qualification Standards can be found on IR’s Web site.

IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105

TAC Fax: (310) 252-7903

Visit us at www.irf.com for sales contact information.10/2010

D2Pak Tape & Reel Information

Dimensions are shown in millimeters (inches)

TRR

FEED DIRECTION

1.85 (.073)

1.65 (.065)

1.60 (.063)

1.50 (.059)

4.10 (.161)

3.90 (.153)

TRL

FEED DIRECTION

10.90 (.429)

10.70 (.421)

16.10 (.634)

15.90 (.626)

1.75 (.069)

1.25 (.049)

11.60 (.457)

11.40 (.449) 15.42 (.609)

15.22 (.601)

4.72 (.136)

4.52 (.178)

24.30 (.957)

23.90 (.941)

0.368 (.0145)

0.342 (.0135)

1.60 (.063)

1.50 (.059)

13.50 (.532)

12.80 (.504)

330.00

(14.173)

MAX.

27.40 (1.079)

23.90 (.941)

60.00 (2.362)

MIN.

30.40 (1.197)

MAX.

26.40 (1.039)

24.40 (.961)

NOTES :

1. COMFORMS TO EIA-418.

2. CONTROLLING DIMENSION: MILLIMETER.

3. DIMENSION MEASURED @ HUB.

4. INCLUDES FLANGE DISTORTION @ OUTER EDGE.