PD70100A & PD70200
PRODUCT DATASHEET
Copyright © 2011 Microsemi
Rev. 1.0 Analog Mixed Signal Group
1 Enterprise, Aliso Viejo, CA 92656, USA; Within the USA: (800) 713-4113, Outside the USA: (949) 221-7100 Fax: (949) 756-0308
1
PD70100A & PD70200
IEEE 802.3af/at PD Front End IC
TM ®
DESCRIPTION
The PD70100A and PD70200
devices are part of Microsemi’s™
series of Power over Ethernet (PoE)
Powered Devices chips (PD). The
PD70100A and PD70200 devices
transmit integrated power and analog
data in a single 12-pin package. They
are used in Powered Devices (PD),
thus enabling next generation network
devices to share power and data over
the same cable.
Microsemi’s new PD family offers a
solution to any PD application
compliant with IEEE802.3af and
IEEE802.3at standards and 4-pairs
extra power applications. The IC
family’s components can be used in
both indoor and outdoor applications.
The device family meets all PD-
side-standards such as:
Detection
Classification
Integrated isolation switch with
inrush current limiter, and over-
current protection.
Two-events classification
recognition and AT flag
generation (PD70200 only).
In addition, the devices have a
discharge mechanism for a DC/DC
input capacitor, ensuring quick
redetection capability in case the RJ-
45 plug is disconnected and
reconnected within a short time span.
PD70200 IC design specifically
supports IEEE802.3at standard,
including two-events classification
detection that enables the PD to
distinguish whether the connected
power source equipment (PSE) is
IEEE802.3at or IEEE802.3af based.
The PD70100A/PD70200 ICs are
designed to support 4-pair
applications for PDs that require
higher power.
IMPORTANT: For the most current data, consult MICROSEMI’s website: http://www.microsemi.com
KEY FEATURES
Designed to Support IEEE802.3af
and IEEE802.3at standards
PD Detection & Programmable
Classification Signature
Two-events Classification Flag
Signature Resistor Disconnection
after Detection
Integrated 0.6 Isolating Switch
and Inrush Current Limiter.
4-pairs support with a single IC for
up to 48W
4-pairs support with two ICs for up
to 96W
Less than 10µA Offset Current
during Detection
Single DC Voltage Input (37V-57V)
Wide Operating Temperature
Range: -40° to +85°C
On-chip Thermal Protection
12-pin 3x4mm Package
RoHS Compliant
APPLICATIONS
Power over Ethernet Powered
Devices
IEEE802.3af & at 10/100/1000
BASE-T
4-pair Extra Power Applications
Indoor as Well as Outdoor
Applications
TYPICAL APPLICATION
24.9K
4.7uF
4.7uF
100k
68nF
100V
10uF
-+
~
~
68nF
100V
-+
~
~
30.9
240K
240K
PD70200
Rdet
1
Rref
2
Rclass
3
VPNin
4NC/AT 5
Pgood 6
Vaux 7
Vpp 8
VPNout
9
24.9K
PD70200
Rdet
1
Rref
2
Rclass
3
VPNin
4NC/AT 5
Pgood 6
Vaux 7
Vpp 8
VPNout
9
47k
OPTO ISOLATOR
30.9
DATA + POWER DATA
AT FLAG INPUT
DC-DC CONTROLLER VCC
DC-DC CONTROLLER ENABLE
PRIMARY DC (-) INPUT
POWER TRANSFORMER
BOOTSTRAP WINDING
PRIMARY DC (+) INPUT
ISOLATED DC OUTPUT (-)
ISOLATED DC OUTPUT (+)
APPLICATION
ISOLATED DC-DC
PD70100A & PD70200
PRODUCT DATASHEET
Copyright © 2011 Microsemi
Rev. 1.0 Analog Mixed Signal Group
1 Enterprise, Aliso Viejo, CA 92656, USA; Within the USA: (800) 713-4113, Outside the USA: (949) 221-7100 Fax: (949) 756-0308
2
PD70100A & PD70200
IEEE 802.3af/at PD Front End IC
TM ®
ABSOLUTE MAXIMUM RATINGS
Supply Input Voltage(VPP) ............................................................ -0.3V to 74 VDC
Port Negative Out Voltage (VPNOUT) ............................................ -0.3V to 74 VDC
RDET............................................................................................... -0.3V to 74 VDC
RCLASS, RREF .................................................................................... -0.3V to 5 VDC
VAUX ............................................................................................ -0.3V to 30 VDC
PGOOD, AT_FLAG (with respect to VPNOUT) .............................. -0.3V to 74 VDC
ESD Protection* ................................................................................. ±1.5kV HBM
Maximum Operating Junction Temperature ................................................ 150°C
Operating Ambient Temperature ..................................................... -40°C to 85°C
Storage Temperature Range ......................................................... -65°C to 150°C
Peak Package Solder Reflow Temp (40 seconds max exposure) .............. 260°C
*All pins except pin 11 (VAUX). Pin 11 ESD Protection ±150V HBM.
Notes: Exceeding these ratings could cause damage to the device. All voltages are with respect
to VPNIN. Currents are positive into, negative out of specified terminal. These are stress
ratings only and functional operation of the device at these or any other conditions beyond
those indicated under “Recommended Operating Conditions” are not implied. Exposure
to “Absolute Maximum Ratings” for extended periods may affect device reliability.
.
PACKAGE PIN OUT
DFN PACKAGE
(Top View)
DFN PACKAGE MARKINGS
“xxxx” Denote Date Code and Lot Identification
PD70100A IS MARKED 70100A
RoHS / Pb-free 100% matte Tin Pin Finish
PACKAGE ORDER INFO THERMAL DATA
TA (°C) 12 Pins DFN 4x3 40 ° C/W THERMAL RESISTANCE-JUNCTION TO AMBIENT
RoHS Compliant / Pb-free 4 ° C/W THERMAL RESISTANCE-JUNCTION TO CASE
-40 to 85 PD70100AILD (IEEE802.3af)
PD70200ILD (IEEE802.3at) Junction Temperature Calculation: TJ = TA + (PD x
θ
JA).
The θJA numbers are guidelines for the thermal performance of
the device/pc-board system. All of the above assume no
ambient airflow.
Note: Available in Tape & Reel. Append the letters “TR” to the part number.
(i.e. PD70200ILD-TR)
ELECTRICAL CHARACTERISTICS
Unless otherwise specified, the following specifications apply over the operating ambient temperature -40°C
TAMB
85°C. Production tests are done at 25°C TA.
Parameter Symbol Test Conditions / Comment Min Typ Max Units
Power Supply
Input Voltage VPP Supports Full IEEE802.3
af/at functionality 0 55 57 V
Power Supply Current at Operating Mode VPP = 55V 1 3 mA
PD70100A & PD70200
PRODUCT DATASHEET
Copyright © 2011 Microsemi
Rev. 1.0 Analog Mixed Signal Group
1 Enterprise, Aliso Viejo, CA 92656, USA; Within the USA: (800) 713-4113, Outside the USA: (949) 221-7100 Fax: (949) 756-0308
3
PD70100A & PD70200
IEEE 802.3af/at PD Front End IC
TM ®
ELECTRICAL CHARACTERISTICS
Unless otherwise specified, the following specifications apply over the operating ambient temperature -40°C
TAMB
85°C. Production tests are done at 25°C TA.
Parameter Symbol Test Conditions / Comment Min Typ Max Units
DETECTION MODE
Detection is connected.
At this voltage range RDET must be on. DETRANGE Measured between
VPP and VPNIN 1.3 10.1 V
Detection Switch ON Resistance
PD-detection RDET-on
2.5V (VPP to VPNIN) 10.1V
Measured between
RDET and VPNIN
50
Ω
Detection is Disconnected RDET-off Measured between
VPP and VPNIN 10.1 12.8 V
Detection Switch OFF Resistance RDET-off
12.8V (VPP to VPNIN)
57.0V
Measured between RDET and
VPNIN
2.0
MΩ
Input Offset Current
IOFFSET 1.1V to 10.1V
-40°C
TJ
85°C 16 μA
IOFFSET 1.1V to 10.1V
-40°C
TJ
55°C 10 μA
CLASSIFICATION MODE
Classification Current Source, Turn ON
Threshold Range Measured at VPP VTH-low-on Turn on for any ICLASS while
VPP increases 11.4 13.7 V
Classification Current Source, Turn OFF
Threshold Range Measured at VPP VTH-high-off Turn off while VPP increases 20.9 23.9 V
Current Limit Threshold ICLASS-LIM 50.0 68 80.0 mA
Input Current IPP When Classification
Function is Disabled ICLASS-DIS Class 0
RCLASS=Disconnect 4.0 mA
Input Current IPP When Classification
Function is Enabled ICLASS-EN
Class 1
RCLASS= 133Ω±1% 9.0 10.5 12.0 mA
Class 2
RCLASS= 69.8 Ω±1% 17.0 18.5 20.0 mA
Class 3
RCLASS= 45.3 Ω±1% 26.0 28.0 30.0 mA
Class 4
RCLASS= 30.9 Ω±1% 36.0 40.0 44.0 mA
MARK
Mark, Working Voltage Range VMARK
When voltage decreases
Measured between
VPP to VPNIN
4.9 10.1 V
Mark Current IMARK Chip current 0.25 4 mA
ISOLATION SWITCH
Isolation Switch MOSFET Switches from
Off to ILIM-LOW VSW-START 36 42 V
Isolation Switch MOSFET Switched Off VSW-OFF 30.5 34.5 V
Startup Current Limit, ILIM I
LIM-LOW 105 240 325 mA
VPNIN to VPNOUT Threshold Voltage for
ILIM – LOW to ILIM-HIGH Switchover VDIFF When VPNIN to VPNOUT
VDIFF, Isolating switch 0.7 V
PD70100A & PD70200
PRODUCT DATASHEET
Copyright © 2011 Microsemi
Rev. 1.0 Analog Mixed Signal Group
1 Enterprise, Aliso Viejo, CA 92656, USA; Within the USA: (800) 713-4113, Outside the USA: (949) 221-7100 Fax: (949) 756-0308
4
PD70100A & PD70200
IEEE 802.3af/at PD Front End IC
TM ®
ELECTRICAL CHARACTERISTICS
Unless otherwise specified, the following specifications apply over the operating ambient temperature -40°C
TAMB
85°C. Production tests are done at 25°C TA.
Parameter Symbol Test Conditions / Comment Min Typ Max Units
switches over from ILIM-LOW
to ILIM-HIGH.
Over Current Protection Current Limit OCP 1500 1800 2000 mA
Continuous Operation Load Current ILOAD
Isolating switch at ILIM-HIGH
PD70100A
PD70200
350
600
450
1123
mA
mA
Continuous Operation Total RDSON
SW-RDSON
Total resistance between
VPNIN and VPNOUT
Isolating switch at ILIM-HIGH
0.6
DC/DC CAPACIT OR DISCHA RGER
DC/DC Input Capacitance
For reference only
Guaranteed by design
(not tested on production)
220 µF
Discharge Current. 7.0V VPP to VPNOUT 30V 22.8 32 50 mA
Full Discharge Time for Full Discharge of
Input Capacitance TDSC
VPP < UVLO threshold
Guaranteed by design
(not tested in production)
500 ms
AT_FLAG
Output Low Voltage IOL = 0.75mA 0.4 V
IOL MAX = 5mA 2.5 V
Leakage Current VATFLAG = 57V 1.7 µA
PGOOD
Output Low Voltage IOL = 0.75mA 0.4 V
IOL MAX = 5mA 2.5 V
Leakage Current VPGOOD = 57V 1.7 µA
THERMAL SHUTDOWN
Thermal Shutdown Temperature 180 200 220 °C
VAUX (Reference to VPNOUT)
VAUX Output Voltage On VAUX-on Isolating switch at ILIM-HIGH
and PGOOD = Low 9.5 10.5 11.8 V
Output Current Peak IVAUXP
Capacitor = 30uF
When TLOAD 5mS
Isolating switch at ILIM-HIGH
and PGOOD = Low
0 10 mA
Output Continuous Current IVAUXC
When TLOAD 10mS
Isolating switch at ILIM-HIGH
and PGOOD = Low
0 2 mA
VAUX Output Current Limit IVAUX Isolating switch at ILIM-HIGH
and PGOOD = Low 10 32 mA
PD70100A & PD70200
PRODUCT DATASHEET
Copyright © 2011 Microsemi
Rev. 1.0 Analog Mixed Signal Group
1 Enterprise, Aliso Viejo, CA 92656, USA; Within the USA: (800) 713-4113, Outside the USA: (949) 221-7100 Fax: (949) 756-0308
5
PD70100A & PD70200
IEEE 802.3af/at PD Front End IC
TM ®
PD70100A Functional Block Diagram
Figure 1: PD70100A Functional Block Diagram
PD70100A & PD70200
PRODUCT DATASHEET
Copyright © 2011 Microsemi
Rev. 1.0 Analog Mixed Signal Group
1 Enterprise, Aliso Viejo, CA 92656, USA; Within the USA: (800) 713-4113, Outside the USA: (949) 221-7100 Fax: (949) 756-0308
6
PD70100A & PD70200
IEEE 802.3af/at PD Front End IC
TM ®
PD70200 Functional Block Diagram
Figure 2: PD70200 Functional Block Diagram
PD70100A & PD70200
PRODUCT DATASHEET
Copyright © 2011 Microsemi
Rev. 1.0 Analog Mixed Signal Group
1 Enterprise, Aliso Viejo, CA 92656, USA; Within the USA: (800) 713-4113, Outside the USA: (949) 221-7100 Fax: (949) 756-0308
7
PD70100A & PD70200
IEEE 802.3af/at PD Front End IC
TM ®
FUNCTIONAL PIN DESCRIPTION
Pin PD70100A Pin
Name PD70200 Pin
Name Type Description
1 RDET R
DET
Valid Detection resistor. Connect external 24.9K detection
resistor between RDET and VPP
2 RREF R
REF Bias current resistor
3 RCLASS R
CLASS
Power classification setting. Connect external class resistor
between RCLASS and VPNIN
4
VPNIN VPNIN Power
VPort Negative input. Connected to the isolating SW input. N-
channel MOSFET source. The exposed thermal PAD should be
connect to these pins.
5
6 N.C N.C
7
VPNOUT VPNOUT Power/Gnd
Vport Negative output. Connected to the isolating SW output. N-
channel MOSFET Drain. Primary side Ground.
A decent ground plane should be deployed around this pin
whenever is possible
8
9 N.C AT_FLAG Open drain
The two-event detector should discern between AF and AT
classification waveforms and outputs the AT_FLAG (PD70200
only)
10 PGOOD PGOOD Open drain
After startup a PGOOD flag is generated in order to optionally
inform the application DC/DC converter that the power rails are
ready.
11 VAUX VAUX Power
Auxiliary output voltage to VPNOUT.
Can be used for DC-DC startup for bootstrap initiation.
12 VPP VPP Power
High voltage positive input, reference to VPNIN and high voltage
positive input, reference to VPNOUT during capacitor discharge
EP EPAD EPAD Connect to VPNIN. EPAD should be connected to a large copper
area for improved thermal management.
PD70100A & PD70200
PRODUCT DATASHEET
Copyright © 2011 Microsemi
Rev. 1.0 Analog Mixed Signal Group
1 Enterprise, Aliso Viejo, CA 92656, USA; Within the USA: (800) 713-4113, Outside the USA: (949) 221-7100 Fax: (949) 756-0308
8
PD70100A & PD70200
IEEE 802.3af/at PD Front End IC
TM ®
THEORY OF OPERATION
DETAIL DESCRIPTION
PD70100A/PD70200 IC provides IEEE 802.3af/at
compliant PD Front-End functions including Detection,
Physical Layer Classification, Two-Events Classification
(PD70200 only), Auxiliary Voltage Output, Power Good,
Soft-Start Current Limiting, Over-Current Protection,
and Bulk Capacitor Discharge.
DETECTION
IEEE 802.3af/at compliant detection is provided by
means of a 24.9K resistor connected between VPP
and RDET pin. R
DET pin is connected to VPNIN via an
open drain MOSFET with a maximum specified RDSON
of 50. Internal logic monitors VPP to VPNIN and
connects the RDET pin to VPNIN when the rising VPP to
VPNIN voltage is between 2.5V and 10.1V. When rising
VPP to VPNIN voltage exceeds 10.1V, the MOSFET is
switched off. Once above 10.1V, falling VPP to VPNIN
voltage between 2.45V and 4.85V will reconnect RDET
pin to VPNIN.
PHYSICAL LAYER CLASSIFICATION
Physical Layer (hardware) Classification per IEEE
802.3af/at is generated via a regulated reference
voltage of 1.2V, switched onto the RCLASS pin. Internal
logic monitors the VPP to VPNIN voltage and connects
the 1.2V reference to RCLASS pin at a rising VPP to VPNIN
voltage threshold between 11.1V and 13.5V. Once VPP
to VPNIN has exceeded the rising threshold, there is a
1V minimum hysteresis between the VPP rising (turn-on)
threshold and the VPP falling (turn-off) threshold.
The 1.2V reference stays connected to the RCLASS pin
until the VPP to VPNIN rising voltage exceeds the upper
turn-off threshold of 20.9V to 23.9V. The 1.2V
reference voltage is disconnected from the RCLASS pin at
VPP to VPNIN voltages above the upper threshold.
Classification current signature is provided via a
resistor connected between RCLASS pin and VPNIN. The
classification current is therefore the current drawn by
the PD70100A/PD70200 IC during the classification
phase, and is simply the 1.2V reference voltage divided
by the RCLASS resistor value. The maximum current
available at the RCLASS pin is current limited to 55mA
(typical).
TWO-EVENTS DETECTION AND AT FLAG
The PD70200 IC provides IEEE 802.3at Type 2 compliant
detection of the “Two Events Classification Signature”, and
generation of the AT flag. This feature is available on the
PD70200 IC only.
Simply put, the “Two Events Classification Signature” is a
means by which an IEEE 802.3at Type 2 Power Source can
inform a compliant Power Device (PD) that it is AT Type 2
compliant, and as such is capable of providing AT Type 2
power levels.
The Power Source communicates with a Type 2 compliant
signature by toggling the VPP to VPNIN voltage twice (2
“events”) during the Physical Layer Classification phase.
The VPP to VPNIN voltage is toggled from the Physical Layer
Classification’s voltage level (13.5V to 20.9V) down to a
voltage “Mark” level. Voltage “Mark” level is specified as a
VPP to VPNIN voltage of 4.9V to 10.1V.
PD70200 IC recognizes a VPP to VPNIN falling edge from
Classification level to Mark level as being one event of the
Two-Events Signature. If two such falling edges are
detected, PD70200 will assert AT flag by means of an open
drain MOSFET connected between AT_FLAG pin and
VPNOUT.
AT_FLAG pin is active low; a low impedance state
between AT_FLAG and VPNOUT indicates a valid Two-
Events Classification Signature was received, and the
Power Source is AT Type 2 compliant.
AT_FLAG MOSFET is capable of 5mA of current and can
be pulled up to VPP.
SOFT START AND INRUSH CURRENT PROTECTION
PD70100A/PD70200 IC contains an internal isolation
switch, that provides ground isolation between Power
Source and PD application during Detection and
Classification phases. The isolation switch is a N-channel
MOSFET, wired in a common source configuration where
the MOSFET’s Source is connected to Power Source
ground at VPNIN, and the MOSFET’s Drain is connected to
application’s primary ground at VPNOUT.
PD70100A & PD70200
PRODUCT DATASHEET
Copyright © 2011 Microsemi
Rev. 1.0 Analog Mixed Signal Group
1 Enterprise, Aliso Viejo, CA 92656, USA; Within the USA: (800) 713-4113, Outside the USA: (949) 221-7100 Fax: (949) 756-0308
9
PD70100A & PD70200
IEEE 802.3af/at PD Front End IC
TM ®
THEORY OF OPERATION
Internal logic monitors VPP to VPNIN voltage and keeps
the MOSFET in a high impedance state until VPP to
VPNIN voltage reaches turn-on threshold of 36V to 42V.
Once VPP to VPNIN voltage exceeds this threshold, the
MOSFET is switched into one of two modes.
The mode into which the MOSFET is switched is
determined by the voltage developed across the
MOSFET, or put another way, the VPNOUT to VPNIN
differential voltage. Two modes are defined below:
Isolation Switch Modes
VPNOUT
to VPNIN Mode Description
> 0.7V Soft Start
Mode
Limits VPNOUT current to
240mA (typical)
0.7V
Normal
Operating
Mode
Limits VPNOUT current to
1.8A (typical)
By controlling the MOSFET current based on VPNOUT
to VPNIN voltage, inrush currents generated by fully
discharged bulk capacitors can be limited. This method
limits current to a maximum of 350mA, compliant with
IEEE 802.3af/at specification.
Soft Start current limiting is required to reduce
occurrences of voltage sag at the PD input during
device power-up. A comparison is shown in Figure 3.
DCDC
Inrush
C
I
Slope
/
=
Figure 3. Comparison of input voltages without Soft Start
(Hard startup), and with Soft Start (Soft startup).
Once bulk capacitance has charged up to a point where
VPNOUT to VPNIN differential voltage is less than 0.7V, the
isolation MOSFET is switched into normal operating mode
with MOSFET current limit set at 1.8A (typical), to provide
over-current protection.
PD70100A and PD70200 ICs are different in their
respective isolation MOSFET’s continuous current handling
capability:
PD70100A: 450mA (max.)
PD70200: 1123mA (max.)
An adequate heat sink for the PD70100A/PD70200 IC’s
exposed pad must be provided to achieve these current
levels without damaging the IC. A large, heavy copper fill
area and/or a heavy ground plane with Thermal Vias is
recommended. Electrically the exposed pad ground plane
should be connected to VPNIN.
Internal logic monitoring VPP to VPNIN will place the
isolation switch MOSFET in a high impedance state if
voltage between VPP and VPNIN drops below 31V to 34V.
OVER-CURRENT PROTECTION
Over-current protection is provided on the
PD70100A/PD70200 IC using the Isolation MOSFET
Switch, which limits the VPNOUT current to 1.8A during
normal operation. See previous description of Soft Start.
POWER GOOD
During Soft-Start mode, the PD70100A/PD70200 IC
monitors VPNOUT to VPNIN differential voltage. When this
voltage is less than 0.7V (max.), the IC enters normal
operation mode and the isolation switch current limit is
increased to 1.8A (typical). At this same 0.7V (max.)
threshold the Power Good signal is asserted by means of
an open drain MOSFET between PGOOD and VPNOUT.
PGOOD pin is active low; a low impedance state between
PGOOD and VPNOUT indicates the Soft-start mode has
finished and the isolation switch has transitioned into
normal operating mode.
PGOOD MOSFET can handle current of 5mA and can be
pulled up to VPP.
PD70100A & PD70200
PRODUCT DATASHEET
Copyright © 2011 Microsemi
Rev. 1.0 Analog Mixed Signal Group
1 Enterprise, Aliso Viejo, CA 92656, USA; Within the USA: (800) 713-4113, Outside the USA: (949) 221-7100 Fax: (949) 756-0308
10
PD70100A & PD70200
IEEE 802.3af/at PD Front End IC
TM ®
THEORY OF OPERATION
AUXILIARY VOLTAGE OUTPUT
PD70100A/PD70200 IC provides a 10.5V (typical)
regulated output to be used as a start-up supply for
DC/DC controllers whose VCC is provided via a
bootstrap winding. This regulated supply is available at
VAUX pin, and is referenced to VPNOUT pin. VAUX
supply is designed for low-duty operation, and should
not be designed as a primary housekeeping supply.
The current capability is continuous 2mA, with 10mA
peak (10ms). VAUX output is current-limited at 10mA
(min.).
For stability, the VAUX regulator requires a minimum
of 4.7µF ceramic capacitor connected directly between
VAUX and VPNOUT pins.
THERMAL PROTECTION
Both PD70100A and PD70200 IC include temperature
sensors which individually monitor both the isolation
MOSFET and the Classification Current Source for over
temperature conditions. In case of an over temperature
condition, the sensor will activate protection circuitry
which will disconnect its respective monitored function.
BULK CAPACITOR DISCHARGE
The bulk capacitor discharge circuitry eliminates the need
to place a diode in series with the VPP line to prevent an
application’s bulk capacitance from discharging through the
detection resistor and the isolation switch MOSFET’s body
diode. Discharge current through the detection resistor can
cause failure of the detection signature in cases where a PD
is connected and the bulk capacitance is not fully
discharged.
During normal operation, PD70100A/PD70200 IC
continuously monitors voltage at VPP to VPNIN. Should VPP
to VPNIN voltage fall below isolation switch turn-off threshold
(31V to 34V), isolation switch MOSFET is immediately
placed in a high-impedance state. At this point the internal
logic monitors the voltage at VPP to VPNOUT. If VPP to
VPNOUT voltage is between 1.5V to 32V, a 23mA (min.)
constant current source is connected across the VPP and
VPNOUT pins. This constant current source provides bulk
capacitor discharge.
A 220µF bulk capacitance can be discharged from 32V to
1.5V in a maximal period of 292ms.
PD70100A & PD70200
PRODUCT DATASHEET
Copyright © 2011 Microsemi
Rev. 1.0 Analog Mixed Signal Group
1 Enterprise, Aliso Viejo, CA 92656, USA; Within the USA: (800) 713-4113, Outside the USA: (949) 221-7100 Fax: (949) 756-0308
11
PD70100A & PD70200
IEEE 802.3af/at PD Front End IC
TM ®
LD 12 Pin Plastic DFN 4x3 mm
e
D
E
A3
A1
A
E2
D2
L
Pin 1
ID
K
b
Note:
1. Dimensions do not include mold flash or
protrusions; these shall not exceed 0.155mm(.006”) on any
side. Lead dimension shall not include solder coverage.
Dim MILLIMETERS INCHES
MIN MAX MIN MAX
A 0.80 1.00 0.031 0.039
A1 0.00 0.05 0.000 0.002
A3 0.20 REF 0.008 REF
D 4.00 BSC 0.157 BSC
E 3.00 BSC 0.118 BSC
D2 3.00 3.70 0.118 0.146
E2 1.40 1.80 0.055 0.071
e 0.50 BSC 0.0197 BSC
K 0.20 MIN 0.008 MIN
L 0.30 0.50 0.012 0.020
b 0.18 0.30 0.007 0.012
PD70100A & PD70200
PRODUCT DATASHEET
Copyright © 2011 Microsemi
Rev. 1.0 Analog Mixed Signal Group
1 Enterprise, Aliso Viejo, CA 92656, USA; Within the USA: (800) 713-4113, Outside the USA: (949) 221-7100 Fax: (949) 756-0308
12
PD70100A & PD70200
IEEE 802.3af/at PD Front End IC
TM ®
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liability or warranties relating to fitness for a particular purpose, merchantability, or infringement of any patent,
copyright or other intellectual property right. The product is subject to other terms and conditions which can be
located on the web at http://www.microsemi.com/legal/tnc.asp
Revision History
Revision Level /
Date
Para. Affected Description
0.1 / April 2010 Preliminary Release
0.3 / June 2010 Add Classification Pulse Diagrams
0.3 27 Jul 10 Changing catalog numbers metrology
0.3 12 Nov 10 Extensive changes to document format and Theory of
Operation; corrected package drawing; added Product
Highlight and Typical Characteristics
0.4 Dec 23 2010 Package update
0.5 Jan 05 2011 Package update
0.6 Jul 13 2011 Specification Update
1.0 March 2012 Updated Document Address Footer & Characteristics
© 2011 Microsemi Corp.
All rights reserved.
For support contact: sales_AMSG@microsemi.com
Visit our web site at: www.microsemi.com Cat. Num: DS_PD70100A_PD70200