IRFR4105ZTR - International Rectifier

IRFR4105Z

IRFU4105Z

HEXFET® Power MOSFET

VDSS = 55V

RDS(on) = 24.5mΩ

ID = 30A

8/25/03

www.irf.com 1

AUTOMOTIVE MOSFET

PD - 94752

Specifically designed for Automotive applications, this HEXFET®

Power MOSFET utilizes the latest processing techniques to

achieve extremely low on-resistance per silicon area. Additional

features of this design are a 175°C junction operating tempera-

ture, fast switching speed and improved repetitive avalanche

rating . These features combine to make this design an extremely

efficient and reliable device for use in Automotive applications and

a wide variety of other applications.

Description

●Advanced Process Technology

●Ultra Low On-Resistance

●175°C Operating Temperature

●Fast Switching

●Repetitive Avalanche Allowed up to Tjmax

Features

D-Pak

IRFR4105Z I-Pak

IRFU4105Z

HEXFET® is a registered trademark of International Rectifier.

Absolute Maximum Ratings

Parameter Units

ID @ TC = 25 °C Cont inuous Dr ain C urrent , VGS @ 10V (Silicon Limited)

ID @ TC = 10 0°C Cont inuous Dr ain C urrent , VGS @ 10V A

IDM

urrent

PD @TC = 25°C Power Dissipati on W

Li ne ar D erating Fac tor W/ °C

VGS Gate- t o- Sour c e Voltage V

EAS (Thermally limited)

anc

ner

EAS (Tested )

anc

ner

este

IAR

anc

urrent



EAR

epet

anc

ner

TJ Ope r ating J unc t i on and

TSTG Storage Te m perature Range °C

Soldering Temperature, for 10 seconds

Mo unti ng Torque, 6-32 or M 3 scr ew

Thermal Resi stanc e Parameter Typ. Max. Units

RθJC Junction-to-Case ––– 3.12

RθJA

unct

on-to-

ent

(PCB

mount

)

––– 40 °C/W

RθJA Junction-to-Ambient ––– 110

See Fig. 12a, 12b , 15, 16

0.32

± 20

Max.

120

-5 5 t o + 17 5

300 ( 1.6m m f rom ca se )

10 lbf

in (1.1N

IRFR/U4105Z

2www.irf.com

Electrical Characteristics @ TJ = 25°C (unless otherwise specified)

Parameter Min. Typ. Max. Units

V(BR)DSS Drain-to-Source Br eakdow n Vol tage 55 ––– ––– V

∆V(BR)DSS

∆TJ B reak down V o l t age Te m p. Co efficie nt ––– 0. 053 ––– V /°C

RDS(on) Static D rai n-to-Source On- Resistance ––– 19 24.5 mΩ

VGS(th) Gate Thre shold Voltage 2.0 ––– 4.0 V

gf s F orw a r d Trans c ond uctan c e 16 ––– ––– S

IDSS Drain-to-Source Leakage Current ––– ––– 20 µA

––– ––– 250

IGSS Gate-to-Source Forward Leakage ––– ––– 200 nA

Gate-to-S ource Reve rse Leaka ge ––– ––– -200

QgTotal Gate Charge ––– 18 27

Qgs Gate-to-Source Charge ––– 5.3 ––– nC

Qgd Ga t e - to- Dr ain (" Miller" ) Ch arge ––– 7. 0 –––

td(on) Turn- On D elay Tim e ––– 10 –––

trRise Time –––40–––

td(off) Turn-Off Delay Time – –– 26 ––– ns

tfFall Time –––24–––

LDInte rna l D rai n Indu ctance ––– 4 .5 ––– Bet ween lead,

nH 6mm (0.25in.)

LSInte r nal Sour ce Ind uctan ce ––– 7.5 ––– from package

and center of die contact

Ciss In put Capaci tance ––– 740 –––

Coss O utpu t C apacitance ––– 140 –––

Crss Reve rse Transf er Capacitance ––– 74 ––– pF

Coss O utpu t C apacitance ––– 450 –––

Coss O utpu t C apacitance ––– 110 –––

Coss ef f. Effecti v e O utpu t Capacitance ––– 180 –––

Source-Drain Ratin

s and Characteristics

Paramet e r Min . Typ. Max . Un its

ISCo ntinuo us Sour c e Cu r rent ––– – –– 30

(Body Diode) A

ISM Pulsed Source Current ––– ––– 120

(Body Diode)

c

VSD Diode Forward Voltage ––– ––– 1.3 V

trr Reve r se Reco ver y Ti me ––– 19 2 9 ns

Qrr Reverse R ecovery Cha r ge ––– 14 21 n C

ton Forward Turn-On Time Intrinsic turn-on time is negligible ( turn-on is dominated by LS+LD)

VDS = 15V , I D = 18A

ID = 18A

VDS = 44V

Conditions

VGS = 10V

VGS = 0V

VDS = 25V

ƒ = 1. 0M H z

VGS = 20V

VGS = -20V

MOSFET symbol

showing the

integra l revers e

p-n ju nctio n diode.

TJ = 25°C, IS = 18A, VGS = 0V

TJ = 25°C, IF = 18 A, VDD = 28V

di /dt = 100A/µs

Conditions

VGS = 0V, ID = 25 0µA

Referenc e to 25 °C, ID = 1mA

VGS = 10V, ID = 18A

VDS = VGS, ID = 250µ A

VDS = 55V , V GS = 0V

VDS = 55V , V GS = 0V , TJ = 12 5°C

VGS = 0 V, VDS = 1.0V , ƒ = 1.0MHz

VGS = 0 V, VDS = 44V, ƒ = 1.0MH z

VGS = 0V, VDS = 0V to 44 V

VGS = 10V

VDD = 28V

ID = 18A

RG = 24.5 Ω

IRFR/U4105Z

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0 1 10 100

0.1 110 100

VDS, Dr ain-to-Source Vol tage (V)

0.1

100

1000

ID, Drain-to-Source Current (A)

60µs PU LSE WIDT H

Tj = 25°C

4.5V

Fig 2. Typical Output CharacteristicsFig 1. Typical Output Characteristics

Fig 3. Typical Transfer Characteristics Fig 4. Typical Forward Transconductance

Vs. Drain Current

VGS

TOP 15V

10V

8.0V

7.0V

6.0V

5.5V

5.0V

BOTTOM 4.5V

0 1 10 100

0.1 110 100

VDS, Dr ain-to-Source Vol tage (V)

100

1000

ID, Drain-to-Source Current (A)

60µs PU LSE WIDT H

Tj = 175°C

4.5V

VGS

TOP 15V

10V

8.0V

7.0V

6.0V

5.5V

5.0V

BOTTOM 4.5V

4 5 6 7 8 9 10

VGS, G ate-to-Source Vol tage (V)

100

1000

ID, Drain-to-Source Current (Α)

VDS = 25V

60µs PU LSE WIDT H

TJ = 25°C

TJ = 175°C

0 10203040

ID, Drai n-to-S ource Cur rent (A)

Gfs, Forward Transconductance (S)

TJ = 25°C

TJ = 175°C

VDS = 8.0V

380µs PU LSE WIDT H

IRFR/U4105Z

4www.irf.com

Fig 8. Maximum Safe Operating Area

Fig 6. Typical Gate Charge Vs.

Gate-to-Source Voltage

Fig 5. Typical Capacitance Vs.

Drain-to-Source Voltage

Fig 7. Typical Source-Drain Diode

Forward Voltage

110 100

VDS, Dr ain-to-Source Vol tage (V)

200

400

600

800

1000

1200

C, Capacitance (pF)

Coss

Crss

Ciss

VGS = 0V, f = 1 MHZ

Ciss = Cgs + Cgd, Cds SHORTED

Crss = Cgd

Coss = Cds + Cgd

0 5 10 15 20 25 30

QG Total Gate Charge (nC)

VGS, Gate-to-Source Voltage (V)

VDS= 44V

VDS= 28V

VDS= 11V

ID= 18A

FOR TEST CIRCUIT

SEE FIGURE 13

0.0 0.5 1.0 1.5 2.0

VSD, Source-t oDrain V oltage (V)

0.1

1.0

10.0

100.0

1000.0

ISD, Reverse Drain Current (A)

TJ = 25°C

TJ = 175°C

VGS = 0V

1 10 100 1000

VDS , Dr ain-toS ource Voltage (V )

0.1

100

1000

ID, Drain-to-Source Current (A)

Tc = 25°C

Tj = 175°C

Singl e Pulse

1msec

10msec

OPERATION IN THIS AREA

LIMITED BY RDS(on)

100µsec

IRFR/U4105Z

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Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case

Fig 9. Maximum Drain Current Vs.

Case Temperature Fig 10. Normalized On-Resistance

Vs. Temperature

25 50 75 100 125 150 175

TJ , Juncti on Temperatur e (° C)

ID , Drain Current (A)

-60 -40 -20 020 40 60 80 100 120 140 160 180

TJ , Juncti on Temperatur e (° C)

0.5

1.0

1.5

2.0

2.5

RDS(on) , Drain-to-Source On Resistance

(Normalized)

ID = 18A

VGS = 10V

1E-006 1E-005 0.0001 0.001 0.01

t1 , Rectangul ar Pulse Duration (sec)

0.001

0.01

0.1

Thermal Response ( Z thJC )

0.20

0.10

D = 0. 50

0.02

0.01

0.05

SINGLE PULSE

( THERMAL RESPONSE ) Notes:

1. Duty Factor D = t1/t2

2. Peak Tj = P dm x Zt hjc + Tc

Ri (°C/W) τi (sec)

1.100 0.000174

1.601 0.000552

0.418 0.007193

τJ

τ1

τ1τ2

τ2τ3

τ3

R1R2

R2R3

τC

Ci i/Ri

Ci= τi/Ri

IRFR/U4105Z

6www.irf.com

Charge

D.U.T. V

3mA

.3µF

50KΩ

.2µF

12V

Current Regulator

Same Type as D.U.T.

Current Sampling Resistors

10 V

Fig 13b. Gate Charge Test Circuit

Fig 13a. Basic Gate Charge Waveform

Fig 12c. Maximum Avalanche Energy

Vs. Drain Current

Fig 12b. Unclamped Inductive Waveforms

Fig 12a. Unclamped Inductive Test Circuit

(BR)DSS

Fig 14. Threshold Voltage Vs. Temperature

0.01

Ω

D.U.T

VDS

-V

DRIVER

15V

20V

VGS

25 50 75 100 125 150 175

Starti ng TJ, Junct ion Temperat ure (°C)

100

120

EAS, Single Pulse Avalanche Energy (mJ)

TOP 2.0A

3.5A

BOTTOM 18A

-75 -50 -25 025 50 75 100 125 150 175

TJ , Temperature ( °C )

2.0

2.5

3.0

3.5

4.0

4.5

VGS(th) Gate threshold Voltage (V)

ID = 250µA

IRFR/U4105Z

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Fig 15. Typical Avalanche Current Vs.Pulsewidth

Fig 16. Maximum Avalanche Energy

Vs. Temperature

Notes on Repetitive Avalanche Curves , Figures 15, 16:

(For further info, see AN-1005 at www.irf.com)

1. Avalanche failures assumption:

Purely a thermal phenomenon and failure occurs at a

temperature far in excess of T jmax. This is validated for

every part type.

2. Safe operation in Avalanche is allowed as long asTjmax is

not exceeded.

3. Equation below based on circuit and waveforms shown in

Figures 12a, 12b.

4. PD (ave) = Average power dissipation per single

avalanche pulse.

5. BV = Rated breakdown voltage (1.3 factor accounts for

voltage increase during avalanche).

6. Iav = Allowable avalanche current.

7. ∆T = Allowable rise in junction temperature, not to exceed

Tjmax (assumed as 25°C in Figure 15, 16).

tav = Average time in avalanche.

D = Duty cycle in avalanche = tav ·f

ZthJC(D, tav) = Transient thermal resistance, see figure 11)

PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC

Iav = 2DT/ [1.3·BV·Zth]

EAS (AR) = PD (ave)·tav

1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01

tav (sec)

0.1

100

Avalanche Current (A)

0.05

Dut y Cycl e = Single Pulse

0.10

Allowed avalanche Current vs

avalanche pulsewidth, tav

assuming ∆Tj = 25°C due to

avalanche losses. Note: In no

case should Tj be allowed to

exceed Tjmax

0.01

25 50 75 100 125 150 175

Starti ng TJ , Junction Tem perat ure (°C)

EAR , Avalanche Energy (mJ)

TOP Single Pulse

BOTTOM 1% Du ty Cycle

ID = 18A

IRFR/U4105Z

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Fig 17. Peak Diode Recovery dv/dt Test Circuit for N-Channel

HEXFET® Power MOSFETs

Circuit Layout Considerations

• Low Stray Inductance

• Ground Plane

• Low Leakage Inductance

Current Transformer

P.W. Period

di/dt

Diode Recovery

dv/dt

Ripple ≤5%

Body Diode Forward Drop

Re-Applied

Voltage

Reverse

Recovery

Current Body Diode Forward

Current

VGS=10V

VDD

ISD

Driver Gate Drive

D.U.T. ISD Waveform

D.U.T. VDS Waveform

Inductor Curent

D = P.W.

Period

* VGS = 5V for Logic Level Devices







RGVDD

• dv/dt controlled by RG

• Driver same type as D.U.T.

• ISD controlled by Duty Factor "D"

• D.U.T. - Device Under Test

D.U.T



VDS

90%

10%

VGS t

d(on)

d(off)

VDS

Pulse Width ≤ 1 µs

Duty Factor ≤ 0.1 %

VGS

D.U.T.

10V

VDD

Fig 18a. Switching Time Test Circuit

Fig 18b. Switching Time Waveforms

IRFR/U4105Z

www.irf.com 9

D-Pak (TO-252AA) Package Outline

Dimensions are shown in millimeters (inches)

D-Pak (TO-252AA) Part Marking Information

6.73 (.265)

6.35 (.250)

- A -

1 2 3

6.22 (.245)

5.97 (.235)

- B -

3X 0.89 (.035)

0.64 (.025)

0.25 (.010) M A M B

4. 57 (.180 )

2.28 (.090)

2X 1.14 (.045)

0.76 (.030)

1. 52 (.060 )

1. 15 (.045 )

1.02 (.040)

1.64 (.025)

5.46 (.215)

5.21 (.205) 1.27 (.050)

0.88 (.035)

2.38 (.094)

2.19 (.086) 1.14 (.045)

0.89 (.035)

0.58 (.023)

0.46 (.018)

6.45 (.245)

5.68 (.224)

0.51 (.020)

MIN.

0. 58 (.023 )

0. 46 (.018 )

LEAD ASSIGNM ENTS

1 - GATE

2 - DRAIN

3 - SOURCE

4 - DRAIN

10.42 (.410)

9.40 (.370)

NOTES:

1 DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982.

2 CONTROLLIN G DIME NSIO N : INCH.

3 CONFORMS TO JEDEC OUTLINE TO-252AA.

4 DIMENSI O NS SHOWN ARE BEFORE SOLDER DIP,

SOLDER DIP MAX. +0.16 (.006).

EXAMPLE:

LOT CODE 9U1P

T HIS IS AN IRFR120

WITH ASSEMBLY

WE E K = 16

DAT E CODE

YEAR = 0

LOGO

RECTIFIER

INT E RNAT IONAL

AS S E MB L Y

LOT CODE

016

IRF U120

9U 1P

Notes : This part marking information applies to devices produced before 02/26/2001

INT E RNAT IONAL

LOGO

RECTIFIER

3412

IRF U120

916A

LOT CODE

AS S E MB L Y

EXAMPLE:

WITH ASSEMBLY

T HIS IS AN IRFR120

YE AR 9 = 1999

DAT E CODE

LINE A

WE E K 1 6

IN THE ASSEMBLY LINE "A"

AS SEMBLED ON WW 16, 1999

L OT CODE 1234

PART NUMBER

Notes : This part marking information applies to devices produced after 02/26/2001

IRFR/U4105Z

10 www.irf.com

I-Pak (TO-251AA) Package Outline

Dimensions are shown in millimeters (inches)

I-Pak (TO-251AA) Part Marking Information

6.73 (.265)

6.35 (.250)

- A -

6.22 (.245)

5.97 (.235)

- B -

3X 0.89 (.03 5)

0.64 (.02 5)

0.25 (.010) M A M B

2.28 (.090)

1.14 (.04 5)

0.76 (.03 0)

5.46 ( .215)

5.21 ( .205) 1.27 (.050)

0.88 (.035)

2.38 (.094)

2.19 (.086)

1.14 (.045)

0.89 (.035)

0.58 (.023)

0.46 (.018) LEAD ASSIGNMENTS

1 - GATE

2 - DRAIN

3 - SO URCE

4 - DRAIN

NOTES:

1 DIMENSIO NING & TO L E RA NCING PER ANSI Y14.5M, 1982.

2 CON TRO L L ING DI M E NS ION : INCH.

3 CONFORMS TO JEDEC OUTLINE TO-252AA.

4 DIMENSIONS SHOWN ARE BEFORE SOLDER DIP,

SOLDER DIP MAX. +0.16 (.006).

9.65 (.380)

8.89 (.350)

2.28 (.090)

1.91 (.075)

1.52 (.060)

1.15 (.045)

1 2 3

6.45 ( .245)

5.68 ( .224)

0.58 (.023)

0.46 (.018)

WE E K = 16

DAT E CODE

YE AR = 0

Notes : T his part marking information applies to devices produced before 02/26/2001

EXAMPLE:

LOT CODE 9U1P

THIS IS AN IRFR120

WIT H AS S E MB L Y

ASSEMBLY

INTERNATIONAL

RE CT IF IER

LOGO

LOT CODE

IRFU 120

9U 1P

016

INTERNAT IONAL

LOGO

RECTIFIER

LOT CODE

AS S E MB L Y

EXAMPLE:

WIT H AS S E MB L Y

THIS IS AN IRFR120

YEAR 9 = 1999

DAT E CODE

LINE A

WE E K 19

IN THE ASSEMBLY LINE "A"

AS S E MB LE D ON WW 19, 1999

LOT CODE 5678

PART NUMBER

Notes : T his part marking information applies to devices produced after 02/26/2001

IRF U120

919A

IRFR/U4105Z

www.irf.com 11

Data and specifications subject to change without notice.

This product has been designed and qualified for the Automotive [Q101] market.

Qualification Standards can be found on IR’s Web site.

D-Pak (TO-252AA) Tape & Reel Information

Dimensions are shown in millimeters (inches)

16.3 ( .641 )

15.7 ( .619 )

8.1 ( .318 )

7.9 ( .312 )

12.1 ( .476 )

11.9 ( .469 ) FEED DIRECTION FEED DIRE CTION

16.3 ( .641 )

15.7 ( .619 )

TRR TRL

NOTES :

1. CO NTROLLING DIMENSION : MILLIMETER.

2. ALL DIMENSIONS ARE SHOW N IN MILLIMETERS ( INCHES ).

3. OUTLINE C ONFORMS TO EIA-481 & EIA-541.

NOTES :

1. OUTLINE CONFORMS TO EIA-481.

16 mm

13 INCH

IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105

TAC Fax: (310) 252-7903

Visit us at www.irf.com for sales contact information.8/03

 Repetitive rating; pulse width limited by

max. junction temperature. (See fig. 11).

 Limited by TJmax, starting TJ = 25°C, L = 0.18mH

RG = 25Ω, IAS = 18A, VGS =10V. Part not

recommended for use above this value.

Pulse width ≤ 1.0ms; duty cycle ≤ 2%.

Notes:

 Coss eff. is a fixed capacitance that gives the same charging time

as Coss while VDS is rising from 0 to 80% VDSS .

 Limited by TJmax , see Fig.12a, 12b, 15, 16 for typical repetitive

avalanche performance.

 This value determined from sample failure population. 100%

tested to this value in production.

 When mounted on 1" square PCB (FR-4 or G-10 Material) .

For recommended footprint and soldering techniques refer to

application note #AN-994

Note: For the most current drawings please refer to the IR website at:

http://www.irf.com/package/