1
LTC1569-6
Linear Phase, DC Accurate,
Low Power, 10th Order Lowpass Filter
■
One External R Sets Cutoff Frequency
■
Root Raised Cosine Response
■
3mA Supply Current with a Single 3V Supply
■
Up to 64kHz Cutoff on a Single 3V Supply
■
10th Order, Linear Phase Filter in an SO-8
■
DC Accurate, V
OS(MAX)
= 5mV
■
Low Power Modes
■
Differential or Single-Ended Inputs
■
80dB CMRR (DC)
■
82dB Signal-to-Noise Ratio, V
S
= 5V
■
Operates from 3V to ±5V Supplies
The LTC
®
1569-6 is a 10th order lowpass filter featuring
linear phase and a root raised cosine amplitude response.
The high selectivity of the LTC1569-6 combined with its
linear phase in the passband makes it suitable for filtering
both in data communications and data acquisition sys-
■
Data Communication Filters for 3V Operation
■
Linear Phase and Phase Matched Filters for I/Q
Signal Processing
■
Pin Programmable Cutoff Frequency Lowpass Filters
tems.
Furthermore, its root raised cosine response offers
the optimum pulse shaping for PAM data communica-
tions
. The filter attenuation is 50dB at 1.5 • f
CUTOFF
, 60dB
at 2 • f
CUTOFF
, and in excess of 80dB at 6 • f
CUTOFF
. DC-
accuracy-sensitive applications benefit from the 5mV
maximum DC offset.
The LTC1569-6 sampled data filter does not require an
external clock yet its cutoff frequency can be set with a
single external resistor with a typical accuracy of 3.5% or
better
. The external resistor programs an internal oscilla-
tor whose frequency is divided by either 1, 4 or 16 prior to
being applied to the filter network. Pin 5 determines the
divider setting. Thus, up to three cutoff frequencies can be
obtained for each external resistor value. Using various
resistor values and divider settings, the cutoff frequency
can be programmed over a range of six octaves. Alterna-
tively, the cutoff frequency can be set with an external
clock and the clock-to-cutoff frequency ratio is 64:1. The
ratio of the internal sampling rate to the filter cutoff
frequency is 128:1.
The LTC1569-6 is fully tested for a cutoff frequency of
64kHz with a single 3V supply.
The LTC1569-6 features power saving modes and it is
available in an SO-8 surface mount package.
, LTC and LT are registered trademarks of Linear Technology Corporation.
FREQUENCY (kHz)
1
GAIN (dB)
0
–20
–40
–60
–80
–100 10 100 1000
1569-6 TA01a
18
27
36
45
1µF
3V
1/4
1/16
1/1
3V
R
EXT
= 10k
100pF
1µF
2k
3.48k
3V
LTC1569-6
EASY TO SET f
CUTOFF
:
f
CUTOFF
= 64kHz (10k/R
EXT
)
1, 4 OR 16
1569-6 TA01
IN
+
IN
–
GND
V
–
OUTV
IN
V
OUT
V
+
R
X
DIV/CLK
Frequency Response, fCUTOFF = 64kHz/16kHz/4kHz
Single 3V Supply, 64kHz/16kHz/4kHz Lowpass Filter
APPLICATIO S
U
FEATURES
TYPICAL APPLICATIO
U
DESCRIPTIO
U
2
LTC1569-6
A
U
G
W
A
W
U
W
ARBSOLUTEXI T
IS
ORDER PART
NUMBER
WU
U
PACKAGE/ORDER I FOR ATIO
(Note 1)
Total Supply Voltage................................................ 11V
Power Dissipation.............................................. 500mW
Operating Temperature
LTC1569C ............................................... 0°C to 70°C
LTC1569I............................................ –40°C to 85°C
Storage Temperature ............................ –65°C to 150°C
Lead Temperature (Soldering, 10 sec)..................300°C
The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C.
VS = 3V (V+ = 3V, V – = 0V), fCUTOFF = 64kHz, RLOAD = 10k unless otherwise specified.
ELECTRICAL C CHARA TERISTICS
LTC1569CS8-6
LTC1569IS8-6
S8 PART
MARKING
Consult factory for Military grade parts.
T
JMAX
= 125°C, θ
JA
= 150°C/W
1
2
3
4
8
7
6
5
TOP VIEW
OUT
V
+
R
X
DIV/CLK
IN
+
IN
–
GND
V
–
S8 PACKAGE
8-LEAD PLASTIC SO
PARAMETER CONDITIONS MIN TYP MAX UNITS
Filter Gain V
S
= 5V, f
CLK
= 4.096MHz, f
IN
= 1280Hz = 0.02 • f
CUTOFF
●–0.05 0.05 0.15 dB
f
CUTOFF
= 64kHz, V
IN
= 1.4V
P-P
,f
IN
= 12.8kHz = 0.2 • f
CUTOFF
●–0.25 –0.15 –0.05 dB
R
EXT
= 10k, Pin 5 Shorted f
IN
= 32kHz = 0.5 • f
CUTOFF
●–0.65 –0.55 –0.4 dB
to Pin 4 f
IN
= 51.2kHz = 0.8 • f
CUTOFF
●–1.3 –1.0 –0.7 dB
f
IN
= 64kHz = f
CUTOFF
●–5.3 –3.8 –2.4 dB
f
IN
= 97.5kHz = 1.5 • f
CUTOFF
(LTC1569I) ●–60 –40 dB
f
IN
= 97.5kHz = 1.5 • f
CUTOFF
(LTC1569C) ●–60 –48 dB
f
IN
= 128kHz = 2 • f
CUTOFF
●–62 –50 dB
f
IN
= 192kHz = 3 • f
CUTOFF
●–71 –60 dB
V
S
= 2.7V, f
CLK
= 1MHz, f
IN
= 312Hz = 0.02 • f
CUTOFF
●–0.12 0.05 0.16 dB
f
CUTOFF
= 15.625kHz, f
IN
= 3125kHz = 0.2 • f
CUTOFF
●–0.25 –0.15 –0.05 dB
V
IN
= 1V
P-P
, Pin 6 Shorted f
IN
= 7812kHz = 0.5 • f
CUTOFF
●–0.65 –0.55 –0.4 dB
to Pin 4, External Clock f
IN
= 12.5kHz = 0.8 • f
CUTOFF
●–1.1 –0.9 –0.7 dB
f
IN
= 15.625kHz = f
CUTOFF
●–3.6 –3.4 –3.2 dB
f
IN
= 23.44kHz = 1.5 • f
CUTOFF
(LTC1569I) ●–54 –48 dB
f
IN
= 23.44kHz = 1.5 • f
CUTOFF
(LTC1569C) ●–54 –50 dB
f
IN
= 31.25kHz = 2 • f
CUTOFF
(LTC1569I) ●–60 –52 dB
f
IN
= 31.25kHz = 2 • f
CUTOFF
(LTC1569C) ●–60 –55 dB
f
IN
= 46.88kHz = 3 • f
CUTOFF
●–66 –60 dB
Filter Phase V
S
= 2.7V, f
CLK
= 4MHz, f
IN
= 1250Hz = 0.02 • f
CUTOFF
–11 Deg
f
CUTOFF
= 62.5kHz, Pin 6 f
IN
= 12.5kHz = 0.2 • f
CUTOFF
●–114 –111 –108 Deg
Shorted to Pin 4, f
IN
= 31.25kHz = 0.5 • f
CUTOFF
●79 82 85 Deg
External Clock f
IN
= 50kHz = 0.8 • f
CUTOFF
●–83 –79 –75 Deg
f
IN
= 62.5kHz = f
CUTOFF
●156 162 168 Deg
f
IN
= 93.75kHz = 1.5 • f
CUTOFF
–91 Deg
Filter Cutoff Accuracy R
EXT
= 10.24k from Pin 6 to Pin 7, 62.5kHz ±1%
when Self-Clocked V
S
= 3V, Pin 5 Shorted to Pin 4
Filter Output DC Swing V
S
= 3V, Pin 3 = 1.11V 2.1 V
P-P
(Note 6) ●1.9 V
P-P
V
S
= 5V, Pin 3 = 2V 3.9 V
P-P
●3.7 V
P-P
V
S
= ±5V, Pin 5 Shorted to Pin 7, R
LOAD
= 20k 8.5 V
P-P
15696
1569I6
3
LTC1569-6
The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C.
VS = 3V (V + = 3V, V – = 0V), fCLK = 4.096MHz, fCUTOFF = 64kHz, RLOAD = 10k unless otherwise specified.
ELECTRICAL C CHARA TERISTICS
PARAMETER CONDITIONS MIN TYP MAX UNITS
Output DC Offset R
EXT
= 10k, Pin 5 Shorted to Pin 7 V
S
= 3V ±2±5mV
(Note 2) V
S
= 5V ±6±12 mV
V
S
= ±5V ±15 mV
Output DC Offset R
EXT
= 10k, Pin 5 Shorted to Pin 7 V
S
= 3V 25 µV/°C
Drift V
S
= 5V 25 µV/°C
V
S
= ±5V 75 µV/°C
Clock Pin Logic Thresholds V
S
= 3V Min Logical “1” 2.7 V
when Clocked Externally Max Logical “0” 0.5 V
V
S
= 5V Min Logical “1” 4.0 V
Max Logical “0” 0.5 V
V
S
= ±5V Min Logical “1” 4.0 V
Max Logical “0” 0.5 V
Power Supply Current f
CLK
= 256kHz (40k from Pin 6 to Pin 7, V
S
= 3V 3 4 mA
(Note 3) Pin 5 Open, ÷ 4), f
CUTOFF
= 4kHz ●5mA
V
S
= 5V 3.5 5 mA
●6mA
V
S
= 10V 4.5 7 mA
●8mA
f
CLK
= 4.096MHz (10k from Pin 6 to Pin 7, V
S
= 3V 8 mA
Pin 5 Shorted to Pin 4, ÷ 1), f
CUTOFF
= 64kHz ●11 mA
V
S
= 5V 9 mA
●13 mA
V
S
= 10V 12 mA
●17 mA
Clock Feedthrough Pin 5 Open 0.1 mV
RMS
Wideband Noise Noise BW = DC to 2 • f
CUTOFF
95 µV
RMS
THD f
IN
= 3kHz, 1.5V
P-P
, f
CUTOFF
= 32kHz 80 dB
Clock-to-Cutoff 64
Frequency Ratio
Max Clock Frequency V
S
= 3V 5 MHz
(Note 4) V
S
= 5V 5 MHz
V
S
= ±5V 7 MHz
Min Clock Frequency V
S
= 3V, 5V, T
A
< 85°C 1.5 kHz
(Note 5) V
S
= ±5V 3kHz
Input Frequency Range Aliased Components <–65dB 0.9 • f
CLK
Hz
Note 1: Absolute maximum ratings are those values beyond which the life
of a device may be impaired.
Note 2: DC offset is measured with respect to Pin 3.
Note 3: If the internal oscillator is used as the clock source and the divide-
by-4 or divide-by-16 mode is enabled, the supply current is reduced as
much as 40% relative to the divide-by-1 mode.
Note 4: The maximum clock frequency is arbitrarily defined as the
frequency at which the filter AC response exhibits >1dB of gain peaking.
Note 5: The minimum clock frequency is arbitrarily defined as the frequecy
at which the filter DC offset changes by more than 5mV.
Note 6: For more details refer to the Input and Output Voltage Range
paragraph in the Applications Information section.
4
LTC1569-6
TYPICAL PERFOR A CE CHARACTERISTICS
UW
THD vs Input VoltageTHD vs Input Frequency
INPUT VOLTAGE (VP-P)
00.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0
THD (dB)
1569-6 G04
–50
–55
–60
–65
–70
–75
–80
–85
–90
fIN = 3kHz
fCUTOFF = 32kHz
IN+ TO OUT
VS = 5V
PIN 3 = 2V
VS = 3V
PIN 3 = 1.11V
INPUT FREQUENCY (kHz)
05 10 15 20 25 30
THD (dB)
1569-6 G03
–60
–65
–70
–75
–80
–85
–90
VIN = 1.5VP-P
fCUTOFF = 32kHz
IN+ TO OUT
VS = 5V
PIN 3 = 2V
FREQUENCY (kHz)
GAIN (dB)
10
–10
–30
–50
–70
–90 102.5 100 1000
1569-6 G01
FREQUENCY (kHz)
GAIN (dB)
1
0
–1
–2
–3
–4
DELAY (µs)
40
36
32
28
24
20
10.2 10 80
1569-6 GO2
f
CUTOFF
(kHz)
0.1
I
SUPPY
(mA)
11
10
9
8
7
6
5
4
31 10 100
1569-6 G06
DIV-BY-1
DIV-BY-4
EXT CLK
DIV-BY-16
fCUTOFF (kHz)
0.1
ISUPPY (mA)
14
12
10
8
6
41 10 100
1569-6 G07
DIV-BY-1
DIV-BY-4
EXT CLK
DIV-BY-16
3V Supply Current
Passband Gain and Group Delay
vs Frequency
Gain vs Frequency
fCUTOFF (kHz)
0.1
ISUPPY (mA)
10
9
8
7
6
5
4
3
21 10 100
1569-6 G05
DIV-BY-1
DIV-BY-4
EXT CLK
DIV-BY-16
5V Supply Current ±5V Supply Current
5
LTC1569-6
PIN FUNCTIONS
UUU
IN
+
/IN
–
(Pins 1, 2): Signals can be applied to either or
both input pins. The DC gain from IN
+
(Pin 1) to OUT
(Pin␣ 8) is 1.0, and the DC gain from Pin 2 to Pin 8 is –1. The
input range, input resistance and output range are de-
scribed in the Applications Information section. Input
voltages which exceed the power supply voltages should
be avoided. Transients will not cause latchup if the current
into/out of the input pins is limited to 20mA.
GND (Pin 3): The GND pin is the reference voltage for the
filter and should be externally biased to 2V (1.11V) to
maximize the dynamic range of the filter in applications
using a single 5V (3V) supply. For single supply operation,
the GND pin should be bypassed with a quality 1µF
ceramic capacitor to V
–
(Pin 4). The impedance of the
circuit biasing the GND pin should be less than 2kΩ as the
GND pin generates a small amount of AC and DC current.
For dual supply operation, connect Pin␣ 3 to a high quality
DC ground. A ground plane should be used. A poor ground
will increase DC offset, clock feedthrough, noise and
distortion.
V
–
/V
+
(Pins 4, 7): For 3V, 5V and ±5V applications a
quality 1µF ceramic bypass capacitor is required from V
+
(Pin 7) to V
–
(Pin 4) to provide the transient energy for the
internal clock drivers. The bypass should be as close as
possible to the IC. In dual supply applications (Pin 3 is
grounded), an additional 0.1µF bypass from V
+
(Pin 7) to
GND (Pin 3) and V
–
(Pin 4) to GND (Pin 3) is recom-
mended.
The maximum voltage difference between GND (Pin 3) and
V
+
(Pin 7) should not exceed 5.5V.
DIV/CLK (Pin 5): DIV/CLK serves two functions. When the
internal oscillator is enabled, DIV/CLK can be used to
engage an internal divider. The internal divider is set to 1:1
when DIV/CLK is shorted to V
–
(Pin 4). The internal divider
is set to 4:1 when DIV/CLK is allowed to float (a 100pF
bypass to V
–
is recommended). The internal divider is set
to 16:1 when DIV/CLK is shorted to V
+
(Pin 7). In the
divide-by-4 and divide-by-16 modes the power supply
current is reduced by as much as 40%.
When the internal oscillator is disabled (R
X
shorted
to V
–
) DIV/CLK becomes an input pin for applying an
external clock signal. For proper filter operation, the clock
waveform should be a squarewave with a duty cycle as
close as possible to 50% and CMOS voltages levels (see
Electrical Characteristics section for voltage levels). DIV/
CLK pin voltages which exceed the power supply voltages
should be avoided. Transients will not cause latchup if the
fault current into/out of the DIV/CLK pin is limited to 40mA.
R
X
(Pin 6): Connecting an external resistor between the R
X
pin and V
+
(Pin 7) enables the internal oscillator. The value
of the resistor determines the frequency of oscillation. The
maximum recommended resistor value is 40k and the
minimum is 3.8k. The internal oscillator is disabled by
shorting the R
X
pin to V
–
(Pin 4). (Please refer to the
Applications Information section.)
OUT (Pin 8): Filter Output. This pin can drive 10kΩ and/or
40pF loads. For larger capacitive loads, an external 100Ω
series resistor is recommended. The output pin can ex-
ceed the power supply voltages by up to ±2V without
latchup.
6
LTC1569-6
BLOCK DIAGRA
W
10TH ORDER
LINEAR PHASE
FILTER NETWORK
POWER
CONTROL
DIVIDER/
BUFFER
R
EXT
PRECISION
OSCILLATOR
5
6
7
8
4
3
2
1 OUT
V
+
R
X
DIV/CLK
IN
+
IN
–
GND
V
–
1569-6 BD
APPLICATIONS INFORMATION
WUUU
Self-Clocking Operation
The LTC1569-6 features a unique internal oscillator which
sets the filter cutoff frequency using a single external
resistor
. The design is optimized for V
S
= 3V, f
CUTOFF
=
64kHz, where the filter cutoff frequency error is typically
<1% when a 0.1% external 10k resistor is used. With
different resistor values and internal divider settings, the
cutoff frequency can be accurately varied from 1kHz to
64kHz. As shown in Figure 1, the divider is controlled by
the DIV/CLK (Pin 5). Table 1 summarizes the cutoff
frequency vs external resistor values for the divide-by-1
mode.
LTC1569-6
18
27
36
45
DIVIDE-BY-4
DIVIDE-BY-1
DIVIDE-BY-16 V
+
V
–
R
EXT
100pF
f
CUTOFF
= 64kHz (10k/R
EXT
)
1, 4 OR 16
1569-6 F01
IN
+
IN
–
GND
V
–
OUT
V
+
R
X
DIV/CLK
Figure 1
Table1. fCUTOFF vs REXT, VS = 3V, TA = 25°C, Divide-by-1 Mode
R
EXT
Typical f
CUTOFF
Typical Variation of f
CUTOFF
3844Ω* N/A ±3.0%
5010Ω* N/A ±2.5%
10k 64kHz ±1%
20.18k 32kHz ±2.0%
40.2k 16kHz ±3.5%
*R
EXT
values less than 10k can be used only in the divide-by-16 mode.
In the divide-by-4 and divide-by-16 modes, the cutoff
frequencies in Table 1 will be lowered by 4 and 16
respectively. When the LTC1569-6 is in the divide-by-4
and divide-by-16 modes the power is automatically re-
duced. This results in up to a 40% power savings.
The power reduction in the divide-by-4 and divide-by-16
modes, however, effects the fundamental oscillator fre-
quency. Hence, the effective divide ratio will be slightly
different from 4:1 or 16:1 depending on V
S
, T
A
and R
EXT
.
Typically this error is less than 1% (Figures 4 and 6).
The cutoff frequency is easily estimated from the equation
in Figure 1. Examples 1 and 2 illustrate how to use the
graphs in Figures 2 through 7 to get a more precise
estimate of the cutoff frequency.
Example 1: LTC1569-6, R
EXT
= 20k, V
S
= 3V, divide-by-16
mode, DIV/CLK (Pin␣ 5) connected to V
+
(Pin 7), T
A
= 25°C.
7
LTC1569-6
Using the equation in Figure 1, the approximate filter
cutoff frequency is f
CUTOFF
= 64kHz • (10k/20k)
• (1/16) = 2kHz.
For a more precise f
CUTOFF
estimate, use Table 1 to get
a value of f
CUTOFF
when R
EXT
= 20k and use the graph
in Figure 6 to find the correct divide ratio when V
S
= 3V
and R
EXT
= 20k. Based on Table 1 and Figure 6, f
CUTOFF
= 32kHz • (20.18k/20k) • (1/16.02) = 2.01kHz.
From Table 1, the part-to-part variation of f
CUTOFF
will
be ±2%. From the graph in Figure 7, the 0°C to 70°C
drift of f
CUTOFF
will be –0.2% to 0.2%.
Example 2: LTC1569-6, R
EXT
= 10k, V
S
= 5V, divide-by-1
mode, DIV/CLK (Pin␣ 5) connected to V
–
(Pin 4), T
A
= 25°C.
APPLICATIONS INFORMATION
WUUU
Using the equation in Figure 1, the approximate filter
cutoff frequency is f
CUTOFF
= 64kHz • (10k/10k)
• (1/1) = 64kHz.
For a more precise f
CUTOFF
estimate, use Figure 2 to
correct for the supply voltage when V
S
= 5V. From
Table␣ 1 and Figure 2, f
CUTOFF
= 64k • (10k/10k) • 0.970
= 62.1kHz.
The oscillator is sensitive to transients on the positive
supply. The IC should be soldered to the PC board and the
PCB layout should include a 1µF ceramic capacitor be-
tween V
+
(Pin 7) and V
–
(Pin 4) , as close as possible to
the IC to minimize inductance. Avoid parasitic capacitance
on R
X
and avoid routing noisy signals near R
X
(Pin 6). Use
Figure 4. Typical Divide Ratio in the
Divide-by-4 Mode, TA = 25°C
Figure 5. Filter Cutoff vs Temperature,
Divide-by-4 Mode, REXT = 10k
Figure 3. Filter Cutoff vs Temperature,
Divide-by-1 Mode, REXT = 10k
Figure 2. Filter Cutoff vs VSUPPLY,
Divide-by-1 Mode, TA = 25°C
VSUPPLY (V)
2
DIVIDE RATIO
1569-6 F04
4.08
4.04
4.00
3.96 46810
REXT = 5k
REXT = 10k
REXT = 20k
REXT = 40k
TEMPERATURE (°C)
–50
NORMALIZED FILTER CUTOFF
1569-6 F05
1.010
1.008
1.006
1.004
1.002
1.000
0.998
0.996
0.994
0.992
0.990 –25 0 25 50 75 100
VS = 3V
VS = 5V
VS = 10V
VSUPPLY (V)
2
NORMALIZED FILTER CUTOFF
1569-6 F02
1.04
1.03
1.02
1.01
1.00
0.99
0.98
0.97
0.96 46810
REXT = 5k
REXT = 10k
REXT = 20k
REXT = 40k
TEMPERATURE (°C)
–50
NORMALIZED FILTER CUTOFF
1569-6 F03
1.010
1.008
1.006
1.004
1.002
1.000
0.998
0.996
0.994
0.992
0.990 –25 0 25 50 75 100
VS = 3V
VS = 5V
VS = 10V
8
LTC1569-6
APPLICATIONS INFORMATION
WUUU
Figure 6. Typical Divide Ratio in the
Divide-by-16 Mode, TA = 25°C
Figure 7. Filter Cutoff vs Temperature,
Divide-by-16 Mode, REXT = 10k
TEMPERATURE (°C)
–50
NORMALIZED FILTER CUTOFF
1569-6 F07
1.010
1.008
1.006
1.004
1.002
1.000
0.998
0.996
0.994
0.992
0.990 –25 0 25 50 75 100
VS = 3V
VS = 5V
VS = 10V
VSUPPLY (V)
2
DIVIDE RATIO
1569-6 F06
16.32
16.16
16.00
15.84 46810
REXT = 5k
REXT = 10k
REXT = 20k
REXT = 40k
a ground plane connected to V
–
(Pin 4) for single supply
applications. Connect a ground plane to GND (Pin 3) for
dual supply applications and connect V
–
(Pin 4) to a
copper trace with low thermal resistance.
Input and Output Voltage Range
The input signal range includes the full power supply
range. The output range is typically (V
–
+ 50mV) to (V
+
–
0.8V) when using a single 3V supply with the GND (Pin 3)
voltage set to 1.11V. In other words, the output range is
typically 2.1V
P-P
for a 3V supply. Similarly, the output
range is typically 3.9V
P-P
for a single 5V supply when the
GND (Pin 3) voltage is 2V. For ±5V supplies, the output
range is typically 8.5V
P-P
.
The LTC1569-6 can be driven with a single-ended or
differential signal. When driven differentially, the voltage
between IN
+
and IN
–
(Pin 1 and Pin 2) is filtered with a DC
gain of 1. The single-ended output voltage OUT (Pin 8) is
referenced to the voltage of the GND (Pin 3). The common
mode voltage of IN
+
and IN
–
can be any voltage that keeps
the input signals within the power supply range.
For noninverting single-ended applications, connect IN
–
to GND or to a quiet DC reference voltage and apply the
input signal to IN
+
. If the input is DC coupled then the DC
gain from IN
+
to OUT will be 1. This is true given IN
+
and
OUT are referenced to the same voltage, i.e., GND, V
–
or
some other DC reference. To achieve the distortion levels
shown in the Typical Performance Characteristics the
input signal at IN
+
should be centered around the DC
voltage at IN
–
. The input can also be AC coupled, as shown
in the Typical Applications section.
For inverting single-ended filtering, connect IN
+
to GND or
to quiet DC reference voltage. Apply the signal to IN
–
. The
DC gain from IN
–
to OUT is –1, assuming IN
–
is referenced
to IN
+
and OUT is reference to GND.
Refer to the Typical Performance Characteristics section
to estimate the THD for a given input level.
Dynamic Input Impedance
The unique input sampling structure of the LTC1569-6 has
a dynamic input impedance which depends on the con-
figuration, i.e., differential or single-ended, and the clock
frequency. The equivalent circuit in Figure 8 illustrates the
input impedance when the cutoff frequency is 64kHz. For
other cutoff frequencies replace the 125k value with
125k • (64kHz/f
CUTOFF
).
When driven with a single-ended signal into IN
–
with IN
+
tied to GND, the input impedance is very high (~10MΩ).
When driven with a single-ended signal into IN
+
with IN
–
tied to GND, the input impedance is a 125k resistor to GND.
When driven with a complementary signal whose com-
mon mode voltage is GND, the IN
+
input appears to have
125k to GND and the IN
–
input appears to have –125k to
GND. To make the effective IN
–
impedance 125k when
driven differentially, place a 62.5k resistor from IN
–
to
GND. For other cutoff frequencies use 62.5k • (64kHz/
9
LTC1569-6
DC Accuracy
DC accuracy is defined as the error in the output voltage
after DC offset and DC gain errors are removed. This is
similar to the definition of the integral nonlinearity in A/D
converters. For example, after measuring values of V
OUT(DC)
vs V
IN(DC)
for a typical LTC1569-6, a linear regression
shows that V
OUT(DC)
= V
IN(DC)
• 0.99854 + 0.00134V is the
straight line that best fits the data. The DC accuracy
describes how much the actual data deviates from this
straight line (i.e., DCERROR = V
OUT(DC)
– (V
IN(DC)
• 0.99854
+ 0.00134V). In a 12-bit system with a full-scale value of
2V, the LSB is 488µV. Therefore, if the DCERROR of the
filter is less than 488µV over a 2V range, the filter has
12-bit DC accuracy. Figure 9 illustrates the typical DC
accuracy of the LTC1569-6 on a single 5V supply.
DC Offset
The output DC offset of the LTC1569-6 is trimmed to less
than ±5mV. The trimming is performed with V
S
= 1.9V,
–1.1V with the filter cutoff frequency set to 4kHz (R
EXT
=
10k, DIV/CLK shorted to V
+
). To obtain optimum DC offset
performance, appropriate PC layout techniques should be
used. The filter IC should be soldered to the PC board. The
power supplies should be well decoupled including a 1µF
ceramic capacitor from V
+
(Pin 7) to V
–
(Pin 4). A ground
plane should be used. Noisy signals should be isolated
from the filter input pins.
When the power supply is 3V, the output DC offset should
change less than ±2mV when the clock frequency varies
from 64kHz to 4096kHz. When the clock frequency is
fixed, the output DC offset will typically change by less
than ±3mV (±15mV) when the power supply varies from
3V to 5V (±5V) in the divide-by-1 mode. In the divide-by-
4 or divide-by-16 modes, the output DC offset will typically
change less than –9mV (–27mV) when the power supply
varies from 3V to 5V (±5V). The offset is measured with
respect to GND (Pin 3).
Aliasing
Aliasing is an inherent phenomenon of sampled data
filters. In lowpass filters significant aliasing only occurs
when the frequency of the input signal approaches the
sampling frequency or multiples of the sampling fre-
APPLICATIONS INFORMATION
WUUU
f
CUTOFF
), as shown in the Typical Applications section. The
typical variation in dynamic input impedance for a given
clock frequency is ±10%.
Wideband Noise
The wideband noise of the filter is the RMS value of the
device’s output noise spectral density. The wideband
noise data is used to determine the operating signal-to-
noise at a given distortion level. The wideband noise is
nearly independent of the value of the clock frequency and
excludes the clock feedthrough. Most of the wideband
noise is concentrated in the filter passband and cannot be
removed with post filtering (Table 2). Table 3 lists the
typical wideband noise for each supply.
Table 2. Wideband Noise vs Supply Voltage, Single 3V Supply
Bandwidth Total Integrated Noise
DC to f
CUTOFF
80µV
RMS
DC to 2 • f
CUTOFF
95µV
RMS
DC to f
CLK
110µV
RMS
Table 3. Wideband Noise vs Supply Voltage, fCUTOFF = 64kHz
Total Integrated Noise
Power Supply DC to 2 • f
CUTOFF
3V 95µV
RMS
5V 100µV
RMS
±5V 105µV
RMS
Clock Feedthrough
Clock feedthrough is defined as the RMS value of the clock
frequency and its harmonics that are present at the filter’s
OUT pin (Pin 8). The clock feedthrough is measured with
IN
+
and IN
–
(Pins 1 and 2) grounded and depends on the
PC board layout and the power supply decoupling. Table␣ 4
shows the clock feedthrough (the RMS sum of the first 11
harmonics) when the LTC1569-6 is self-clocked with
R
EXT
= 10k, DIV/CLK (Pin 5) open (divide-by-4 mode). The
clock feedthrough can be reduced with a simple RC post
filter.
Table 4. Clock Feedthrough
Power Supply Feedthrough
3V 0.1mV
RMS
5V 0.3mV
RMS
±5V 0.9mV
RMS
10
LTC1569-6
Single 3V Operation, AC Coupled Input,
64kHz Cutoff Frequency
18
27
36
45
V
OUT
V
IN
1µF
3V
R
EXT
= 10k
1µF
0.1µF
2k
3.48k
3V
1569-6 TA02
LTC1569-6
IN
+
IN
–
GND
V
–
OUT
V
+
R
X
DIV/CLK
f
CUTOFF
=
n = 1, 4, 16 FOR PIN 5 AT
GROUND, OPEN, V
+
64kHz
n = 1
()
10k
R
EXT
()
FREQUENCY (Hz)
0 150k
40k 50k 80k 90k 120k 130k60k 70k 100k 110k 140k
GAIN (dB)
GROUP DELAY
1569-6 TA02a
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
32µs
28µs
24µs
70k0 10k 40k 50k20k 30k 60k
Single 3V, AC Coupled Input,
64kHz Cutoff Frequency
APPLICATIONS INFORMATION
WUUU
quency. The LTC1569-6 samples the input signal twice
every clock period. Therefore, the sampling frequency is
twice the clock frequency and 128 times the filter cutoff
VIN DC (V)
–1.5 –1.0 –0.5 0 0.5 1.0 1.5
1569-6 F09
488
244
0
–244
–488
VS = 5V
REXT = 10k
TA = 25°C
DC ERROR (µV)
Figure 9
8
3
1
2
OUT
IN
–
IN
+
GND
1569-6 F06
–
+
125k
+
–
–
+
125k
i = IN
+
– GND
125k
Figure 8
frequency. Input signals with frequencies near 2 • f
CLK
± f
CUTOFF
will be aliased to the passband of the filter and
appear at the output unattenuated.
TYPICAL APPLICATIO S
U
11
LTC1569-6
18
27
36
45
V
OUT
V
IN
1µF
3V
R
EXT
= 10k
100pF
1µF
2k
3.48k
3V
1569-6 TA04
LTC1569-6
IN
+
IN
–
GND
V
–
OUT
V
+
R
X
DIV/CLK
f
CUTOFF
=
n = 1, 4, 16 FOR PIN 5 AT
GROUND, OPEN, V
+
64kHz
n = 4
()
10k
R
EXT
()
Single 3V Supply Operation, DC Coupled,
16kHz Cutoff Frequency
Single 5V Operation, 50kHz Cutoff Frequency,
DC Coupled Differential Inputs with Balanced Input Impedance
18
27
36
45
V
OUT
V
IN+
V
IN–
1µF
5V
R
EXT
= 12.8k
1µF
80.6k
5V
1569-6 TA03
IN
GND
OUT
LT
®
1460-2.5
(SOT-23)
LTC1569-6
f
CUTOFF
~
n = 1, 4, 16 FOR PIN 5 AT
GROUND, OPEN, V
+
64kHz
n = 1
()
10k
12.8k
()
IN
+
IN
–
GND
V
–
OUT
V
+
R
X
DIV/CLK
18
27
36
45
fCUTOFF = fCLK/64
fCLK ≤ 5MHz
VOUT
VIN
0.1µF
5V
–5V
5V
0V
0.1µF
–5V
1569-6 TA05
LTC1569-6
IN+
IN–
GND
V–
OUT
V+
RX
DIV/CLK
1µF
±5V Supply Operation, DC Coupled Filter
with External Clock Source
TYPICAL APPLICATIO S
U
18
27
36
45
V
OUT
1µF
3V
R
EXT
= 10k
1µF
2k
3.48k
3V
20k
7.32k*
* SEE APPLICATIONS INFORMATION, “INPUT AND OUTPUT VOLTAGE RANGE”
128ksps
DATA
20k
3V
1569-6 TA06
LTC1569-6
IN
+
IN
–
GND
V
–
OUT
V
+
R
X
DIV/CLK
Pulse Shaping Circuit for Single 3V Operation,
128kbps 2-Level Data, 64kHz Cutoff Filter
400mV/DIV
2µs/DIV 1569-6 TA08
2-Level, 128kbps Eye Diagram
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
12
LTC1569-6
LINEAR TECHNOLOGY CORPORATION 1999
15696f LT/TP 0500 4K • PRINTED IN THE USA
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900
●
FAX: (408) 434-0507
●
www.linear-tech.com
PART NUMBER DESCRIPTION COMMENTS
LTC1064-3 Linear Phase, Bessel 8th Order Filter f
CLK
/f
CUTOFF
= 75/1 or 150/1, Very Low Noise
LTC1064-7 Linear Phase, 8th Order Lowpass Filter f
CLK
/f
CUTOFF
= 50/1 or 100/1, f
CUTOFF(MAX)
= 100kHz
LTC1069-7 Linear Phase, 8th Order Lowpass Filter f
CLK
/f
CUTOFF
= 25/1, f
CUTOFF(MAX)
= 200kHz, SO-8
LTC1164-7 Low Power, Linear Phase Lowpass Filter f
CLK
/f
CUTOFF
= 50/1 or 100/1, I
S
= 2.5mA, V
S
= 5V
LTC1264-7 Linear Phase, 8th Order Lowpass Filter f
CLK
/f
CUTOFF
= 25/1 or 50/1, f
CUTOFF(MAX)
= 200kHz
LTC1562/LTC1562-2 Universal, 8th Order Active RC Filter f
CUTOFF(MAX)
= 150kHz (LTC1562)
f
CUTOFF(MAX)
= 300kHz (LTC1562-2)
LTC1563-2/LTC1563-3 Active RC, 4th Order Lowpass f
CUTOFF(MAX)
= 300kHz, Very Low Noise
LTC1569-7 Linear Phase DC Accurate, 10th Order f
CUTOFF(MAX)
= 300kHz, No Clock Required
RELATED PARTS
TYPICAL APPLICATIO S
U
PACKAGE DESCRIPTION
U
Dimensions in inches (millimeters) unless otherwise noted.
S8 Package
8-Lead Plastic Small Outline (Narrow 0.150)
(LTC DWG # 05-08-1610)
0.016 – 0.050
(0.406 – 1.270)
0.010 – 0.020
(0.254 – 0.508)× 45°
0°– 8° TYP
0.008 – 0.010
(0.203 – 0.254)
SO8 1298
0.053 – 0.069
(1.346 – 1.752)
0.014 – 0.019
(0.355 – 0.483)
TYP
0.004 – 0.010
(0.101 – 0.254)
0.050
(1.270)
BSC
1234
0.150 – 0.157**
(3.810 – 3.988)
8765
0.189 – 0.197*
(4.801 – 5.004)
0.228 – 0.244
(5.791 – 6.197)
DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
*
**
400mV/DIV
2µs/DIV 1569-6 TA09
4-Level, 200kbps (100ksps) Eye Diagram
18
27
36
45
V
OUT
1µF
3V
R
EXT
= 10k
1µF
2k
3.48k
3V
20k
2.49k*
D1
20k
3V
1569-6 TA06
LTC1569-6
IN
+
IN
–
GND
V
–
OUT
V
+
R
X
DIV/CLK
9.31k*
D0
100ksps
DATA
* SEE APPLICATIONS INFORMATION, “INPUT AND OUTPUT VOLTAGE RANGE”
Pulse Shaping Circuit for Single 3V Operation,
200kbps (100ksps) 4-Level Data, 64kHz Cutoff Filter
