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S6BP501A, S6BP502A
3ch DC/DC Converter IC
for Automotive Cluster
Cypress Semiconductor Corporation • 198 Champion Court • San Jose, CA 95134-1709 • 408-943-2600
Document Number: 002-03396 Rev. *H Revised August 17, 2018
S6BP501A/S6BP502A is a three channel output power management IC. This IC includes one high voltage buck DC/DC controller
(DD3V), one buck DC/DC converter with built-in FETs (DD1V) and one boost DC/DC converter with built-in FETs (DD5V). Current
mode architecture is used for fast load transient response. At no load, the input supply current is reduced to 15 µA (Typ). It is possible
to provide stable output voltage under an automotive cold cranking condition until the input voltage falls to 2.5V. This IC is suitable for
power supply solutions of automotive and Industrial applications. Each output voltage can be adjusted by external resistors. Both
DD1V and DD5V support the switching frequencies up to 2.4 MHz to allow use of small size inductors, which can reduce a part
mounting area. To decrease EMI, this IC equips a SYNC function that synchronizes to an external clock signal and a spread spectrum
clock generator (SSCG). When not inputting an external clock, it operates by an internal clock. The SSCG is valid both internal clock
and external clock. Moreover, this IC has power good (PG) monitors for each output and a thermal-warning indicator.
Features
Wide input voltage range : 2.5V to 42V (DD3V)
Adjustable output voltage with pairs of resistors
DD1V : 1.0V to 1.3V
DD3V : 3.2V to 3.4V
DD5V : 5.0V to 5.2V
Switching frequency range (synchronizable to external clock
by SYNC function)
DD1V, DD5V
Internal clock operation : 2.1 MHz (Typ)
External clock operation : 1.8 MHz to 2.4 MHz
DD3V (one-fifth-divided clock)
Internal clock operation : 420 kHz (Typ)
External clock operation : 360 kHz to 480 kHz
Super-high efficiency by PFM operation (DD3V, DD5V :
When fixing SYNC pin to a low level)
Automatic PWM/PFM switching and fixed PWM operations
are settable by SYNC pin (DD3V, DD5V)
Operable on up to 100% duty (DD3V)
Built-in phase compensators
Built-in SSCG
(spread spectrum clock generator)
Synchronous rectification current mode architecture
Shutdown current : 1 µA (Typ)
Quiescent current : 15 µA (Typ)
Load-independent soft-start
Power good monitors for each output
OVD (over voltage detection)
UVD (under voltage detection)
Enhanced protection functions
UVLO (under voltage lockout)
OVP (over voltage protection)
OCP (over current protection)
TSD (thermal shutdown)
TWI (thermal warning indicator)
Wettable QFN-32 package : 5 mm × 5 mm
AEC-Q100 compliant (Grade-2)
Applications
Instrument cluster
Automotive applications
Industrial applications
Block Diagram
Battery 2.5-42V
GND
S6BP502A
Boost
Converter
2.1 MHz
Power
Good
Buck
Converter
2.1 MHz
S6BP501A,
Enable
Power Sources
Protection
OSC,
External
SYNC,
SSCG
LDO,
Enable 3.3 V
5.0 V
1.2 V
SSCG
Enable
: Output voltages are finely adjustable with external resistive dividers
1
*
1
*
1
*
1
*
External
Clock for
Synchronization
Thermal
Warning
and
Power Good
Thermal
Warning
Buck
Controller
0.42 MHz
Load
Switch
Document Number: 002-03396 Rev. *H Page 2 of 35
S6BP501A, S6BP502A
More Information
Cypress provides a wealth of data at www.cypress.com/pmic to help you to select the right PMIC device for your design, and to help
you to quickly and effectively integrate the device into your design. Following is an abbreviated list for S6BP501A and S6BP502A:
Overview: Automotive PMIC Portfolio, Automotive PMIC
Roadmap
Product Selector:
S6BP501A, S6BP502A:
3ch Automotive PMIC for Instrument Cluster
Application Notes: Cypress offers S6BP501A and S6BP502A
application notes. Recommended application notes for
getting started with S6BP501A and S6BP502A are:
AN99435: Designing a Power Management System
AN201006: Thermal Considerations and Parameters
Evaluation Kit Operation Manual:
S6SBP501A00VA1001, S6SBP502A00VA1001:
Power block of automotive instrument cluster
Related Products:
S6BP201A, S6BP202A, S6BP203A:
1ch Buck-Boost Automotive PMIC
S6BP401A:
6ch Automotive PMIC for ADAS
Document Number: 002-03396 Rev. *H Page 3 of 35
S6BP501A, S6BP502A
Contents
Features ................................................................................................................................................................................... 1
Applications ............................................................................................................................................................................ 1
Block Diagram......................................................................................................................................................................... 1
More Information .................................................................................................................................................................... 2
1. Product Lineup .................................................................................................................................................................. 4
2. Pin Assignment ................................................................................................................................................................. 4
3. Pin Descriptions ................................................................................................................................................................ 5
4. Architecture Block Diagram ............................................................................................................................................. 7
5. Absolute Maximum Ratings ............................................................................................................................................. 8
6. Recommended Operating Conditions ............................................................................................................................. 9
7. Electrical Characteristics ............................................................................................................................................... 10
8. Functional Description ................................................................................................................................................... 14
8.1 Operation Sequence.................................................................................................................................................... 14
8.2 Each Function Block .................................................................................................................................................... 15
8.3 Output State and Protection Function Table ................................................................................................................ 18
9. Application Circuit Example and Parts List .................................................................................................................. 19
10. Application Note.............................................................................................................................................................. 21
10.1 Setting the Operation Conditions ................................................................................................................................. 21
11. Reference Data ................................................................................................................................................................ 24
12. Usage Precaution ............................................................................................................................................................ 31
13. RoHS Compliance Information ...................................................................................................................................... 31
14. Ordering Information ...................................................................................................................................................... 31
15. Package Dimensions ...................................................................................................................................................... 32
Document History ................................................................................................................................................................. 33
Sales, Solutions, and Legal Information ............................................................................................................................. 35
Document Number: 002-03396 Rev. *H Page 4 of 35
S6BP501A, S6BP502A
1. Product Lineup
To order a product, select an item from the product lineup blow. For information on the ordering part number, please see "14.
Ordering Information".
S6BP501A
S6BP502A
32
2.5V to 42V
Output voltage range
DD1V
1.0V to 1.3V
DD3V
3.2V to 3.4V
DD5V
5.0V to 5.2V
Maximum output current
DD1V
1.4A
2.0A
SW3V (*1)
1.6A
1.9A
DD5V
1.3A
1.3A
QFN-32 (VNG032)
*1: Load switch for DD3V. Each value is the maximum output current via SW3V.
2. Pin Assignment
(Top view)
32 31 30 29 28 27 26 25
9 10 11 12 13 14 15 16
1
2
3
4
5
6
7
8
24
23
22
21
20
19
18
17
EP (Exposed Pad)
FB1V
PVCC1V
LX1V
PGND1V
PGND5V
LX5V
VOUT5V
FB5V
VOUT3V
IN3V
VB
FB3V
CSP
CSN
EN5V
VIN
ENSS
GND1
PGND3V
DRVL3V
VDD
BST3V
DRVH3V
LX3V
PG5V
PG3V
PG1V
GND2
HOT
EN3V
EN1V
SYNC
(QFN-32)
Document Number: 002-03396 Rev. *H Page 5 of 35
S6BP501A, S6BP502A
3. Pin Descriptions
Table 3-1 Pin Descriptions
Pin No.
Pin Name
I/O
Description
1
FB1V
I
Feedback pin for DD1V output voltage
2
PVCC1V
−
Power supply pin for DD1V
3
LX1V
O
Inductor connection pin for DD1V
4
PGND1V
−
Power ground pin for DD1V
5
PGND5V
−
Power ground pin for DD5V
6
LX5V
O
Inductor connection pin for DD5V
7
VOUT5V
O
Voltage output pin for DD5V
8
FB5V
I
Feedback pin for DD5V output voltage
9
ENSS
I
Enable pin for SSCG
(When not being used, connect this pin to ground pin. For the pin setting, see "Table 8-1
SSCG Pin Setting".)
10
GND1
−
Ground pin
11
PGND3V
−
Power ground for DD3V
12
DRVL3V
O
Low-side FET gate driver output pin for DD3V
13
VDD
I
Power supply pin for gate driver for DD3V
14
BST3V
I
Boost capacitor connection pin for DD3V
15
DRVH3V
O
High-side FET gate driver output pin for DD3V
16
LX3V
O
Inductor connection pin for DD3V
17
VIN
I
Power supply pin connecting battery
18
EN5V
I
Enable pin for DD3V and DD5V
19
CSN
I
Negative current sense pin
20
CSP
I
Positive current sense pin
21
FB3V
I
Feedback pin for DD3V output voltage
22
VB
O
Bias voltage output pin and power supply pin for logic
Do NOT connect any loads to this pin
23
IN3V
I
Power supply pin for load switch (SW3V) and DD1V
24
VOUT3V
O
Voltage output pin for DD3V via load switch (SW3V)
25
SYNC
I
External clock input / SYNC function setting pin
(For the pin setting, see "Table 8-2 SYNC Pin Setting".)
26
EN1V
I
Enable pin for DD1V
27
EN3V
I
Enable pin for SW3V load switch (SW3V)
28
HOT
O
Open drain type power good output pin for thermal warning indicator
(When not being used, connect this pin to ground pin)
29
GND2
−
Ground pin
30
PG1V
O
Open drain type power good output pin for DD1V
(When not being used, connect this pin to ground pin)
31
PG3V
O
Open drain type power good output pin for DD3V
(When not being used, connect this pin to ground pin)
32
PG5V
O
Open drain type power good output pin for DD5V
(When not being used, connect this pin to ground pin)
Document Number: 002-03396 Rev. *H Page 6 of 35
S6BP501A, S6BP502A
Figure 3-1 I/O Pin Equivalent Circuit Diagram
VB
EN3V
GND1
<EN3V pin>
22
27
10
VIN
EN5V
GND1
<EN5V pin>
17
18
10
VB
EN1V
GND1
<EN1V pin>
22
26
10
VB
SYNC
GND1
<SYNC pin>
22
25
10
VB
ENSS
GND1
<ENSS pin>
22
9
10
<VB pin>
5PGND5V
11 PGND3V
29 GND2
10 GND1
22 VB
17 VIN
GND2 is connected
by GND1 by wire.
VB
FB1V
GND1
<FB1V pin>
22
1
10
VB
FB3V
GND1
<FB3V pin>
22
21
10
VB
CSP
<CSP, CSN pins>
22
20
CSN 19
GND1 10
IN3V
23
4PGND1V
<IN3V, VOUT3V pins>
VOUT3V
24
10 GND1
PVCC1V
2
10 GND1
<LX1V pin>
LX1V
3
4PGND1V
VOUT5V
7
10 GND1
<LX5V pin>
LX5V
6
5PGND5V
FB5V
GND1
<FB5V pin>
8
10
VDD
13
10 GND1
DRVL3V
12
11 PGND3V
BST3V
14
<BST3V, DRVH3V, LX3V, VDD, DRVL3V pins>
DRVH3V
15
16 LX3V
10 GND1
<PG1V pin>
30 PG1V
10 GND1
<PG3V pin>
31 PG3V
10 GND1
<PG5V pin>
32 PG5V
10 GND1
<HOT pin>
28 HOT
Document Number: 002-03396 Rev. *H Page 7 of 35
S6BP501A, S6BP502A
4. Architecture Block Diagram
REG
15
DRVH3V 14
BST3V 20
CSP 19
CSN
16
LX3V
12
DRVL3V
11
PGND3V
DD3V block
23
IN3V
24
VOUT3V
13
VDD
3
LX1V
4
PGND1V
2
PVCC1V
ENDD1V
CLKDD1V
OVDD1V
OVPDD1V
LOGIC
LOGIC
LOGIC
LOGIC
ENDD5V
CLKDD5V
UVDD5V
OVDD5V
OVPDD5V
LOGIC
LOGIC
LOGIC
LOGIC
LOGIC
ENDD3V
OVDD3V
OVPDD3V
LOGIC
LOGIC
LOGIC
CLKDD3VLOGIC
UVDD1VLOGIC
LOGIC
UVDD5V/1V
OVDD3V/5V/1V
SWUV
OVPDD3V/5V/1V
HOT ENDD3V/5V/1V
CLKDD3V/5V/1V
ENSW
OSC / SSCG
SWUV
ENSW
UVLOBGR TSD/HOT
22
VB
FB3V
21
FB5V
8
FB1V
1
Modulate signal
ENCLK CLK
TSD LOGIC
UVLO LOGIC
UVLO
VIN
17
5
PGND5V
6
LX5V
7
VOUT5V
TSD
LOGIC
LOGIC
VB
VB
VB
VB
DD5V boost converter
SW3V switch
Controller
DD1V buck converter
Controller
Discharge
Discharge
VB
VB
GND1
10
GND2
29
High-side
driver
Low-side
driver
32
PG5V
31
PG3V
30
PG1V
28
HOT
HOT LOGIC
BUF
EN5V
18
BUF
BUF
BUF
BUF
EN3V
27
EN1V
26
SYNC
25 ENSS
9
SW3V load switch
DD3V buck
controller
IN3V
Document Number: 002-03396 Rev. *H Page 8 of 35
S6BP501A, S6BP502A
5. Absolute Maximum Ratings
Parameter
Symbol
Condition
Rating
Unit
Min
Max
Power supply voltage (*1)
VVIN
VIN pin
−0.3
+48
V
VVB
VB pin
−0.3
+6.9
V
VVDD
VDD pin
−0.3
+6.9
V
VPVCC1V
PVCC1V pin
−0.3
+6.9
V
VIN3V
IN3V pin
−0.3
+6.9
V
Pin voltage (*1)
VBST3V
BST3V pin
−0.3
+48
V
VCSN
CSN pin
−0.3
VVB
V
VCSP
CSP pin
−0.3
VVB
V
VFB1V
FB1V pin
−0.3
VVB
V
VFB3V
FB3V pin
−0.3
VVB
V
VFB5V
FB5V pin
−0.3
+6.9
V
VEN1V
EN1V pin
−0.3
+6.9
V
VEN3V
EN3V pin
−0.3
+6.9
V
VEN5V
EN5V pin
−0.3
+48
V
VPG1V
PG1V pin
−0.3
+6.9
V
VPG3V
PG3V pin
−0.3
+6.9
V
VPG5V
PG5V pin
−0.3
+6.9
V
VHOT
HOT pin
−0.3
+6.9
V
VENSS
ENSS pin
−0.3
VVB
V
VSYNC
SYNC pin
−0.3
+6.9
V
LX voltage (*1)
VLX1V
LX1V pin
−0.3
+6.9
V
VLX3V
LX3V pin
−0.3
+48
V
VLX5V
LX5V pin
−0.3
+6.9
V
Difference voltage
VBST3V_LX3V
BST3V to LX3V
−0.3
+6.9
V
VDRVH3V_LX3V
DRVH3V to LX3V
−0.3
+6.9
V
VDRVL3V_PGND3V
DRVL3V to PGND3V
−0.3
+6.9
V
VLX5V_VOUT5V
LX5V to VOUT5V
−0.3
+6.9
V
VLX1_PVCC1V
LX1 to PVCC1V
−0.3
+6.9
V
VPGND1_GND
PGND1V to GND1, PGND1V to GND2
−0.3
+0.3
V
VPGND3_GND
PGND3V to GND1, PGND3V to GND2
−0.3
+0.3
V
VPGND5_GND
PGND5V to GND1, PGND5V to GND2
−0.3
+0.3
V
VVIN_EN5V
VIN to EN5V
−0.3
+48
V
VVB_INPUT
VB to EN1V, VB to EN3V,
VB to FB1V, VB to FB3V, VB to FB5V
−0.3
+6.9
V
Output current
IPG
PG1V, PG3V, PG5V sink current
−3
0
mA
IHOT
HOT sink current
−3
0
mA
Power dissipation (*1)
PD
Ta ≤ ±25°C
0
4280 (*2)
mW
Storage temperature
TSTG
−
−55
+150
°C
*1: PGND1V = PGND3V = PGND5V = GND1 = GND2 = 0V
*2: When the product is mounted on 76.2 mm × 114.3 mm, four-layer FR−4 board
Warning:
1. Semiconductor devices may be permanently damaged by application of stress (including, without limitation, voltage, current or
temperature) in excess of absolute maximum ratings. Do not exceed any of these ratings.
Document Number: 002-03396 Rev. *H Page 9 of 35
S6BP501A, S6BP502A
6. Recommended Operating Conditions
Parameter
Symbol
Condition
Value
Unit
Min
Typ
Max
Power supply voltage (*1)
VVIN_START
VIN pin
At initial start-up
+6.8
−
−
V
VVIN
VIN pin
After start-up
+4.5
+12
+42
V
After start-up, Ta = 25°C
+3.7
+12
+42
V
After start-up, Ta = 25°C,
VOUT5V current = 1 mA,
VEN1V = VEN3V = 0V
+2.5
+12
+42
V
VVDD
VDD pin
−
VVOUT5V
−
V
VPVCC1V
PVCC1V pin
−
+3.3
−
V
VIN3V
IN3V pin
−
+3.3
−
V
Pin voltage (*1)
VEN1V
EN1V pin
0
−
+5.5
V
VEN3V
EN3V pin
0
−
+5.5
V
VEN5V
EN5V pin
0
−
VVIN
V
VPG1V
PG1V pin
0
−
+5.5
V
VPG3V
PG3V pin
0
−
+5.5
V
VPG5V
PG5V pin
0
−
+5.5
V
VHOT
HOT pin
0
−
+5.5
V
VENSS
ENSS pin
0
−
VVB
V
VSYNC
SYNC pin
0
−
+5.5
V
Input clock frequency
FSYNC
SYNC pin
1.8
2.1
2.4
MHz
Input clock duty range
DSYNC
SYNC pin
48
50
52
%
LX voltage (*1)
VLX5V
LX5V pin
0
−
+5.5
V
DD1V output voltage (*1)
VVOUT1V
Voltage of DD1V output capacitor
1.0
−
1.3
V
DD3V output voltage (*1)
VIN3V (*2)
Voltage of DD3V output capacitor, IN3V pin
3.2
−
3.4
V
DD5V output voltage (*1)
VVOUT5V
VOUT5V pin
5.0
−
5.2
V
BST capacitance
CBST
BST3V to LX3V
0.068
0.1
0.47
µF
VB capacitance
CVB
VB to GND
2.2
4.7
10
µF
Operating ambient
temperature
Ta
−
−40
+25
+105
°C
*1: PGND1V = PGND3V = PGND5V = GND1 = GND2 = 0V
*2: VIN3V is defined as DD3V output voltage, and VVOUT3V (VOUT3V pin voltage) is defined as the DD3V output voltage via SW3V.
Warning:
1. The recommended operating conditions are required in order to ensure the normal operation of the semiconductor device. All of
the device's electrical characteristics are warranted when the device is operated under these conditions.
2. Any use of semiconductor devices will be under their recommended operating condition.
3. Operation under any conditions other than these conditions may adversely affect reliability of device and could result in device
failure.
4. No warranty is made with respect to any use, operating conditions or combinations not represented on this data sheet. If you
are considering application under any conditions other than listed herein, please contact sales representatives beforehand.
Document Number: 002-03396 Rev. *H Page 10 of 35
S6BP501A, S6BP502A
7. Electrical Characteristics
VVIN = VEN5V = 12V, VPVCC1V = 3.3V, VVB = VVDD = VEN1V = VEN3V = 5.0V
(Unless specified otherwise, these are the electrical characteristics under the recommended operating environment.)
Parameter
Symbol
Condition
Value
Unit
Min
Typ
Max
Supply
current
Shutdown current
ISHDN
VIN pin current,
VVIN = 12V,
VEN1V = VEN3V = VEN5V = 0V
−
1.0
2.0
µA
Quiescent current
Iq
VIN pin current,
VVIN = 12V, VSYNC = 0V,
VEN1V = VEN3V = 0V, VEN5V = 12V,
All DC/DC converters with no load,
External FET: NVTFS5826NL
−
15 (*1)
25 (*1)
µA
VB supply current
IVB
VB pin current,
VVB = 5V, VSYNC = VVB,
VEN1V = VEN3V = 5V, VEN5V = 12V,
All DC/DC converters with no load
−
20
25
mA
UVLO
block
IC operation start voltage
VUVLO_START
VB pin, VVB rising
4.3
4.4
4.5
V
IC shutdown voltage
VUVLO_SHDN
VB pin, VVB falling
4.2
4.3
4.4
V
DD1V
block
Feedback voltage
VFB1V
FB1V pin
0.591
(−1.5%)
0.6
0.609
(+1.5%)
V
Output regulation
−
DD1V output voltage (VVOUT1V) ,
VPVCC1V = VIN3V = 3.3V,
IVOUT1V = 0 to 2.0A
−1.5 (*1)
−
+1.5 (*1)
%
Over voltage protection (OVP)
voltage
VOVPR_1V
Monitoring VFB1V rising
128.0
131.5
135.0
%
Over voltage protection
release voltage
VOVPF_1V
Monitoring VLX1V falling
−
−
0.94 (*1)
V
High-side FET ON resistance
RONH_1V
ILX1V = 50 mA (PVCC1V to LX1V)
−
130
260
mΩ
Low-side FET
ON resistance
RONL_1V
ILX1V = −50 mA (LX1V to PGND1V)
−
100
200
mΩ
FET leak current
ILEAK_1V
VPVCC1V = 5.0V, VEN1V = 0V
−
−
3
µA
Maximum output current
IOUTMAX_1V
L = 1.5 µH
S6BP501A
1.4 (*1)
−
−
A
S6BP502A
2.0 (*1)
−
−
A
Over current protection current
(LX peak current)
ILXPEAK_1V
L = 1.5 µH
S6BP501A
1.75 (*1)
−
−
A
S6BP502A
2.5 (*1)
−
−
A
Discharge resistance
RDIS_1V
LX1V pin
280
400
520
Ω
Soft-start time
tSS_1V
−
0.5
1.0
2.0
ms
DD3V
block
Feedback voltage
VFB3V
FB3V pin
0.8865
(−1.5%)
0.9
0.9135
(+1.5%)
V
Output regulation
−
IN3V pin,
VVIN = 4.5V to 42V,
IIN3V = 0A to 5.1A
−1.25 (*1)
−
+1.25 (*1)
%
PWM/PFM switching current
IPWMPFM_3V
−
−
1000 (*1)
−
mA
Over voltage protection (OVP)
voltage
VOVPR_3V
Monitoring VCSN rising
3.70
3.85
4.00
V
Over voltage protection
release voltage
VOVPF_3V
Monitoring VIN3V falling
−
−
0.94 (*1)
V
Dead time
tDEAD_3V
−
10
20
−
ns
Maximum duty cycle
DMAX_3V
VVIN < VIN3V
−
−
100
%
Soft-start time
tSS_3V
−
0.5
1.0
2.0
ms
Document Number: 002-03396 Rev. *H Page 11 of 35
S6BP501A, S6BP502A
VVIN = VEN5V = 12V, VPVCC1V = 3.3V, VVB = VVDD = VEN1V = VEN3V = 5.0V
(Unless specified otherwise, these are the electrical characteristics under the recommended operating environment.)
Parameter
Symbol
Condition
Value
Unit
Min
Typ
Max
DD3V
block
High-side
output
driver
ON resistance
RONH_3V
DRVH3V pin current = 10 mA,
(BST3V to DRVH3V)
−
15
30
Ω
RONL_3V
DRVH3V pin current = −50 mA,
(DRVH3V to LX3V)
−
1
3
Ω
Low-side
output
driver
ON resistance
RONH_3V
DRVL3V pin current = 50 mA,
(LX3V to DRVL3V)
−
1.5
4
Ω
RONL_3V
DRVL3V pin current = −50 mA,
(DRVL3V to LX3V)
−
0.75
2
Ω
Boost
switch
ON resistance
RON_BSTSW
IBST3V = 10 mA
−
8
24
Ω
Leak current
IR_BSTSW
VBST3V = 47V
−
−
2
µA
Output
current
monitor
Over current limit
−
VCSP − VCSN
60
80
100
mV
CSP input current
ICSP
Fixed PWM operation
−
2
5
µA
CSN input current
ICSN
Fixed PWM operation
−
8
20
µA
SW3V
block
ON resistance
RON_SW3V
IN3V to VOUT3V current = 50 mA
−
−
100
mΩ
Maximum output
current
ILOAD_ SW3V
S6BP501A
1.6 (*1)
−
−
A
S6BP502A
1.9 (*1)
−
−
A
Leak current
ILEAK_SW3V
VIN3V = 3.3V, VEN3V = 0V
−
−
3
µA
Discharge resistance
RDIS_SW3V
−
280
400
520
Ω
Soft-start time
tSS_SW3V
−
1.0
2.0
4.0
ms
DD5V
block
Feedback voltage
VFB5V
FB5V pin
1.182
(−1.5%)
1.2
1.218
(+1.5%)
V
Output regulation
−
DD5V output voltage (VVOUT5V),
VIN3V = 3.3V, IVOUT5V = 0A to 1.3A
−3.0 (*1)
−
+3.0 (*1)
%
PWM/PFM switching current
IPWMPFM_5V
−
−
300 (*1)
−
mA
Over voltage protection (OVP)
voltage
VOVPR_5V
Monitoring VVOUT5V rising
5.6
5.8
6.0
V
Over voltage protection release
voltage
VOVPF_5V
Monitoring VVOUT5V falling
−
−
0.94 (*1)
V
High-side FET ON resistance
RONH_5V
ILX5V = 50 mA (VOUT5V to LX5V)
−
130
260
mΩ
Low-side FET ON resistance
RONL_5V
ILX5V = −50 mA
(LX5V to PGND5V)
−
100
200
mΩ
FET leak current
ILEAK_5V
VVOUT5V = 5.0V, VEN5V = 0V
−
−
3
µA
Maximum output current
IOUT_MAX5V
L = 1.5 µH
S6BP501A
1.3 (*1)
−
−
A
S6BP502A
1.3 (*1)
−
−
A
Over current protection current
(LX peak current)
ILX_PEAK5V
L = 1.5 µH
S6BP501A
2.5 (*1)
−
−
A
S6BP502A
2.5 (*1)
−
−
A
Soft-start time
tSS_5V
VVOUT5V = 3.3V > 5.0V
0.2
0.5
1.0
ms
Document Number: 002-03396 Rev. *H Page 12 of 35
S6BP501A, S6BP502A
VVIN = VEN5V = 12V, VPVCC1V = 3.3V, VVB = VVDD = VEN1V = VEN3V = 5.0V
(Unless specified otherwise, these are the electrical characteristics under the recommended operating environment.)
Parameter
Symbol
Condition
Value
Unit
Min
Typ
Max
EN1V
pin
ON condition
VON_EN1V
−
2.0
−
−
V
OFF condition
VOFF_EN1V
−
−
−
0.4
V
Input current
ION_EN1V
VEN1V = 5.0V
−
50
100
µA
Pull down resistance
RPULL_EN1V
−
50
100
150
kΩ
EN3V
pin
ON condition
VON_EN3V
−
2.0
−
−
V
OFF condition
VOFF_EN3V
−
−
−
0.4
V
Input current
ION_EN3V
VEN3V = 5.0V
−
50
100
µA
Pull down resistance
RPULL_EN3V
−
50
100
150
kΩ
EN5V
pin
ON condition
VON_EN5V
−
2.5
−
−
V
OFF condition
VOFF_EN5V
−
−
−
0.2
V
Input current
ION_EN5V
VEN5V = 12.0V
−
1
3
µA
IOFF_EN5V
VEN5V = 0V
−
0
1
µA
PG1V
pin
Over voltage detection (OVD) voltage
VOVDR_PG1V
Monitoring VFB1V rising
105.0
106.5
108.0
%
Over voltage detection release voltage
VOVDF_PG1V
Monitoring VFB1V falling
−
105.5
−
%
Under voltage detection (UVD) voltage
VUVDF_PG1V
Monitoring VFB1V falling
92.5
94.0
95.5
%
Under voltage detection release voltage
VUVDR_PG1V
Monitoring VFB1V rising
−
95.0
−
%
Leak current
ILEAK_PG1V
VPG1V = 5.0V
−
−
1
µA
Low level voltage
VLOW_PG1V
IPG1V = 3 mA
−
0.15
0.30
V
Power-on reset time
tPOR_PG1V
VSYNC = 0V
8
10
12
ms
PG3V
pin
Over voltage detection (OVD) voltage
VOVDR_PG3V
Monitoring VFB3V rising
104.5
106.0
107.5
%
Over voltage detection release voltage
VOVDF_PG3V
Monitoring VFB3V falling
−
105.0
−
%
Under voltage detection (UVD) voltage
VUVDF_PG3V
Monitoring VVOUT3V falling
3.004
3.050
3.096
V
Under voltage detection release voltage
VUVDR_PG3V
Monitoring VVOUT3V rising
−
3.080
−
V
Leak current
ILEAK_PG3V
VPG3V = 5.0V
−
−
1
µA
Low level voltage
VLOW_PG3V
IPG3V = 3 mA
−
0.15
0.30
V
Power-on reset time
tPOR_PG3V
VSYNC = 0V
8
10
12
ms
PG5V
pin
Over voltage detection (OVD) voltage
VOVDR_PG5V
Monitoring VFB5V rising
106.0
108.0
110.0
%
Over voltage detection release voltage
VOVDF_PG5V
Monitoring VFB5V falling
−
107.0
−
%
Under voltage detection (UVD) voltage
VUVDF_PG5V
Monitoring VFB5V falling
90.0
92.0
94.0
%
Under voltage detection release voltage
VUVDR_PG5V
Monitoring VFB5V rising
−
93.0
−
%
Leak current
ILEAK_PG5V
VPG5V = 5.0V
−
−
1
µA
Low level voltage
VLOW_PG5V
IPG5V = 3 mA
−
0.15
0.30
V
Power-on reset time
tPOR_PG5V
VSYNC = 0V
8
10
12
ms
Document Number: 002-03396 Rev. *H Page 13 of 35
S6BP501A, S6BP502A
VVIN = VEN5V = 12V, VPVCC1V = 3.3V, VVB = VVDD = VEN1V = VEN3V = 5.0V
(Unless specified otherwise, these are the electrical characteristics under the recommended operating environment.)
Parameter
Symbol
Condition
Value
Unit
Min
Typ
Max
TSD
block
Operation shutdown temperature
TTSDR
Tj (*2) rising
−
+165 (*1)
−
°C
Operation restart temperature
TTSDF
Tj (*2) falling
−
+155 (*1)
−
°C
HOT
pin
Thermal warning indicator
temperature
TTWIR_HOT
Tj (*2) rising
−
+140 (*1)
−
°C
Thermal warning indicator
release temperature
TTWIF_HOT
Tj (*2) falling
−
+130 (*1)
−
°C
Leak current
ILEAK_HOT
VHOT = 5.0V
−
−
1
µA
Low level voltage
VLOW_HOT
IPG = 3 mA
−
0.15
0.30
V
OSC
block
Switching frequency
FOSC1
DD1V, DD5V,
In internal clock operation
1.9
2.1
2.3
MHz
FOSC2
DD3V, FOSC2 = FOSC1 / 5,
In internal clock operation
0.38
0.42
0.46
MHz
SYNC
Pin/
SYNC
block
High level voltage
VHIGH_SYNC
In external clock input
2.0
−
−
V
Low level voltage
VLOW_SYNC
In external clock input
−
−
0.4
V
Input current
IIN_SYNC
VSYNC = 5.0V
−
50
100
µA
Pull down resistance
RPULL_SYNC
−
50
100
150
kΩ
Input frequency
FIN_SYNC
In external clock input
1.8
−
2.4
MHz
Switching frequency
FOSC1_SYNC
DD1V, DD5V,
FOSC1_SYNC = FIN_SYNC,
In external clock operation
1.8
−
2.4
MHz
FOSC2_SYNC
DD3V,
FOSC2_SYNC = FIN_SYNC / 5,
In external clock operation
0.36
−
0.48
MHz
SSCG
block
Modulation range
−
VENSS = VVB
3
6 (*1)
9
%
Modulation frequency
FMOD
Composite modulation method is used.
Average of modulation frequency
3
4
5
kHz
ENSS
pin
ON condition
VON_ENSS
SSCG function ON
VVB × 0.8
−
−
V
OFF condition
VOFF_ENSS
SSCG function OFF
−
−
VVB × 0.2
V
Input current
IENSS
−
−0.1
−
+0.1
µA
*1: The electrical characteristic is ensured by statistical characterization and indirect tests.
*2: Junction temperature
Document Number: 002-03396 Rev. *H Page 14 of 35
S6BP501A, S6BP502A
8. Functional Description
8.1 Operation Sequence
The operation sequence of this IC is described in this section.
Figure 8-1 Turn On and Turn Off Sequence
Natural discharge
Natural discharge
Natural discharge
Discharge
Discharge
Switchover from internal voltage to VVOUT5V
VON_EN5V
VVIN
VEN5V
VVB
VIN3V
VPG5V
VPG1V
VVOUT5V
VEN1V
VVOUT1V
VPG3V
VEN3V
VVOUT3V
(*1)
(DD3V output)
16 ms 8 ms
VVIN_START
VUVLO_START
VUVDR_PG5V
VON_EN1V
VUVDR_PG1V
tPOR_PG5V
VON_EN3V
VUVDR_PG3V
VOFF_EN1V
VOFF_EN3V
VUVLO_SHDN
tPOR_PG1V
tPOR_PG3V
Start-up initialization
is complete
*1: When the VEN5V drops to the VOFF_EN5V while supplying a power to the VIN pin, the voltages, VPG1V, VPG3V, VPG5V and VHOT, are
undefined.
Document Number: 002-03396 Rev. *H Page 15 of 35
S6BP501A, S6BP502A
8.2 Each Function Block
Each function block is described in this section.
Under Voltage Lockout (UVLO)
This IC equips an UVLO function in order to prevent itself from operating unintentionally and from destructing or deteriorating its
subsequent devices. The UVLO block monitors the VB voltage. Once VB unintentionally drops below the IC shutdown voltage
(VUVLO_SHDN), UVLO block prohibits the regulators and controllers switching FETs until VB becomes higher than the IC operation
start voltage (VUVLO_START).
Over Voltage Detection and Protection (OVD, OVP)
When an output voltage exceeds the over voltage detection (OVD) voltage, the corresponding PG is asserted the low level. In case
any output voltage exceeds the over voltage protection (OVP) voltage, all output channels stop working to protect the connected
devices. When all output voltage fall below the over voltage protection release voltage, this IC returns to the normal operation.
Figure 8-2 Over Voltage Detection and Over Voltage Protection Sequence
VEN3V
tPOR_PG5V
VOVPR_5V
VUVDR_PG5V
VOVDR_PG5V
VOVPF_5V (0.94V)
VEN1V
VEN5V
VVOUT5V
VPG5V
VVOUT3V
VVOUT1V
VPG3V
VPG1V
Hi-Z Switching Hi-Z Switching
OFF ON OFF
Time
VLX3V
VLX1V
VLX5V
VVOUT1V discharge
VVOUT3V discharge
tPOR_PG5V
VUVDR_PG3V
VUVDR_PG1V
tPOR_PG3V
tPOR_PG1V tPOR_PG3V
tPOR_PG1V
Under Voltage Detection (UVD)
When an output voltage falls below the under voltage detection (UVD) voltage, the corresponding PG pin is asserted the low level
while the corresponding output channel keeps working. When the output voltage exceeds the under voltage detection release
voltage, each PG will be recovered Hi-Z.
Document Number: 002-03396 Rev. *H Page 16 of 35
S6BP501A, S6BP502A
Figure 8-3 Under Voltage Detection Sequence
VEN3V
tPOR_PG5V
VUVDR_PG5V
VEN1V
VEN5V
VVOUT5V
VPG5V
VVOUT3V
VVOUT1V
VPG3V
VPG1V
Hi-Z Switching
OFF
Time
VLX3V
VLX1V
VLX5V
VVOUT1V discharge
VVOUT3V discharge
tPOR_PG5V
VUVDF_PG5V VUVDR_PG5V
VUVDR_PG3V
VUVDR_PG1V
tPOR_PG3V
tPOR_PG1V
Over Current Protection (OCP)
In order to protect FETs from an excessive current, each output channel equips the OCP (over current protection) that sets current
limits by monitoring the corresponding over current protection current (LX peak current).
Thermal Shutdown (TSD)
The Thermal shutdown prevents this IC from a thermal destruction. If the junction temperature exceeds +165°C, all DC/DC
converters stop working. When the junction temperature falls below +155°C, this IC returns to the normal operation.
Thermal Warning Indicator (HOT)
Prior to TSD, this IC is able to notice its subsequent devices that it is close to the limit temperature. The HOT pin is an open-drain
output. If the junction temperature reaches +140°C, the HOT pin is asserted the low level. When the junction temperature falls below
+130°C, the HOT pin will be recovered Hi-Z.
Document Number: 002-03396 Rev. *H Page 17 of 35
S6BP501A, S6BP502A
Figure 8-4 Thermal Shutdown and Thermal Warning Indicator Sequence
Tj
VEN5V
VVOUT5V
VHOT
Time
TTSDR(165 oC)
(140 oC) (155 oC)
TTWIR_HOT TTSDF
(130 oC)
TTWIF_HOT
SSCG
This IC equips a SSCG (spread spectrum clock generator) function. When SSCG function turns on, it decreases EMI noise
immediately. SSCG function modulates the clock signal by 0% to +6%, which clock signal can be sourced from the internal oscillator
or an external clock source.
Table 8-1 SSCG Pin Setting
ENSS Pin Setting (*1)
SSCG Operation
L
SSCG function turns off.
DD1V, DD3V and DD5V are provided with non-modulated clock
H
SSCG function turns on.
DD1V, DD3V and DD5V are provided modulated.
*1: The H means VENSS > VON_ENSS. The L means VENSS < VOFF_ENSS.
SYNC
This IC equips a SYNC function that is to synchronize with an external clock signal supplied from SYNC. Also, the switching
between the automatic PWM/PFM switching operation or the fixed PWM operation is set by the SYNC pin. The Table 8-2 shows the
state corresponding to each operation by the SYNC pin setting. Please refer to the Table 8-3 for the switching signals to be inputted
to the SYNC pin and the availability. The switching frequency of the DD3V (FOSC2) is a signal obtained by one-fifth dividing an
internal clock or an inputted external clock.
Table 8-2 SYNC Pin Setting
SYNC Pin Setting
DD1V Operation
DD3V Operation
DD5V Operation
L
Fixed PWM operation
with internal clock
Automatic PWM/PFM
switching operation
with internal clock
Automatic PWM/PFM
switching operation
with internal clock
H
Fixed PWM operation with internal clock
CLK
Fixed PWM operation synchronized with external clock
Table 8-3 Switching signals to be inputted to the SYNC pin
Signals to be inputted to SYNC pin
Enable Pin Setting
Availability
EN1V
EN3V
EN5V
L ↔ CLK
L ↔ H
L
L
H
Prohibited
L or H
H
H
Available
H
L or H
H
Available
H ↔ CLK
L or H
L or H
H
Available
Document Number: 002-03396 Rev. *H Page 18 of 35
S6BP501A, S6BP502A
Figure 8-5 SYNC Function Sequence
VSYNC
Auto. PWM/PFM Sync. with
External CLK
Fixed PWM Fixed PWM
Internal CLK
DD1V Fixed PWM
Auto. PWM/PFM
Fixed PWM
DD3V, DD5V
Time
8.3 Output State and Protection Function Table
The following table shows the state of each output and each protection function.
Table 8-4 Output State and Protection Function Table
State
Enable Pin
Setting (*1)
Output State (*2)
PG Pin
Output (*3)
Remarks
EN1V
EN3V
EN5V
DD1V
DD3V
SW3V
DD5V
PG1V
PG3V
PG5V
DD1V, SW3V, DD5V are inactive
X
X
L
INA
INA
INA
INA
L
L
L
−
DD5V is active
L
L
H
INA
A
INA
A
L
L
Hi-Z
−
SW3V, DD5V are active
L
H
H
INA
A
A
A
L
Hi-Z
Hi-Z
−
DD1V, DD5V are active
H
L
H
A
A
INA
A
Hi-Z
L
Hi-Z
−
DD1V, SW3V, DD5V are active
H
H
H
A
A
A
A
Hi-Z
Hi-Z
Hi-Z
−
VVOUT1V OVD
H
H
H
A
A
A
A
L
Hi-Z
Hi-Z
VVOUT1V > VOVDR_PG1V
VVOUT3V OVD
H
H
H
A
A
A
A
Hi-Z
L
Hi-Z
VVOUT3V > VOVDR_PG3V
VVOUT5V OVD
H
H
H
A
A
A
A
Hi-Z
Hi-Z
L
VVOUT5V > VOVDR_PG5V
VVOUT1V OVP
H
X
H
INA
INA
INA
INA
L
L
L
VVOUT1V > VOVPR_1V
VVOUT3V OVP
X
H
H
INA
INA
INA
INA
L
L
L
VVOUT3V > VOVPR_3V
VVOUT5V OVP
X
X
H
INA
INA
INA
INA
L
L
L
VVOUT5V > VOVPR_5V
VVOUT1V UVD
H
H
H
A
A
A
A
L
Hi-Z
Hi-Z
VVOUT1V < VUVDF_PG5V
VVOUT3V UVD
H
H
H
A
A
A
A
Hi-Z
L
Hi-Z
VVOUT3V < VUVDF_PG3V
VVOUT5V UVD
H
H
H
A
A
A
A
Hi-Z
Hi-Z
L
VVOUT5V < VUVDF_PG5V
TSD
X
X
H
INA
INA
INA
INA
L
L
L
Tj > TTSD
*1: The H means that each enable pin voltage is VEN1V > VON_EN1V, VEN3V > VON_EN3V, VEN5V > VON_EN5V.
The L means that each enable pin voltage is VEN1V < VOFF_EN1V, VEN3V < VOFF_EN3V, VEN5V < VOFF_EN5V.
The X means that each enable pin voltage is the high level or the low level.
*2: The A means the active state. The INA means the inactive state.
*3: Each of the PG pins is formed as an open drain structure. In outputting the Hi-Z, the internal MOSFET is in the OFF state.
Document Number: 002-03396 Rev. *H Page 19 of 35
S6BP501A, S6BP502A
9. Application Circuit Example and Parts List
Figure 9-1 Application Circuit Example
15
DRVH3V 14
BST3V 20
CSP 19
CSN
16
LX3V
12
DRVL3V
11
PGND3V
23
IN3V
24
VOUT3V VOUT3V
A
13
VDD
VOUT5V
3
LX1V
4
PGND1V
2
PVCC1V
VOUT1V
28
HOT
32
PG5V
30
PG1V
31
PG3V
HOT
PG5V
PG1V
PG3V
EN3V
27
EN1V
26
VIN
17
5
PGND5V
6
LX5V
7
VOUT5V
GND1
10 GND2
29
ENSS
9
SYNC
25
Battery
2.5V
42V
to
RHOT RPG5V
CVOUT3V
CBST3V CIN_3V
LLX3V RS
MH
MLCOUT_3V
CIN_5V
CVOUT5V
DSBD
B
C
LLX5V
CPVCC1V
LLX1V CVOUT1V
22
VB
RPG1V RPG3V
EN1V
EN3V
CVB
CVDD
D E
D E
EN5V
18
CVIN
(*1)
CFB5V
B
RH_FB5V
RL_FB5V
FB5V
8
C
CFB1V RH_FB1V
RL_FB1V
FB1V
1
(3.2V to 3.4V)
(5.0V to 5.2V)
(1.0V to 1.3V)
A
FB3V
21
RH_FB3V
RL_FB3V
CFB1V
*1: The VOUT1V is a pin name only for this circuit.
Document Number: 002-03396 Rev. *H Page 20 of 35
S6BP501A, S6BP502A
Table 9-1 Parts List
Block
Symbol
Item
Value
Part Number
Vendor
Size [mm]
Remarks
Common
CVIN
Capacitor
0.1 μF
CGA3E2X7R1H104K080AA
TDK
1.6 × 0.8 × 0.8
X7R, Rated voltage: 50 VDC
CVB
Capacitor
4.7 μF
CGA4J3X7R1C475K125AB
TDK
2.0 × 1.2 × 1.25
X7R, Rated voltage: 16 VDC
CVDD
Capacitor
0.1 μF
CGA3E2X7R1E104K080AA
TDK
1.6 × 0.8 × 0.8
X7R, Rated voltage: 25 VDC
DSBD
SBD
VF: 0.5V
RB521S30T1G
ON
1.6 × 0.8 × 0.6
VR: 30 VDC, IF: 200 mA,
IFSM: 1.0A
DD1V
RH_FB1V
Resistor
270 kΩ (*1)
RK73H1JTTD2703F
KOA
1.6 × 0.8 × 0.45
Rated power: 0.1W
RL_FB1V
Resistor
270 kΩ (*1)
RK73H1JTTD2703F
KOA
1.6 × 0.8 × 0.45
Rated power: 0.1W
CFB1V
Capacitor
12 pF
CGA3E2C0G1H120J080AA
TDK
1.6 × 0.8 × 0.8
C0G, Rated voltage: 50 VDC
LLX1V
Inductor
1.5 μH
CLF6045NI-1R5N-D
TDK
7.4 × 7.0 × 4.8
DCR: 13 mΩ, IDC_MAX: 4.5A
CPVCC1V
Capacitor
4.7 μF
CGA4J3X7R1C475K125AB
TDK
2.0 × 1.2 × 1.25
X7R, Rated voltage: 16 VDC
CVOUT1V
Capacitor
22 μF × 2
CGA6P1X7R1C226M250AC
TDK
3.2 × 2.5 × 2.5
X7R, Rated voltage: 16 VDC
DD3V
RH_FB3V
Resistor
200 kΩ (*2)
RK73H1JTTD2003F
KOA
1.6 × 0.8 × 0.45
Rated power: 0.1W
Resistor
120 kΩ (*2)
RK73H1JTTD1203F
KOA
1.6 × 0.8 × 0.45
Rated power: 0.1W
RL_FB3V
Resistor
120 kΩ (*2)
RK73H1JTTD1203F
KOA
1.6 × 0.8 × 0.45
Rated power: 0.1W
CFB3V
Capacitor
−
−
−
−
Unnecessary for this circuit
LLX3V
Inductor
4.7 μH
CLF12577NIT-4R7N-D
TDK
12.8 × 12.5 × 8
DCR: 8.7 mΩ, IDC_MAX: 9.6A
CIN_3V
Capacitor
10 μF
CGA9N3X7R1H106K230KB
TDK
5.7 × 5.0 × 2.3
X7R, Rated voltage: 50 VDC
COUT_3V
Capacitor
47 μF × 10
CGA9N3X7R1C476M230KB
TDK
5.7 × 5.0 × 2.4
X7R, Rated voltage: 16 VDC
MH
N-ch
MOSFET
RON_MAX:
32 mΩ
NVTFS5826NL
ON
3.3 × 3.3 × 0.75
VDS: 60V, ID: 10A
ML
N-ch
MOSFET
RON_MAX:
32 mΩ
NVTFS5826NL
ON
3.3 × 3.3 × 0.75
VDS: 60V, ID: 10A
CBST3V
Capacitor
0.1 μF
CGA3E2X7R1H104K080AA
TDK
1.6 × 0.8 × 0.8
X7R, Rated voltage: 50 VDC
RS
Resistor
10 mΩ
KRL2012-M-R010-F-T1
KOA
2.0 × 1.25 × 0.5
Rated power: 1W
SW3V
CVOUT3V
Capacitor
22 μF
CGA6P1X7R1C226M250AC
TDK
3.2 × 1.6 × 1.6
X7R, Rated voltage: 16 VDC
DD5V
RH_FB5V
Resistor
2 MΩ (*3)
RK73H1JTTD2004F
KOA
1.6 × 0.8 × 0.45
Rated power: 0.1W
Resistor
1.8 MΩ (*3)
RK73H1JTTD1804F
KOA
1.6 × 0.8 × 0.45
Rated power: 0.1W
RL_FB5V
Resistor
1.2 MΩ (*3)
RK73H1JTTD1204F
KOA
1.6 × 0.8 × 0.45
Rated power: 0.1W
CFB5V
Capacitor
3 pF
CGA3E2C0G1H030C080AA
TDK
1.6 × 0.8 × 0.8
C0G, Rated voltage: 50 VDC
LLX5V
Inductor
1.5 μH
CLF6045NI-1R5N-D
TDK
7.4 × 7.0 × 4.8
DCR: 13 mΩ, IDC_MAX: 4.5A
CIN_5V
Capacitor
4.7 μF
CGA4J3X7R1C475K125AB
TDK
2.0 × 1.2 × 1.25
X7R, Rated voltage: 16 VDC
CVOUT5V
Capacitor
47 μF × 5
CGA9N3X7R1C476M230KB
TDK
5.7 × 5.0 × 2.4
X7R, Rated voltage: 16 VDC
HOT/
PG
pins
RHOT
Resistor
100 kΩ
RK73H1JTTD1003F
KOA
1.6 × 0.8 × 0.45
Rated power: 0.1W
RPG1V
Resistor
100 kΩ
RK73H1JTTD1003F
KOA
1.6 × 0.8 × 0.45
Rated power: 0.1W
RPG3V
Resistor
100 kΩ
RK73H1JTTD1003F
KOA
1.6 × 0.8 × 0.45
Rated power: 0.1W
RPG5V
Resistor
100 kΩ
RK73H1JTTD1003F
KOA
1.6 × 0.8 × 0.45
Rated power: 0.1W
Capacitor: Ceramic capacitor, SBD: Schottky barrier diode
*1: VVOUT1V setting ≈ 1.2V
*2: VIN3V setting ≈ 3.3V
*3: VVOUT5V setting ≈ 5.0V
TDK: TDK Corporation
KOA: KOA Corporation
ON: ON Semiconductor Corporation
Note:
− The values of capacitors and resistors are subjects to consider according to a subsequent system. The values shown in the
table are very dependable system whose current consumption varies dynamically from 0A to the full-load condition (maximum
output current) in 10 μs.
Document Number: 002-03396 Rev. *H Page 21 of 35
S6BP501A, S6BP502A
10. Application Note
10.1 Setting the Operation Conditions
DD1V Output Voltage
The DD1V output voltage (VVOUT1V) of this IC can be adjusted by changing the external resistors connecting the FB1V pin.
Figure 10-1 DD1V Output Voltage Setting
RH_FB1V
RL_FB1V
FB1V
1
VVOUT1V
The DD1V output voltage (VVOUT1V) can be calculated using the formula below.
󰇟󰇠 
 
DD3V Output Voltage
The DD3V output voltage (VIN3V) of this IC can be adjusted by changing the external resistors connecting the FB3V pin.
Figure 10-2 DD3V Output Voltage Setting
FB3V
21
RH_FB3V
RL_FB3V
VIN3V
The DD3V output voltage (VIN3V) can be calculated using the formula below.
󰇟󰇠 
 
DD5V Output Voltage
The DD5V output voltage (VVOUT5V) of this IC can be adjusted by changing the external resistors connecting the FB5V pin.
Figure 10-3 DD5V Output Voltage Setting
RH_FB5V
RL_FB5V
FB5V
8
VVOUT5V
The DD5V output voltage (VVOUT5V) can be calculated using the formula below.
󰇟󰇠 
 
Document Number: 002-03396 Rev. *H Page 22 of 35
S6BP501A, S6BP502A
CBST3V Capacitor
To drive the gate of the DD3V high-side FET (MH), the bootstrap capacitor (CBST3V) must have enough stored charge. The CBST3V
capacitor is set to satisfy conditions of the following formula to hold electric charge above the threshold voltage (VFET [V]) of the
high-side FET.
󰇟󰇠  
󰇛󰇜    
   
CBST3V [F] : Bootstrap capacitor
COUT_3V [F] : DD3V output capacitor
VFET [V] : DD3V high-side FET threshold voltage
IOUT_MIN5V [A] : DD5V output current
VIN3V [V] : DD3V output voltage
RH_FB3V [Ω] : DD3V high-side output voltage setting resistor
RL_FB3V [Ω] : DD3V low-side output voltage setting resistor
(See Figure 9-1 Application Circuit Example for more information)
Figure 10-4 CBST3V setting (CBST3V vs COUT_3V)
CBST3V vs COUT_3V
CBST3V [µF]
COUT_3V [µF]
0
0.00
0.50
500
S6BP502AGraph002
100 200 300
0.05
0.10
0.15
0.20
0.25
0.30
0.35
0.40
0.45
400
CBST3V (Max)
CBST3V (Min)
VIN3V = 3.3 V, RH_FB3V = 320 Ωk, RL_FB3V = 120 kΩ
VFET = 2.5 V, IOUT_MIN5V = 200 µA
In addition, when the VIN voltage lowers down to the DD3V output voltage, the on-duty of the switching becomes 100% (DMAX_3V)
and the DD3V high-side FET keeps the turn-on state. The electric charge to the CBST3V capacitor is not performed in the turn-on
state, then the gate voltage of the high-side FET cannot be maintained. Comfirm that the time period during which the VIN voltage
drops (below +3.7 V) is less than the high-side FET on-duration time (TONDT). TONDT can be calculated using the formula below.
󰇟󰇠 
  
TONDT [s] : DD3V high-side FET On-duration time
VFET [V] : DD3V high-side FET threshold voltage
CBST3V [F] : Bootstrap capacitor
Document Number: 002-03396 Rev. *H Page 23 of 35
S6BP501A, S6BP502A
Figure 10-5 High-side FET On-duration Time vs CBST3V
TONDT vs CBST3V
TONDT [ms]
CBST3V [µF]
0
0
1000
0.5
S6BP502AGraph003
0.1 0.2 0.3
100
200
300
400
500
600
700
800
900
0.4
VFET = 2.5 V
Document Number: 002-03396 Rev. *H Page 24 of 35
S6BP501A, S6BP502A
11. Reference Data
The following data are measured by an evaluation board mounting S6BP502A00SN2B000 under the conditions shown in ”9.
Application Circuit Example and Parts List”. When measuring the efficiency, load regulation, line regulation and the temperature
characteristics, the pull-up resistors, RPG1V, RPG3V, RPG5V and RHOT, are removed.
VOUT1V: Efficiency vs IVOUT1V
IVOUT1V [A]
S6BP502AGraph001
EN1V = VB, EN3V = 0 V, EN5V = VBATTERY
Fixed PWM
(SYNC = 0 V)
Fixed PWM
(SYNC = VB)
VOUT1V: Efficiency [%]
10
40
50
60
80
90
100
0
20
30
70
VBATTERY = 12 V, VOUT1V setting = 1.2 V, TA = +25 oC,
100µ 101100m10m1m
VBATTERY = 12 V, VOUT3V setting = 3.3 V, TA = +25 oC,
VOUT3V: Efficiency vs IVOUT3V
IVOUT3V [A]
S6BP502AGraph002
EN1V = 0V, EN3V = VB, EN5V = VBATTERY
Automatic
PWM/PFM
(SYNC = 0 V)
Fixed PWM
(SYNC = VB)
VOUT3V: Efficiency [%]
10
40
50
60
80
90
100
0
20
30
70
100µ 101100m10m1m
VOUT5V: Efficiency vs IVOUT5V
VOUT5V: Efficiency [%]
IVOUT5V [A]
S6BP502AGraph003
100µ
10
40
50
60
80
90
100
0
20
101100m10m1m
EN1V = EN3V = 0 V, EN5V = VBATTERY
Automatic
PWM/PFM
(SYNC = 0 V)
Fixed PWM
(SYNC = VB)
30
70
VBATTERY = 12 V, VOUT5V setting = 5 V, TA = +25 oC,
EN1V = VB, EN3V = 0 V, EN5V = VBATTERY
VOUT1V: Efficiency [%]
10
40
50
60
80
90
100
0
20
30
70
VOUT1V: Efficiency vs VBATTERY
VOUT1V setting = 1.2 V, IVOUT1V = 1 A, TA = +25 oC,
VBATTERY [V]
S6BP502AGraph004
0 455 10 15 20 25 30 35 40
Fixed PWM
(SYNC = 0 V)
VOUT3V setting = 3.3 V, IVOUT3V = 0.95 A, TA = +25 oC,
EN1V = 0 V, EN3V = VB, EN5V = VBATTERY
VOUT3V: Efficiency [%]
10
40
50
60
80
90
100
0
20
30
70
VOUT3V: Efficiency vs VBATTERY
VBATTERY [V]
S6BP502AGraph005
0 455 10 15 20 25 30 35 40
Automatic
PWM/PFM
(SYNC = 0 V)
VOUT5V: Efficiency vs VBATTERY
VOUT5V: Efficiency [%]
VBATTERY [V]
S6BP502AGraph006
0
10
40
50
60
80
90
100
0
20
455
VOUT5V setting = 5 V, IVOUT5V = 0.65 A, TA = +25 oC,
EN1V = EN3V = 0 V, EN5V = VBATTERY
30
70
10 15 20 25 30 35 40
Automatic
PWM/PFM
(SYNC = 0 V)
VOUT1V: Load Regulation
IVOUT1V [A]
S6BP502AGraph007
0 2.0
Fixed PWM
(SYNC = VB)
Fixed PWM
(SYNC = 0 V)
0.5 1.0 1.5
VBATTERY = 12 V, VOUT1V setting = 1.2 V, TA = +25 oC,
EN1V = VB, EN3V = 0 V, EN5V = VBATTERY
VOUT1V [V]
1.16
1.19
1.20
1.21
1.23
1.24
1.25
1.15
1.17
1.18
1.22
VOUT3V: Load Regulation
VOUT3V [V]
IVOUT3V [A]
S6BP502AGraph008
0
3.10
3.25
3.30
3.35
3.45
3.50
3.55
3.05
3.15
2.0
Fixed PWM
(SYNC = VB)
3.20
3.40
0.5 1.0 1.5
VBATTERY = 12 V, VOUT3V setting = 3.3 V, TA = +25 oC,
EN1V = 0 V, EN3V = VB, EN5V = VBATTERY
Automatic
PWM/PFM
(SYNC = 0 V)
VOUT5V: Load Regulation
VOUT5V [V]
IVOUT5V [A]
S6BP502AGraph009
0
4.80
4.95
5.00
5.05
5.15
5.20
5.25
4.75
4.85
2.0
Automatic
PWM/PFM
(SYNC = 0 V)
Fixed PWM
(SYNC = VB)
4.90
5.10
0.5 1.0 1.5
VBATTERY = 12 V, VOUT5V setting = 5 V, TA = +25 oC,
EN1V = EN3V = 0 V, EN5V = VBATTERY
Document Number: 002-03396 Rev. *H Page 25 of 35
S6BP501A, S6BP502A
VOUT1V: Line Regulation
S6BP502AGraph010
EN1V = VB, EN3V = 0 V, EN5V = VBATTERY
VOUT1V [V]
1.16
1.19
1.20
1.21
1.23
1.24
1.25
1.15
1.17
1.18
1.22
VBATTERY [V]
0 455 10 15 20 25 30 35 40
VOUT1V setting = 1.2 V, IVOUT1V = 1 A, TA = +25 oC,
Fixed PWM
(SYNC = 0 V)
VOUT3V: Line Regulation
VOUT3V [V]
S6BP502AGraph011
3.10
3.25
3.30
3.35
3.45
3.50
3.55
3.05
3.15
3.20
3.40
EN1V = 0 V, EN3V = VB, EN5V = VBATTERY
VBATTERY [V]
0 455 10 15 20 25 30 35 40
VOUT3V setting = 3.3 V, IVOUT3V = 0.95 A, TA = +25 oC,
Automatic
PWM/PFM
(SYNC = 0 V)
VOUT5V: Line Regulation
VOUT5V [V]
4.80
4.95
5.00
5.05
5.15
5.20
5.25
4.75
4.85
4.90
5.10
EN1V = EN3V = 0 V, EN5V = VBATTERY
VBATTERY [V]
S6BP502AGraph012
0 455 10 15 20 25 30 35 40
VOUT5V setting = 5 V, IVOUT5V = 0.65 A, TA = +25 oC,
Automatic
PWM/PFM
(SYNC = 0 V)
VOUT1V vs Ambient Temperature
EN1V = VB, EN3V = 0 V, EN5V = VBATTERY
VOUT1V [V]
1.16
1.19
1.20
1.21
1.23
1.24
1.25
1.15
1.17
1.18
1.22
VBATTERY = 12 V, VOUT1V setting = 1.2 V, IVOUT1V = 1A,
Ambient Temperature (TA) [oC]
S6BP502AGraph013
-50 -25 0 +25 +50 +75 +100 +125
Fixed PWM
(SYNC = 0 V)
VOUT3V vs Ambient Temperature
VOUT3V [V]
3.10
3.25
3.30
3.35
3.45
3.50
3.55
3.05
3.15
3.20
3.40
EN1V = 0 V, EN3V = VB, EN5V = VBATTERY
VBATTERY = 12 V, VOUT3V setting = 3.3 V, IVOUT3V = 0.95 A,
Ambient Temperature (TA) [oC]
S6BP502AGraph014
-50 -25 0 +25 +50 +75 +100 +125
Automatic
PWM/PFM
(SYNC = 0 V)
VOUT5V vs Ambient Temperature
VOUT5V [V]
4.80
4.95
5.00
5.05
5.15
5.20
5.25
4.75
4.85
4.90
5.10
Ambient Temperature (TA) [oC]
S6BP502AGraph015
-50
VBATTERY = 12 V, VOUT5V setting = 5 V, IVOUT5V = 0.65 A,
-25 0 +25 +50 +75 +100 +125
EN1V = EN3V = 0 V, EN5V = VBATTERY
Automatic
PWM/PFM
(SYNC = 0 V)
5 ms/div S6BP502AGraph016
VOUT1V: Turn On Response
VBATTERY = 12 V, IVOUT1V = IVOUT5V = 0 A, TA = +25 oC,
EN3V = 0 V, EN5V = VBATTERY,
EN1V
5 V/div
VOUT1V
1 V/div
PG1V
5 V/div
SYNC = 0 V (DD1V: Fixed PWM)
5 ms/div S6BP502AGraph017
VOUT1V: Turn Off Response
VBATTERY = 12 V, IVOUT1V = IVOUT5V = 0 A, TA = +25 oC,
EN3V = 0 V, EN5V = VBATTERY,
EN1V
5 V/div
VOUT1V
1 V/div
PG1V
5 V/div
SYNC = 0 V (DD1V: Fixed PWM)
Discharge
Document Number: 002-03396 Rev. *H Page 26 of 35
S6BP501A, S6BP502A
5 ms/div S6BP502AGraph018
VOUT3V: Turn On Response
VBATTERY = 12 V, IVOUT3V = IVOUT5V = 0 A, TA = +25 oC,
EN1V = 0 V, EN5V = VBATTERY,
EN3V
5 V/div
VOUT3V
2 V/div
PG3V
5 V/div
SYNC = 0 V (DD3V: Automatic PWM/PFM)
5 ms/div S6BP502AGraph019
VOUT3V: Turn Off Response
VBATTERY = 12 V, IVOUT3V = IVOUT5V = 0 A, TA = +25 oC,
EN1V = 0 V, EN5V = VBATTERY,
EN3V
5 V/div
VOUT3V
2 V/div
PG3V
5 V/div
SYNC = 0 V (DD3V: Automatic PWM/PFM)
Discharge
5 ms/div S6BP502AGraph020
VOUT5V: Turn On Response
IVOUT5V = 0 A, TA = +25 oC,
EN1V = EN3V = 0 V, EN5V = VBATTERY,
VBATTERY
5 V/div
VOUT5V
2 V/div
PG5V
5 V/div
(DD3V output)
2 V/div
IN3V
SYNC = 0 V (DD5V: Automatic PWM/PFM)
5 ms/div S6BP502AGraph021
VOUT5V: Turn Off Response
IVOUT5V = 0 A, TA = +25 oC,
EN1V = EN3V = 0 V, EN5V = VBATTERY,
VBATTERY
5 V/div
VOUT5V
2 V/div
PG5V
5 V/div
(DD3V output)
2 V/div
IN3V
SYNC = 0 V (DD5V: Automatic PWM/PFM)
Natural discharge
320k Frequency [Hz] 520k470k420k370k
SSCG OFF
SSCG ON
LX3V Output Spectrum vs Frequency
LX3V Output Spectrum [dBm]
-60
-70
-50
-40
-30
-20
-10
0
EN1V = 0V, EN3V = VB, EN5V = VBATTERY,
VBATTERY = 12 V, IVOUT3V = 1.9 A, IVOUT5V = 0 A,
SYNC = 0 V (DD3V: Automatic PWM/PFM), RBW: 1 kHz, VBW: 100 kHz
S6BP502AGraph022
200 ns/div S6BP502AGraph023
LX1V
1 V/div
LX1V: Switching Waveform
VBATTERY = 12 V, IVOUT1V = 2 A, TA = +25 oC,
EN1V = VB, EN3V = 0 V, EN5V = VBATTERY,
SYNC = 0 V (DD1V: Fixed PWM)
Document Number: 002-03396 Rev. *H Page 27 of 35
S6BP501A, S6BP502A
20 µs/div S6BP502AGraph024
LX3V
2 V/div
LX3V: Switching Waveform
VBATTERY = 12 V, IVOUT3V = 100 mA, TA = +25 oC,
EN1V = 0 V, EN3V = VB, EN5V = VBATTERY,
SYNC = 0 V (DD3V: Automatic PWM/PFM)
1 µs/div S6BP502AGraph025
LX3V
2 V/div
LX3V: Switching Waveform
VBATTERY = 12 V, IVOUT3V = 1.9 A, TA = +25 oC,
EN1V = 0 V, EN3V = VB, EN5V = VBATTERY,
SYNC = 0 V (DD3V: Automatic PWM/PFM)
5 µs/div S6BP502AGraph026
LX5V: Switching Waveform
VBATTERY = 12 V, IVOUT5V = 50 mA, TA = +25 oC,
EN1V = EN3V = 0 V, EN5V = VBATTERY,
LX5V
1 V/div
SYNC = 0 V (DD5V: Automatic PWM/PFM)
200 ns/div S6BP502AGraph027
LX5V: Switching Waveform
VBATTERY = 12 V, IVOUT5V = 1.3 A, TA = +25 oC,
EN1V = EN3V = 0 V, EN5V = VBATTERY,
LX5V
1 V/div
SYNC = 0 V (DD5V: Automatic PWM/PFM)
10 µs/div S6BP502AGraph028
VOUT1V
10 mV/div
VOUT1V: Ripple Waveform
VBATTERY = 12 V, IVOUT1V = 2 A, IVOUT3V = IVOUT5V = 0 A, TA = +25 oC,
EN1V = EN3V = VB, EN5V = VBATTERY,
SYNC = 0 V (DD1V: Fixed PWM)
AC-coupled
S6BP502AGraph029
VOUT3V
20 mV/div
VOUT3V: Ripple Waveform
1 µs/div
VBATTERY = 12 V, IVOUT1V = 0 A, IVOUT3V = 1.9 A, IVOUT5V = 0 A, TA = +25 oC,
EN1V = EN3V = VB, EN5V = VBATTERY,
SYNC = 0 V (DD3V: Automatic PWM/PFM)
AC-coupled
Document Number: 002-03396 Rev. *H Page 28 of 35
S6BP501A, S6BP502A
1 µs/div S6BP502AGraph030
VOUT5V: Ripple Waveform
VBATTERY = 12 V, IVOUT1V = IVOUT3V = 0 A, IVOUT5V = 1.3 A, TA = +25 oC,
EN1V = EN3V = VB, EN5V = VBATTERY,
VOUT5V
50 mV/div
SYNC = 0 V (DD5V: Automatic PWM/PFM)
AC-coupled
500 µs/div S6BP502AGraph031
VOUT1V, VOUT3V, VOUT5V: Ripple Waveform
VBATTERY = 12 V, IVOUT1V = IVOUT3V = IVOUT5V = 0 A, TA = +25 oC,
EN1V = EN3V = VB, EN5V = VBATTERY,
VOUT5V
50 mV/div
SYNC = 0 V (DD1V: Fixed PWM, DD3V & DD5V: Automatic PWM/PFM)
VOUT3V
20 mV/div
VOUT1V
10 mV/div
Offset 5 V
Offset 3.3 V
Offset 1.2 V
1 µs/div S6BP502AGraph032
VBATTERY = 12 V, IVOUT1V = IVOUT3V = IVOUT5V = 0 A, TA = +25 oC,
EN1V = EN3V = VB, EN5V = VBATTERY,
SYNC = VB (DD1V & DD3V & DD5V: Fixed PWM)
VOUT1V, VOUT3V, VOUT5V: Ripple Waveform
VOUT5V
50 mV/div
VOUT3V
20 mV/div
VOUT1V
10 mV/div
AC-coupled
AC-coupled
AC-coupled
100 µs/div S6BP502AGraph033
VOUT1V: Load Transient Response
VBATTERY = 12 V, IVOUT3V = IVOUT5V = 0 A, TA = +25 oC,
EN1V = EN3V = VB, EN5V = VBATTERY,
VOUT1V
100 mV/div
SYNC = 0 V (DD1V: Fixed PWM)
IVOUT1V
1 A/div 0 A
2 A
AC-coupled
100 µs/div S6BP502AGraph034
VOUT3V: Load Transient Response
VBATTERY = 12 V, IVOUT1V = IVOUT5V = 0 A, TA = +25 oC,
EN1V = EN3V = VB, EN5V = VBATTERY,
SYNC = 0 V (DD3V: Automatic PWM/PFM)
IVOUT3V
1 A/div
VOUT3V
200 mV/div
Offset 3.3 V
0 A
1.9 A
Document Number: 002-03396 Rev. *H Page 29 of 35
S6BP501A, S6BP502A
100 µs/div S6BP502AGraph035
VOUT5V: Load Transient Response
VBATTERY = 12 V, IVOUT1V = IVOUT3V = 0 A, TA = +25 oC,
EN1V = EN3V = VB, EN5V = VBATTERY,
SYNC = 0 V (DD5V: Automatic PWM/PFM)
IVOUT5V
1 A/div
VOUT5V
500 mV/div
AC-coupled
0 A
1.3 A
5 ms/div S6BP502AGraph036
VOUT1V, VOUT3V, VOUT5V: Line Transient Response
IVOUT1V = 1 A, IVOUT3V = 0.95 A, IVOUT5V = 0.65 A, TA = +25 oC,
EN1V = EN3V = VB, EN5V = VBATTERY,
VBATTERY
5 V/div
SYNC = 0 V (DD1V: Fixed PWM, DD3V & DD5V: Automatic PWM/PFM)
VOUT5V
200 mV/div
12 V
3.7 V
AC-coupled
VOUT3V
100 mV/div
AC-coupled
VOUT1V
50 mV/div
AC-coupled
5 ms/div S6BP502AGraph037
12 V
42 V
VOUT1V, VOUT3V, VOUT5V: Line Transient Response
IVOUT1V = 1 A, IVOUT3V = 0.95 A, IVOUT5V = 0.65 A, TA = +25 oC,
EN1V = EN3V = VB, EN5V = VBATTERY,
SYNC = 0 V (DD1V: Fixed PWM, DD3V & DD5V: Automatic PWM/PFM)
VBATTERY
5 V/div
VOUT5V
200 mV/div
AC-coupled
VOUT3V
100 mV/div
AC-coupled
VOUT1V
50 mV/div
AC-coupled
20 ms/div S6BP502AGraph038
DD1V: Over Current Protection Waveform
VBATTERY = 12 V, IVOUT5V = 0 A, TA = +25 oC,
EN1V = VB, EN3V = 0 V, EN5V = VBATTERY,
VOUT1V
500 mV/div
SYNC = 0 V (DD1V: Fixed PWM)
IVOUT1V
1 A/div
1.9 A
2.36 A
PG1V
5 V/div
Over current protection
Document Number: 002-03396 Rev. *H Page 30 of 35
S6BP501A, S6BP502A
-180
-135
-90
-45
0
45
90
135
180
-80
-60
-40
-20
0
20
40
60
80
1,000
10,000
100,000
1,000,000
DD1V: Gain, Phase Characteristics
VBATTERY = 12 V, IVOUT1V = 2 A, IVOUT5V = 0 A, TA = +25 oC,
EN1V = VB, EN3V = 0 V, EN5V = VBATTERY,
SYNC = 0 V (DD1V: Fixed PWM)
1k 10k 100k 1M
DD1V: Gain [dB]
-60
-20
0
20
40
60
-80
-40
80
0
45
90
135
180
-45
-90
-135
-180
Frequency [Hz]
DD1V: Phase [degree]
Phase
Gain
S6BP502AGraph040
Band width: 67 kHz
Phase margin: 37 degree
-180
-135
-90
-45
0
45
90
135
180
-80
-60
-40
-20
0
20
40
60
80
1,000
10,000
100,000
1,000,000
1k 10k 100k 1M
DD3V: Gain [dB]
-60
-20
0
20
40
60
-80
-40
80
0
45
90
135
180
-45
-90
-135
-180
Frequency [Hz]
DD3V: Phase [degree]
Gain
Phase
S6BP502AGraph041
Band width: 15 kHz
Phase margin: 53 degree
DD3V: Gain, Phase Characteristics
VBATTERY = 12 V, IVOUT3V = 1.9 A, IVOUT5V = 0 A, TA = +25 oC,
EN1V = 0 V, EN3V = VB, EN5V = VBATTERY,
SYNC = 0 V (DD3V: Automatic PWM/PFM)
-180
-135
-90
-45
0
45
90
135
180
-80
-60
-40
-20
0
20
40
60
80
1,000
10,000
100,000
1,000,000
1k 10k 100k 1M
DD5V: Gain [dB]
-60
-20
0
20
40
60
-80
-40
80
0
45
90
135
180
-45
-90
-135
-180
Frequency [Hz]
DD5V: Phase [degree]
Gain
S6BP502AGraph042
Band width: 11 kHz
Phase margin: 87 degree
DD5V: Gain, Phase Characteristics
VBATTERY = 12 V, IVOUT5V = 1.3 A, TA = +25 oC,
EN1V = EN3V = 0 V, EN5V = VBATTERY,
SYNC = 0 V (DD5V: Automatic PWM/PFM)
Phase
Document Number: 002-03396 Rev. *H Page 31 of 35
S6BP501A, S6BP502A
12. Usage Precaution
Printed circuit board ground lines should be set up with consideration for common impedance.
Take appropriate measures against static electricity.
Containers for semiconductor materials should have anti−static protection or be made of conductive material.
After mounting, printed circuit boards should be stored and shipped in conductive bags or containers.
Work platforms, tools, and instruments should be properly grounded.
Working personnel should be grounded with resistance of 250 kΩ to 1 MΩ in serial body and ground.
Do not apply negative voltages.
The use of negative voltages below −0.3 V may make the parasitic transistor activated to the LSI, and can cause malfunctions.
13. RoHS Compliance Information
This product has observed the standard of lead, cadmium, mercury, Hexavalent chromium, polybrominated biphenyls (PBB), and
polybrominated diphenyl ethers (PBDE).
14. Ordering Information
Part Number (MPN)
Package
S6BP501A00SN2B000
Plastic, Wettable QFN (0.50 mm pitch), 32-pin
(VNG032)
S6BP502A00SN2B000
MPN: Marketing Part Number
Figure 14-1 Ordering Part Number Definitions
S 6B P 5 0X A 00 S N2 B 000
Fixed on 000
Packing: B = 13 inch Tape and Reel
Package: N2 = QFN, Pure Sn / Low-Halogen
Reliability Grade: S = 10 ppm
Preset Condition: 00
Revision: A = 1st Revision
Product ID: 01, 02
Topology: 5 = Switch-Mode Power Supply (For Instrument Cluster)
Product Type: P = Power Management IC
Product Class: 6B = Automotive Analog
Company ID: S = Cypress
Document Number: 002-03396 Rev. *H Page 32 of 35
S6BP501A, S6BP502A
15. Package Dimensions
DIMENSIONS
NOM.
MIN.
b
E
3.30 BSC
D
A
A1
5.00 BSC
0.00
MAX.
0.90
0.05
PROFILE
2. DIM ENSIONING AND TOLERANCINC CONFORM S TO ASM E Y14.5-1994.
3. N IS THE TOTALNUMBER OFTERMINALS.
4. DIMENSION "b "APPLIES TO M ETALLIZED TERM INAL AND IS MEASURED BETWEEN 0.15 AND
0.30m m FROM TERM INAL TIP.IF THE TERMINAL HAS THE OPTIONAL RADIUS ON THE OTH ER
END OF THE TERMINAL. THE DIMENSION "b"SHOULD NOT BE MEASURED IN THAT RADIUS AREA.
5. ND REFER TO THE NUMBER OF TERM INALSON D OR E SIDE.
1. ALL D IMENSIONS ARE IN MILLIMETERS.
0.50 BSC
N
L
32
0.35 0.55
0.45
NOTE
TERMINAL COUNT
EXPOSED PAD SIZE
0.18 0.25 0.30
E
D2
23.30 BSC
e
cR0.20
TERMINAL W IDTH
EXPOSED PAD SIZE
TERM INAL PITCH
TERM INAL LENGTH
PIN #1 ID
6. PIN #1 ID ON TOP W ILLBE LOCATED WITHIN I NDICATED ZONE.
7. UNILATERAL COPLANARITY ZONE APPLIES TO THE EXPOSED HEAT SIN KSLUG ASW ELL AS
THE TERM INALS.
b1 0.10 0.15 0.20 DIM PLE W IDTH
L1 0.05 0.25
0.15 DIMPLE LENGTH
E1
D1
5.00 BSC
4.75 BSC
4.75 BSC
m
P
012°
0.60
L2 DIM PLE HEIGHT
0.09 REF
SYMBOL
NOTES
SID E VIEW
BOTTOM VIEW
TOP VIEW
D
E
0.1 0 C
2X
0.1 0 C
2X
0.1 0 C
A
A1 0.0 8 C
SEATING PLAN E
D2
E2
0.1 0 C A B
0.1 0 C A B
1
N
eb0.1 0 C A B
0.0 5 C
L
ND-1) X e
INDEX M ARK
6
4
5
7
L1
b 1
4X P
4X P
0.5 DIA
c
A
B
D1
E1
C
DETA IL "A"
b 1
b
A1
L2
DETA IL "A"
m
5.0X5.0X0.9 M M VNG032 3.3X3.3 M M EPAD (SAW N) REV**
PACKAGE OUTLINE, 32 LEA D W QFN
002-13490 Rev. **
Document Number: 002-03396 Rev. *H Page 33 of 35
S6BP501A, S6BP502A
Document History
Document Title: S6BP501A, S6BP502A 3ch DC/DC Converter IC for Automotive Cluster
Document Number: 002-03396
Revision
ECN
Orig. of
Change
Submission
Date
Description of Change
**
4921966
HIXT
09/16/2015
New Spec.
*A
4998578
HIXT
11/02/2015
Added Errata.
*B
5107300
HIXT
01/26/2016
Updated the description for the pin name, IN3V in the Table 3-1.
Updated the following Electrical Characteristics.
ILEAK_1V: Condition
ILXPEAK_1V: Min values
tSS_3V: Typ value
RONH_3V: Typ value
RON_BSTSW: Typ and Max values
IR_BSTSW: Condition and Max value
ILOAD_ SW3V: Min values
ILEAK_SW3V: Condition
tSS_SW3V: Typ value
IPWMPFM_5V: Typ value
ILEAK_5V: Condition
ILX_PEAK5V: Typ value
VOVDF_PG1V: Typ value
SSCG block (Modulation range): Typ value
Updated the description and the Table 8-2 of the SYNC in the Section 8.2.
Added the remarks for the DD5V output in the Table 8-3.
Updated the following parts in the Table 9-1..
CVDD: value, part number and remarks
RH_FB3V: value and part number
RL_FB3V: value and part number
RS: value
Added “Development Support”
Updated Errata.
*C
5198555
HIXT
05/16/2016
Added “AEC-Q100 compliant (Grade-2)” in Features.
Updated Architecture Block Diagram.
Deleted Errata item1, item2, item4, and item5 from Errata.
Errata item3 in Errata is under confirmation with Rev.2 silicon.
*D
5325274
HIXT
09/09/2016
Added Block Diagram
Added More Information
Updated the values in Electrical Characteristics
DD3V block: Boost switch
RONH_3V: Condition (DRVH3V pin current = 50 mA 10 mA),
Typ value (8.5Ω 15Ω)
RON_BSTSW: Typ value (3Ω 8Ω), Max value (10Ω 24Ω)
IR_BSTSW: Max value (3 µA 2 µA)
Deleted “Development Support”
Added Figure 14-1 Ordering Part Number Definitions
Deleted Errata
Document Number: 002-03396 Rev. *H Page 34 of 35
S6BP501A, S6BP502A
Revision
ECN
Orig. of
Change
Submission
Date
Description of Change
*E
5522611
HIXT
11/18/2016
Updated the values in Electrical Characteristics
Supply current:
ISHDN: Added Max value (2 µA)
IVB: Added Max value (25 mA)
DD1V block:
RONH_1V: Added Max value (260 mΩ)
RONL_1V: Added Max value (200 mΩ)
RDIS_1V: Added Min value (280Ω), Added Max value (520Ω)
tSS_1V: Added Min value (0.5 ms), Added Max value (2 ms)
DD3V block:
tSS_3V: Added Min value (0.5 ms), Added Max value (2 ms)
RONH_3V: Added Max value (30 Ω)
RONL_3V: Added Max value (3 Ω)
RONH_3V: Added Max value (4 Ω)
RONL_3V: Added Max value (2 Ω)
RDIS_SW3V: Added Min value (280Ω), Added Max value (520Ω)
tSS_SW3V: Added Min value (1 ms), Added Max value (4 ms)
DD5V block:
RONH_5V: Added Max value (260 mΩ)
RONL_5V: Added Max value (200 mΩ)
tSS_5V: Added Min value (0.2 ms), Added Max value (1 ms)
EN1V pin: ION_EN1V: Added Max value (100 µA)
EN3V pin: ION_EN3V: Added Max value (100 µA)
EN5V pin: IOFF_EN5V: Added Max value (1 µA)
SYNC Pin / SYNC block: IIN_SYNC: Added Max value (100 µA)
SSCG block:
Modulation range: Added Min value (3 %), Added Max value (9%)
FMOD: Added comments in condition.
Added Min value (3 kHz), Added Max value (5 kHz)
Updated Figure 8-1 Turn On and Turn Off Sequence
Added a comment “Start-up initialization is complete”.
*F
5626998
HIXT
02/13/2017
Changed the values in Electrical Characteristics
OSC block: Switching frequency
FOSC1: Changed Min value (2.0 MHz 1.9 MHz)
Changed Max value (2.2 MHz 2.3 MHz)
FOSC2: Changed Min value (0.40 MHz 0.38 MHz)
Changed Max value (0.44 MHz 0.46 MHz)
Added the setting of CBST3V Capacitor in Application Note
*G
5764719
HIXT
06/20/2017
Updated Block Diagram
Corrected a typo (FET symbol of the load switch): “NMOS” “PMOS”
Updated Architecture Block Diagram
Corrected a typo (FET symbol of the load switch): “NMOS” “PMOS”
Updated Absolute Maximum Ratings
Corrected a typo (Symbol of “DRVL3V to PGND3V” at the difference voltage):
“VDRVH3V_LX3V“ “VDRVL3V_PGND3V”
Updated the conditions in Electrical Characteristics
DD1V block, VOVPF_1V: Added “Monitoring VLX1V falling”
DD3V block, VOVPR_3V: Changed “Monitoring VVOUT3V rising” “Monitoring VCSN rising”
DD3V block, VOVPF_3V: Added “Monitoring VIN3V falling”
DD3V block, RONL_3V: Corrected a typo “(PLX3V to DRVL3V)” “(LX3V to DRVL3V)”
DD5V block, VOVPF_5V: Added “Monitoring VVOUT5V falling”
PG1V pin, ILEAK_PG1V: Corrected a typo “VPG5V = 5.0 V” “VPG1V = 5.0 V”
PG1V pin, VLOW_PG1V: Corrected a typo “IPG5V = 3 mA” “IPG1V = 3 mA”
Added Figure 3-1 I/O Pin Equivalent Circuit Diagram
Added Reference Data
Deleted the part number of the engineering part number from Ordering Information
*H
6283945
ATTS
08/17/2018
No update due to sunset review
Document Number: 002-03396 Rev. *H August 17, 2018 Page 35 of 35
S6BP501A, S6BP502A
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