PRECISION SINGLE CELL TIMER ZSCT1555 ISSUE 3 - JULY 2006 DEVICE DESCRIPTION These devices are precision timing circuits for generation of accurate time delays or oscillation. Advanced circuit design means that these devices can operate from a single battery cell with the minimum of quiescent current. In monostable mode time delays are controlled by a single resistor and capacitor network. In astable mode the frequency and du t y cy c l e c a n be a c c u r a t e l y an d independently controlled with two external resistors and one capacitor. The threshold and trigger levels are normally set as a proportion of VCC by internal resistors. These levels can be programmed by the use of the control input pin. When the trigger input reduces to a value below the trigger level, the flip-flop is set and the output goes high. With the trigger input above the trigger level and the threshold input above the threshold level, the flip-flop is reset and the output goes low. The reset pin has priority over all the other inputs and is used to start new timing cycles. A low on the reset input causes the flip-flop to reset forcing the output low. Whenever the output is forced low then the internal discharge transistor is turned on. FEATURES * * * * * 0.9V supply operating voltage guaranteed Pin connections comparable with 555 series timers Very low quiescent current 74 A SO8 and DIL8 packages Operating temperature range compatible with battery technologies APPLICATIONS * * Portable and battery powered equipment Low voltage and low power systems SCHEMATIC DIAGRAM 8 VCC CONTROL 5 6 THRESH 2 TRIGGER 7 DISCHARGE 3 OUTPUT 4 RESET 1 GND Issue 3 - July 2006 (c) Zetex Semiconductors plc 2006 ZSCT1555 ABSOLUTE MAXIMUM RATINGS Supply Voltage Input Voltages (Cont, Reset, Thres, Trig) Output Current Operating Temperature Storage Temperature 9V 9V 100mA -20 to 100C -55 to 150C Power Dissipation (Tamb=25C) DIL8 625mW SO8 625mW Recommended Operating Conditions Supply Voltage 0.9V(min) 6V(max) Input Voltages 6V(max) (Cont, Reset, Thres, Trig) Output Current Sink 100mA(max) Source 150A(max) ELECTRICAL CHARACTERISTICS TEST CONDITIONS (Unless otherwise stated):Tamb= 25C,VCC= 1.5V SYMBOL PARAMETER LIMITS CONDITIONS MIN. VCC Supply Voltage ICC Supply Current VTH Threshold Voltage 0.9 Threshold Current (Note 1) VTR Trigger Voltage VCC= 5V ITR Trigger Current tPD Trigger Propagation delay VRS Reset Voltage IRS Reset Current IDS 74 150 no load VCC= 5V, no load VCC= 5V ITH TYP. UNITS MAX. 6 V 120 200 A 1.195 1.22 3.9 4 1.245 V 4.1 0 20 100 nA 0.2 0.57 0.25 0.62 0.3 0.67 V -35 -100 nA 0 Delay from trigger to output s 2 0.1 0.2 0.4 V 0 -5 -10 A Discharge switch Off-state current 0 10 100 nA VDS Discharge switch On-state voltage 0 IDS= 0.2mA VCC= 5V, IDS= 0.3mA 0 180 240 225 350 mV VCT Control Voltage (Open Circuit) Reset @ 0V VCC= 5V 1.195 1.22 3.9 4 1.245 V 4.1 0 0 0 0 0.15 0.45 0.13 0.65 0.3 0.65 0.3 1 V 1.1 4.6 1.5 5 V VOL Output Voltage (Low) IOL=10mA IOL=50mA VCC=5V, IOL=10mA VCC=5V, IOL=100mA VOH Output Voltage (High) 1 IOH= 100A VCC= 5V, IOH= 150A 4.5 Issue 3 - July 2006 (c) Zetex Semiconductors plc 2006 www.zetex.com ZSCT1555 ELECTRICAL CHARACTERISTICS (Continued) TEST CONDITIONS (Unless otherwise stated):Tamb=25C,VCC=1.5V LIMITS SYMBOL PARAMETER CONDITIONS tR Output pulse rise time CL= 10pF VCC=5V, CL=10pF 1.6 1.2 s tF Output pulse fall time CL= 10pF VCC=5V, CL=10pF 240 24 ns tIA(m) tV(m) tT(m) Timing error, Monostable Initial accuracy (Note 2) Drift with supply voltage Drift with temperature RA= 10 to 50 k RB= 10 to 50 k CT = 68nF 1.6 0.262 100 % %/V tIA(a) tV(a) tT(a) Timing error, Astable Initial accuracy (Note 2) Drift with supply voltage Drift with temperature RA= 10 to 50 k RB= 10 to 50 k CT = 68nF 4.8 0.662 150 % %/V fA Astable maximum frequency MIN. RA=20 k RB= 10 k CT =47pF TYP. UNITS MAX. ppm/C ppm/C 330 kHz Note 1: This will influence the maximum values of RA and RB (RAMAX=10M,RBMAX=1.5M) Note 2: Is defined as the difference between the measured value and the average value of a random sample taken on a batch basis Issue 3 - July 2006 (c) Zetex Semiconductors plc 2006 www.zetex.com ZSCT1555 5 Minimum Pulse Width (s) Minimum Pulse Width (s) TYPICAL CHARACTERISTICS Vcc=1.5v Rout/Vcc = 1K 4 3 +100C +25C -20C 2 1 0 0 5 Vcc=5v Rout/Vcc = 1K 4 3 +100C +25C -20C 2 1 0 0.1 0.1 0 0.2 Lowest Voltage Level of Trigger Pulse (xVcc) Lowest Voltage Level of Trigger Pulse (xVcc) Minimum Pulse Width Required for Triggering Minimum Pulse Width Required for Triggering 8 Vcc=1.5v Rout/Vcc=1K Propagation Delay (s) Propagation Delay (s) 5 +100C 4 3 +25C -20C 2 1 0 0 0.1 6 4 +100C +25C -20C 2 0 0.2 Lowest Voltage Level of Trigger Pulse (xVcc) Output Propagation Delay Output Propagation Delay 200 1.05 Pulse Duration relative to Vcc=5v Supply Current (A) 0.1 0 0.2 Lowest Voltage Level of Trigger Pulse (xVcc) Vcc=5v Rout/Vcc=1K 160 120 80 -20C +25C +100C 40 1.00 0.95 0.90 0.85 0 0.80 0.0 1.0 2.0 3.0 4.0 5.0 Supply Voltage (V) Supply Current v Supply Voltage Issue 3 - July 2006 (c) Zetex Semiconductors plc 2006 0 1 2 3 4 5 6 Supply Voltage (V) Normalized Output Pulse Duration v Supply Voltage www.zetex.com ZSCT1555 TYPICAL CHARACTERISTICS 1.0 0.5 Vcc=1.5v 0.4 Vcc - Vout (V) 0.8 Vcc - Vout (V) Vcc=5v 0.6 -20C +25C +100C 0.4 0.2 0.0 0.001 0.01 0.1 -20C +25C +100C 0.3 0.2 0.1 0.0 0.001 1.0 -20C +25C +100C 0.4 0.2 0.0 0.01 0.1 1 10 100 Low Level Output Voltage (V) Low Level Output Voltage (V) Vcc=1.5v 1.8 1.6 1.4 1.2 1.0 0.8 0.6 1.0 0.8 0.6 0.4 -20C +25C +100C 0.2 0.0 0.01 0.1 0.1 Sink Current (mA) Discharge Transistor Voltage v Sink Current Issue 3 - July 2006 (c) Zetex Semiconductors plc 2006 1 Discharge Transistor Voltage (V) Discharge Transistor Voltage (V) -20C +25C +100C 0.01 1 10 100 Output Low Voltage Drop v Output Current Vcc=1.5v 0.001 0.001 0.1 Low Level Output Current (mA) Output Low Voltage Drop v Output Current 1 1.0 Vcc=5v Low Level Output Current (mA) 10 0.1 Output High Voltage Drop v Output Current Output High Voltage Drop v Output Current 2.0 0.01 High Level Output Current (mA) High-Level Output Current (mA) 10 Vcc=5v 1 -20C +25C +100C 0.1 0.01 0.001 0.01 0.1 1 Sink Current (mA) Discharge Transistor Voltage v Sink Current www.zetex.com ZSCT1555 FUNCTIONAL DIAGRAM FUNCTIONAL TABLE RESET TRIGGER VALUE THRESHOLD VOLTAGE OUTPUT DISCHARGE SWITCH Low N/A High <VCC/5 N/A Low On N/A High Off High >VCC/5 >4VCC/5 Low On High >VCC/5 <4VCC/5 As Previously established POWER DERATING TABLE Package TA25C Power Rating Derating Factor Above TA=25C TA=70C Power Rating TA=85C Power Rating N8 625mW 6.25mW/C 330mW 250mW D8 625mW 6.25mW/C 330mW 250mW Issue 3 - July 2006 (c) Zetex Semiconductors plc 2006 www.zetex.com ZSCT1555 APPLICATIONS INFORMATION Many configurations of the ZSCT1555 are possible. The following gives a selection of a few of these using the most basic monostable and astable connections. The final application example in astable mode shows the device optimum use for low voltage and power economy in a single cell boost converter. Monostable Operation Figure 2 Figure 3 gives an easy selection of RA and CT values for various time delays. 100 100k RA C - Capacitance (uF) Figure 1 shows connection of the timer as a one-shot whose pulse period is independent of supply voltage. Initially the capacitor is held discharged. The application of a negative going trigger pulse sets an internal flip flop which allows the capacitor to start to charge up via RA and forces the output high. The voltage on the capacitor increases for time t, where t = 1.63RACT, at the end of this period the voltage on the capacitor is 0.8 VCC. At this point the flip flop resets, the capacitor is discharged and the output is driven low. 10 1M 1 10M 0.1 0.01 0.001 10us 100us 1ms Figure 3 10ms 100ms 1s 10s Time Delay This configuration of circuit can be used as a frequency divider by adjusting the timing period. Figure 4 indicates a divide by three. Figure 1 Figure 2 shows the timing diagram for this function. During the output high period further trigger pulses are locked out however the circuit can be reset by application of a negative going pulse on the reset pin. Once the output is driven low it remains in this state until the application of the next trigger pulse. If the reset function is not used then it is recommended to connect to VCC to eliminate any possibility of false triggering. Issue 3 - July 2006 (c) Zetex Semiconductors plc 2006 Figure 4 www.zetex.com ZSCT1555 Figure 5 shows the monostable mode used as a pulse width modulator. Here the trigger pin is supplied with a continuous pulse train, the resulting output pulse width is modulated by a signal applied to the control pin. Astable operation The configuration of Figure 7 produces a free running multivibrator circuit whose frequency is independent of supply voltage. The ratio of resistors RA and RB precisely sets the circuit duty cycle. The capacitor is charged and discharged between thresholds at 0.2VCC and 0.8VCC. Oscillation frequency (f) and duty cycle (d) can be calculated using the following equations:f = 0.62/(RA + 2RB)CT d = RB /(RA + 2RB) Figure 5 Figure 6 shows typical waveform examples. Figure 7 Figure 8 shows the waveforms generated in this mode of operation. Figure 6 Figure 8 Issue 3 - July 2006 (c) Zetex Semiconductors plc 2006 www.zetex.com ZSCT1555 Figure 9 gives an easy selection for RA, RB and CT values. Figure 11 shows the result of modulation with a triangle wave input to the control pin. C - Capacitance (uF) 100 100k 10 1M 1 10M 0.1 0.01 (RA+2RB) 0.001 0.1 1 10 100 1k 10k 100k Free Running Frequency (Hz) Figure 9 Figure 11 Similar to the PWM circuit of Figure 5 the astable circuit can be configured with modulation of the control input as shown in Figure 10. The result is a pulse position modulated, PPM, circuit where the pulse position is altered by the control input voltage. Figure 10 Issue 3 - July 2006 (c) Zetex Semiconductors plc 2006 www.zetex.com ZSCT1555 Figure 12 The circuit of Figure 12 shows the device in astable mode operating as part of a single cell boost converter. This circuit generates a 5 volt supply from a single battery cell. The circuit output voltage is maintained down to 0.9 volts input and power economy is optimised for extended battery life. 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For details, see www.zetex.com/salesnetwork This publication is issued to provide outline information only which (unless agreed by the company in writing) may not be used, applied or reproduced for any purpose or form part of any order or contact or be regarded as a representation relating to the products or services concerned. The company reserves the right to alter without notice the specification, design, price or conditions of supply of any product or service. Issue 3 - July 2006 (c) Zetex Semiconductors plc 2006 www.zetex.com