P_AVDD
to PCIXBSR register
PCI 6520CB Data Book, Version 2.0
© 2004 PLX Technology, Inc. All rights reserved. Preliminary Index-3
Index
P_AVDD
3-24, 4-4, 5-5, 23-3
P_AVSS 3-24, 5-5
P_CBE[3:0]# 3-6, 8-2, 8-9, 16-1–16-2
P_CBE[7:0]# 3-2, 5-5
P_CBE[7:4]# 3-7, 6-38, 8-9
P_CLKIN 3-3, 3-15, 4-1, 4-4, 4-6, 5-2, 5-3, 5-5, 6-31
P_CLKOE 3-3, 3-15, 5-6, 6-29
P_CLKRUN# 3-21, 5-6
P_CR 3-3, 3-15, 5-6
P_DEVSEL# 3-2, 3-7, 5-6, 8-8, 12-1, 17-1, 17-2
P_FRAME# 3-2, 3-7, 5-6, 13-2
P_GNT# 3-2, 3-7, 5-6, 14-1
P_IDSEL 3-2, 3-7, 5-6, 8-8, 16-2
P_IRDY# 3-2, 3-7, 5-6, 6-26
P_LOCK# 3-2, 3-7, 5-6, 13-1–13-2
P_M66EN 3-2, 3-8, 3-15, 4-4, 5-2, 5-6
P_PAR 3-2, 3-8, 5-6, 14-1
P_PAR64 3-2, 3-8, 5-6, 6-38, 14-1, 17-2
P_PERR# 3-2, 3-8, 5-6, 12-1–12-13
P_PLLEN# 3-3, 3-15, 4-4, 5-6, 23-3
P_REQ# 3-2, 3-8, 5-6, 14-1
P_REQ64# 3-2, 3-9, 5-6
P_RSTIN# 3-18, 4-1, 5-2, 5-4, 5-5–5-6, 7-1, 9-1
P_SERR# 3-2, 3-9, 5-6, 6-2, 6-5, 6-15, 6-32, 6-35, 8-4,
8-7, 8-8, 8-13, 8-14, 8-15, 8-16, 12-1–12-13, 13-2,
17-2
P_STOP# 3-2, 3-9, 5-6
P_TRDY# 3-2, 3-10, 5-6
P_TST[1:0] 3-21, 5-6
P_VIO 3-4, 3-24, 5-5
P_XCAP 3-22, 5-1, 5-6
package specs 24-1–24-4
parity 12-1–12-13
error rules 9-4
primary signal 3-8
reporting errors 17-2
secondary signal 3-12, 3-13
PBGA
industry standard 24-1
package ordering information D-1
pinout 24-4–24-5
PCI 6520
general product information 1-1–1-6, D-1
PCI arbitration 14-1–14-3
PCI Bus operation 8-1–8-18
PCI Bus Power Management Interface Specification,
Revision 1.1
See PCI Power Mgmt. r1.1
PCI Configuration registers 6-2–6-53
PCI Local Bus Specification, Revision 2.3
See PCI r2.3
PCI Power Mgmt. r1.1 2-1, 20-1
PCI r2.3 1-5, 3-2, 5-2, 11-3, 21-1, 22-2
PCI to PCI Bridge Architecture Specification, Revision
1.2
See P-to-P Bridge r1.2
PCI transactions 8-1–8-18, 11-1–11-3
PCI Type 1 Header registers 6-4–6-15
PCIBISTR register 6-7, 7-3
PCICCR register 6-6, 6-38
PCICLSR register 6-6, 6-22, 6-23, 8-3, 18-1
PCICR register 6-4–6-5, 6-10, 6-14, 6-15, 6-32, 7-3, 8-4,
8-7, 8-13, 8-14, 8-15, 8-16, 10-1, 10-2, 10-4, 10-5,
12-1, 12-4, 12-6–12-13, 13-2, 17-2
PCIHTR register 6-7, 6-38, 7-3
PCIIDR register 6-4, 6-38, 7-3
PCIIOBAR register 6-9, 6-14, 10-1, 10-2
PCIIOBARU16 register 6-9, 6-13, 10-2
PCIIOLMT register 6-9, 10-2
PCIIOLMTU16 register 6-9, 6-13, 10-2
PCIIPR register 6-14
PCILTR register 6-6
PCIMBAR register 6-11, 10-2, 10-3
PCIMLMT register 6-11, 10-2, 10-3
PCIPBNO register 6-8, 8-11
PCIPMBAR register 6-12, 6-13, 10-2, 10-4
PCIPMBARU32 register 6-12, 6-13, 10-2
PCIPMLMT register 6-12, 6-13, 10-2, 10-4
PCIPMLMTU32 register 6-12, 6-13, 10-2
PCIREV register 6-6
PCISBNO register 6-8, 8-9, 8-11
PCISLTR register 6-8
PCISR register 6-5, 8-13, 8-14, 8-15, 8-16, 12-1, 12-2,
12-4, 12-6, 12-8, 12-13, 17-1
PCISSR register 6-10, 8-13, 8-14, 8-15, 8-16, 12-1,
12-4, 12-7, 12-9, 12-13, 17-1
PCISUBNO register 6-8, 8-11
PCI-X Addendum to PCI Local Bus Specification,
Revision 1.0b
See PCI-X r1.0b
PCI-X Bus operation 9-1–9-22
PCI-X Capability registers 6-50–6-53
PCI-X clock B-1–B-2
PCI-X r1.0b 3-2, 3-3, 6-1, 11-4, 23-5
PCI-X transactions 9-1–9-22, 11-4–11-6
PCIX_NEXT register 6-50
PCIX100MHZ 3-20, 5-1, 5-5
PCIXBSR register
3-21, 6-52, 9-8, 9-12, 9-14