SCLS352H - JULY 1997 - REVISED OCTOBER 2005 D Operating Range 2-V to 5.5-V VCC D Schmitt-Trigger Circuitry On A, B, and CLR SN54AHC123A . . . J OR W PACKAGE SN74AHC123A . . . D, DB, DGV, N, OR PW PACKAGE (TOP VIEW) Inputs for Slow Input Transition Rates D Edge Triggered From Active-High or D 1 16 2 15 3 14 4 13 5 12 6 11 7 10 8 9 VCC 1Rext/Cext 1Cext 1Q 2Q 2CLR 2B 2A SN54AHC123A . . . FK PACKAGE (TOP VIEW) 1B 1A NC VCC 1R ext /C ext D D D D 1A 1B 1CLR 1Q 2Q 2Cext 2Rext/Cext GND Active-Low Gated Logic Inputs Retriggerable for Very Long Output Pulses Overriding Clear Terminates Output Pulse Glitch-Free Power-Up Reset On Outputs Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II ESD Protection Exceeds JESD 22 - 2000-V Human-Body Model (A114-A) - 200-V Machine Model (A115-A) - 1000-V Charged-Device Model (C101) description/ordering information The 'AHC123A devices are dual retriggerable monostable multivibrators designed for 2-V to 5.5-V VCC operation. 1CLR 1Q NC 2Q 2Cext 3 2 1 20 19 18 5 17 6 16 7 15 8 14 9 10 11 12 13 1Cext 1Q NC 2Q 2CLR 2R ext /Cext GND NC 2A 2B These edge-triggered multivibrators feature output pulse-duration control by three methods. In the first method, the A input is low, and the B input goes high. In the second method, the B input is high, and the A input goes low. In the third method, the A input is low, the B input is high, and the clear (CLR) input goes high. 4 NC - No internal connection ORDERING INFORMATION PDIP - N -55C 125C -55 C to 125 C TOP-SIDE MARKING Tube SN74AHC123AN Tube SN74AHC123AD Tape and reel SN74AHC123ADR SSOP - DB Tape and reel SN74AHC123ADBR HA123A TSSOP - PW Tape and reel SN74AHC123APWR HA123A TVSOP - DGV Tape and reel SN74AHC123ADGVR HA123A CDIP - J Tube SNJ54AHC123AJ SNJ54AHC123AJ CFP - W Tube SNJ54AHC123AW SNJ54AHC123AW LCCC - FK Tube SNJ54AHC123AFK SNJ54AHC123AFK SOIC - D -40C to 85C ORDERABLE PART NUMBER PACKAGE TA SN74AHC123AN AHC123A Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Copyright 2005, Texas Instruments Incorporated !" # $%&" !# '%()$!" *!"&+ *%$"# $ " #'&$$!"# '& ",& "&# &-!# #"%&"# #"!*!* .!!"/+ *%$" '$&##0 *&# " &$&##!)/ $)%*& "&#"0 !)) '!!&"&#+ '*%$"# $')!" " 121 3 !)) '!!&"&# !& "&#"&* %)&## ",&.#& "&*+ !)) ",& '*%$"# '*%$" '$&##0 *&# " &$&##!)/ $)%*& "&#"0 !)) '!!&"&#+ POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 1 SCLS352H - JULY 1997 - REVISED OCTOBER 2005 description/ordering information (continued) The output pulse duration is programmed by selecting external resistance and capacitance values. The external timing capacitor must be connected between Cext and Rext/Cext (positive) and an external resistor connected between Rext/Cext and VCC. To obtain variable pulse durations, connect an external variable resistance between Rext/Cext and VCC. The output pulse duration also can be reduced by taking CLR low. Pulse triggering occurs at a particular voltage level and is not directly related to the transition time of the input pulse. The A, B, and CLR inputs have Schmitt triggers with sufficient hysteresis to handle slow input transition rates with jitter-free triggering at the outputs. Once triggered, the basic pulse duration can be extended by retriggering the gated low-level-active (A) or high-level-active (B) input. Pulse duration can be reduced by taking CLR low. CLR input can be used to override A or B inputs. The input/output timing diagram illustrates pulse control by retriggering the inputs and early clearing. The variance in output pulse duration from device to device typically is less than 0.5% for given external timing components. An example of this distribution for the 'AHC123A is shown in Figure 10. Variations in output pulse duration versus supply voltage and temperature are shown in Figure 6. During power up, Q outputs are in the low state, and Q outputs are in the high state. The outputs are glitch free, without applying a reset pulse. For additional application information on multivibrators, see the application report Designing With the SN74AHC123A and SN74AHCT123A, literature number SCLA014. FUNCTION TABLE (each multivibrator) INPUTS OUTPUTS CLR A B Q Q L X X X H X L L H H X X L L H H L H # H L H These outputs are based on the assumption that the indicated steady-state conditions at the A and B inputs have been set up long enough to complete any pulse started before the setup. 2 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 SCLS352H - JULY 1997 - REVISED OCTOBER 2005 logic diagram, each multivibrator (positive logic) Rext/Cext A Cext B Q CLR R Q input/output timing diagram trr A B CLR Rext/Cext Q Q tw tw POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 tw + trr 3 SCLS352H - JULY 1997 - REVISED OCTOBER 2005 absolute maximum ratings over operating free-air temperature (unless otherwise noted) Supply voltage range, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 V to 7 V Input voltage range, VI (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 V to 7 V Output voltage range in high or low state, VO (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . -0.5 V to VCC + 0.5 V Output voltage range in power-off state, VO (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 V to 7 V Input clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -20 mA Output clamp current, IOK (VO < 0 or VO > VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 mA Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 mA Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA Package thermal impedance, JA (see Note 3): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73C/W DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82C/W DGV package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120C/W N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67C/W PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108C/W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -65C to 150C Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. Voltage values are with respect to the network ground terminal. 2. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 3. The package thermal impedance is calculated in accordance with JESD 51-7. recommended operating conditions (see Note 4) SN54AHC123A VCC Supply voltage VIH High-level input voltage VCC = 2 V VCC = 3 V VCC = 5.5 V VCC = 2 V SN74AHC123A MIN MAX MIN MAX 2 5.5 2 5.5 1.5 V 1.5 2.1 2.1 3.85 3.85 VCC = 3 V VCC = 5.5 V UNIT V 0.5 0.5 0.9 0.9 VIL Low-level input voltage VI VO Input voltage 0 5.5 0 5.5 V Output voltage 0 VCC -50 0 VCC -50 V IOH High-level output current 1.65 VCC = 2 V VCC = 3.3 V 0.3 V VCC = 5 V 0.5 V VCC = 2 V IOL Rext t/VCC TA Low-level output current External timing resistance VCC = 3.3 V 0.3 V VCC = 5 V 0.5 V VCC = 2 V VCC > 3 V Power-up ramp rate 1.65 -4 -4 -8 -8 50 50 4 4 8 8 5k 5k 1k 1k 1 Operating free-air temperature -55 -40 mA mA mA mA 1 125 V ms/V 85 C NOTE 4: Unused Rext/Cext terminals should be left unconnected. All remaining unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. 4 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 SCLS352H - JULY 1997 - REVISED OCTOBER 2005 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS IOH = -4 mA IOH = -8 mA II ICC ICC SN74AHC123A 2V 1.9 2 1.9 1.9 3V 2.9 3 2.9 2.9 4.5 V 4.4 4.5 4.4 4.4 3V 2.58 2.48 2.48 4.5 V 3.94 IOL = 50 mA VOL SN54AHC123A MIN IOH = -50 mA VOH TA = 25C TYP MAX VCC MIN MAX 3.8 MIN MAX V 3.8 2V 0.1 0.1 0.1 3V 0.1 0.1 0.1 4.5 V 0.1 0.1 0.1 IOL = 4 mA IOL = 8 mA 3V 0.36 0.5 0.44 4.5 V 0.36 0.5 0.44 Rext/Cext VI = VCC or GND 5.5 V 0.25 2.5 2.5 A, B, and CLR VI = VCC or GND 0 V to 5.5 V 0.1 1* 1 Quiescent VI = VCC or GND, Active state (per circuit) IO = 0 VI = VCC or GND, Rext/Cext = 0.5 VCC 5.5 V UNIT 4 40 40 3V 160 250 280 280 4.5 V 280 500 650 650 5.5 V 360 750 975 975 Ci VI = VCC or GND 5V 1.9 10 * On products compliant to MIL-PRF-38535, this parameter is not production tested at VCC = 0 V. This test is performed with the terminal in the off-state condition. 10 V mA A mA mA pF timing requirements over recommended operating free-air temperature range, VCC = 3.3 V 0.3 V (unless otherwise noted) (see Figure 1) TEST CONDITIONS TA = 25C MIN TYP MAX SN54AHC123A MIN MAX SN74AHC123A MIN CLR 5 5 5 A or B trigger Rext = 1 k, Cext = 100 pF 5 76 5 5 Rext = 1 k, Cext = 0.01 mF 1.8 tw Pulse duration trr Pulse retrigger time MAX UNIT ns ns ms See retriggering data in the application information section. timing requirements over recommended operating free-air temperature range, VCC = 5 V 0.5 V (unless otherwise noted) (see Figure 1) TEST CONDITIONS MIN TA = 25C TYP MAX SN54AHC123A MIN MAX SN74AHC123A MIN CLR 5 5 5 A or B trigger 5 59 5 5 1.5 tw Pulse duration trr Pulse retrigger time Rext = 1 k, Cext = 100 pF Rext = 1 k, Cext = 0.01 mF See retriggering data in the application information section. POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 MAX UNIT ns ns ms 5 SCLS352H - JULY 1997 - REVISED OCTOBER 2005 switching characteristics over recommended operating free-air temperature range, VCC = 3.3 V 0.3 V (unless otherwise noted) (see Figure 1) PARAMETER FROM (INPUT) TO (OUTPUT) TEST CONDITIONS tPLH tPHL A or B Q or Q CL = 15 pF tPLH tPHL CLR Q or Q CL = 15 pF tPLH tPHL CLR trigger Q or Q CL = 15 pF tPLH tPHL A or B Q or Q CL = 50 pF tPLH tPHL CLR Q or Q CL = 50 pF tPLH tPHL CLR trigger Q or Q CL = 50 pF Q or Q CL = 50 pF, Cext = 28 pF, Rext = 2 k CL = 50 pF, Cext = 0.01 F, Rext = 10 k CL = 50 pF, Cext = 0.1 F, Rext = 10 k tw tw MIN TA = 25C TYP MAX MAX MIN MAX 9.5* 20.6* 1* 24* 1 24 20.6* 1* 24* 1 24 7.5* 15.8* 1* 18.5* 1 18.5 9.3* 15.8* 1* 18.5* 1 18.5 10* 22.4* 1* 26* 1 26 10.6* 22.4* 1* 26* 1 26 10.5 24.1 1 27.5 1 27.5 11.8 24.1 1 27.5 1 27.5 8.9 19.3 1 22 1 22 10.5 19.3 1 22 1 22 11 25.9 1 29.5 1 29.5 12.3 25.9 1 29.5 1 29.5 182 240 90 100 110 90 110 0.9 1 1.1 0.9 1.1 1 POST OFFICE BOX 655303 SN74AHC123A MIN 10.2* * On products compliant to MIL-PRF-38535, this parameter is not production tested. tw = Pulse duration at Q and Q outputs tw = Output pulse-duration variation (Q and Q) between circuits in same package 6 SN54AHC123A * DALLAS, TEXAS 75265 300 UNIT ns ns ns ns ns ns 300 ns 90 110 ms 0.9 1.1 ms % SCLS352H - JULY 1997 - REVISED OCTOBER 2005 switching characteristics over recommended operating free-air temperature range, VCC = 5 V 0.5 V (unless otherwise noted) (see Figure 1) PARAMETER FROM (NPUT) TO (OUTPUT) TEST CONDITIONS tPLH tPHL A or B Q or Q CL = 15 pF tPLH tPHL CLR Q or Q CL = 15 pF tPLH tPHL CLR trigger Q or Q CL = 15 pF tPLH tPHL A or B Q or Q CL = 50 pF tPLH tPHL CLR Q or Q CL = 50 pF tPLH tPHL CLR trigger Q or Q CL = 50 pF Q or Q CL = 50 pF, Cext = 28 pF, Rext = 2 k CL = 50 pF, Cext = 0.01 F, Rext = 10 k CL = 50 pF, Cext = 0.1 F, Rext = 10 k tw tw MIN TA = 25C TYP MAX SN54AHC123A SN74AHC123A MIN MAX MIN MAX 6.5* 12* 1* 14* 1 14 7.1* 12* 1* 14* 1 14 5.3* 9.4* 1* 11* 1 11 6.5* 9.4* 1* 11* 1 11 6.9* 12.9* 1* 15* 1 15 7.4* 12.9* 1* 15* 1 15 7.3 14 1 16 1 16 8.3 14 1 16 1 16 6.3 11.4 1 13 1 13 7.4 11.4 1 13 1 13 7.6 14.9 1 17 1 17 8.7 14.9 1 17 1 17 167 200 90 100 110 90 110 0.9 1 1.1 0.9 1.1 240 UNIT ns ns ns ns ns ns 240 ns 90 110 ms 0.9 1.1 ms 1 % * On products compliant to MIL-PRF-38535, this parameter is not production tested. tw = Pulse duration at Q and Q outputs tw = Output pulse-duration variation (Q and Q) between circuits in same package operating characteristics, VCC = 5 V, TA = 25C PARAMETER Cpd TEST CONDITIONS Power dissipation capacitance No load POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 TYP 29 UNIT pF 7 SCLS352H - JULY 1997 - REVISED OCTOBER 2005 PARAMETER MEASUREMENT INFORMATION From Output Under Test Test Point tw CL (see Note A) VCC Inputs or Outputs 50% VCC 50% VCC 0V LOAD CIRCUIT VOLTAGE WAVEFORMS PULSE DURATION VCC Input A (see Note B) 50% VCC 0V VCC Input B (see Note B) 50% VCC 50% VCC 0V 50% VCC VOH In-Phase Output 50% VCC In-Phase Output VOL VOH VOL 50% VCC Out-of-Phase Output 50% VCC VOLTAGE WAVEFORMS DELAY TIMES VOLTAGE WAVEFORMS DELAY TIMES NOTES: A. CL includes probe and jig capacitance. B. All input pulses are supplied by generators having the following characteristics: ZO = 50 , tr + 3 ns, tf + 3 ns. C. The outputs are measured one at a time, with one input transition per measurement. Figure 1. Load Circuit and Voltage Waveforms 8 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 VOH 50% VCC VOL tPLH tPHL tPHL 50% VCC tPHL tPLH 0V tPLH Out-of-Phase Output VCC Input CLR (see Note B) VOH 50% VCC VOL SCLS352H - JULY 1997 - REVISED OCTOBER 2005 APPLICATION INFORMATION caution in use To prevent malfunctions due to noise, connect a high-frequency capacitor between VCC and GND, and keep the wiring between the external components and Cext and Rext/Cext terminals as short as possible. power-down considerations Large values of Cext can cause problems when powering down the 'AHC123A devices because of the amount of energy stored in the capacitor. When a system containing this device is powered down, the capacitor can discharge from VCC through the protection diodes at pin 2 or pin 14. Current through the input protection diodes must be limited to 30 mA; therefore, the turn-off time of the VCC power supply must not be faster than t = VCC x Cext/30 mA. For example, if VCC = 5 V and Cext = 15 pF, the VCC supply must turn off no faster than t = (5 V) x (15 pF)/30 mA = 2.5 ns. Usually, this is not a problem because power supplies are heavily filtered and cannot discharge at this rate. When a more rapid decrease of VCC to zero occurs, the 'AHC123A devices can sustain damage. To avoid this possibility, use external clamping diodes. output pulse duration The output pulse duration, tw, is determined primarily by the values of the external capacitance (CT) and timing resistance (RT). The timing components are connected as shown in Figure 2. VCC RT CT To Rext/Cext Terminal To Cext Terminal Figure 2. Timing-Component Connections The pulse duration is given by: tw + K RT CT (1) if CT is 1000 pF, K = 1.0 or if CT is <1000 pF, K can be determined from Figure 9 where: tw RT CT K = pulse duration in ns = external timing resistance in k = external capacitance in pF = multiplier factor Equation 1 and Figure 3 can be used to determine values for pulse duration, external resistance, and external capacitance. POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 9 SCLS352H - JULY 1997 - REVISED OCTOBER 2005 APPLICATION INFORMATION retriggering data The minimum input retriggering time (tMIR) is the minimum time required after the initial signal before retriggering the input. After tMIR, the device retriggers the output. Experimentally, it also can be shown that to retrigger the output pulse, the two adjacent input signals should be tMIR apart, where tMIR = 0.30 x tw. The retrigger pulse duration is calculated as shown in Figure 3. tMIR Input tRT = tw + tPLH = (K x RT x CT) + tPLH tRT tw tPLH Output Where: tMIR = Minimum Input Retriggering Time tPLH = Propagation Delay tRT = Retrigger Time tw = Output Pulse Duration Before Retriggering Figure 3. Retrigger Pulse Duration The minimum value from the end of the input pulse to the beginning of the retriggered output should be approximately 15 ns to ensure a retriggered output (see Figure 4). Input tMRT Output tMRT = Minimum Time Between the End of the Second Input Pulse and the Beginning of the Retriggered Output tMRT = 15 ns Figure 4. Input/Output Requirements 10 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 SCLS352H - JULY 1997 - REVISED OCTOBER 2005 APPLICATION INFORMATION 1.00E+09 VCC = 5 V TA = 25C 1.00E+08 RT = 200k t w - Output Pulse Duration - ns 1.00E+07 RT = 150k 1.00E+06 RT = 80k 1.00E+05 RT = 10k 1.00E+04 RT = 5k 1.00E+03 1.00E+02 RT = 1k 1.00E+01 1.00E+00 1 102 10 103 104 105 106 107 CT - External Timing Capacitance - pF Figure 5. Output Pulse Duration vs External Timing Capacitance 14% Variation in Output Pulse Duration 12% 10% 8% tw = 866 ns at: VCC = 5 V RT = 10 k CT = 50 pF TA = 25C VCC = 2.5 V VCC = 3 V VCC = 3.5 V VCC = 4 V VCC = 5 V 6% VCC = 6 V VCC = 7 V 4% 2% 0% -2% -4% -6% -60 -40 -20 0 20 40 60 80 100 120 140 160 180 Temperature - C Figure 6. Variations in Output Pulse Duration vs Temperature Operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 11 SCLS352H - JULY 1997 - REVISED OCTOBER 2005 APPLICATION INFORMATION OUTPUT PULSE-DURATION CONSTANT vs SUPPLY VOLTAGE MINIMUM TRIGGER TIME vs VCC CHARACTERISTICS 10.00 1.20 Output Pulse-Duration Constant - K t rr - Minimum Retrigger Time - s RT = 1 k TA = 25C CT = 0.01 F 1.00 CT = 1000 pF 0.10 CT = 100 pF 0.01 0 1 2 3 4 5 1.15 RT = 10 k TA = 25C tW = K x C T x R T 1.10 CT = 1000 pF 1.05 CT = 0.01 F 1.00 0.95 0.90 1.5 6 CT = 0.1 F 2 2.5 3 3.5 4 4.5 5 VCC - Supply Voltage - V VCC - Supply Voltage - V DISTRIBUTION OF UNITS vs OUTPUT PULSE DURATION CT - External Capacitor Value - F For Capacitor Values of 0.001 F or Greater, K = 1.0 (K is Independent of R) 0.0001 TA = 25C VCC = 5 V 0.00001 2.50 3.00 3.50 4.00 4.50 Multiplier Factor - K Relative Frequency of Occurance EXTERNAL CAPACITANCE vs MULTIPLIER FACTOR 1.00 1.50 2.00 6 Figure 8 Figure 7 0.001 5.5 VCC = 5 V TA = 25C CT = 50 pF RT = 10 kW Mean = 856 ns Median = 856 ns Std. Dev. = 3.5 ns -3 Std. Dev. +3 Std. Dev. Median 99% of Data Units tw - Output Pulse Duration Figure 9 Figure 10 Operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. 12 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 PACKAGE OPTION ADDENDUM www.ti.com 5-Sep-2011 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/ Ball Finish MSL Peak Temp Samples (Requires Login) 5962-9860801Q2A ACTIVE LCCC FK 20 1 TBD Call TI Call TI 5962-9860801QEA ACTIVE CDIP J 16 1 TBD Call TI Call TI 5962-9860801QFA ACTIVE CFP W 16 1 TBD Call TI Call TI SN74AHC123AD ACTIVE SOIC D 16 40 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74AHC123ADBR ACTIVE SSOP DB 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74AHC123ADBRE4 ACTIVE SSOP DB 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74AHC123ADBRG4 ACTIVE SSOP DB 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74AHC123ADE4 ACTIVE SOIC D 16 40 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74AHC123ADG4 ACTIVE SOIC D 16 40 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74AHC123ADGVR ACTIVE TVSOP DGV 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74AHC123ADGVRE4 ACTIVE TVSOP DGV 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74AHC123ADGVRG4 ACTIVE TVSOP DGV 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74AHC123ADR ACTIVE SOIC D 16 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74AHC123ADRE4 ACTIVE SOIC D 16 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74AHC123ADRG4 ACTIVE SOIC D 16 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74AHC123AN ACTIVE PDIP N 16 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type SN74AHC123ANE4 ACTIVE PDIP N 16 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type SN74AHC123APWR ACTIVE TSSOP PW 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74AHC123APWRE4 ACTIVE TSSOP PW 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Addendum-Page 1 (3) PACKAGE OPTION ADDENDUM www.ti.com Orderable Device 5-Sep-2011 Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/ Ball Finish MSL Peak Temp (3) Samples (Requires Login) SN74AHC123APWRG4 ACTIVE TSSOP PW 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SNJ54AHC123AFK ACTIVE LCCC FK 20 1 TBD SNJ54AHC123AJ ACTIVE CDIP J 16 1 TBD A42 N / A for Pkg Type SNJ54AHC123AW ACTIVE CFP W 16 1 TBD A42 N / A for Pkg Type POST-PLATE N / A for Pkg Type (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. OTHER QUALIFIED VERSIONS OF SN54AHC123A, SN74AHC123A : * Catalog: SN74AHC123A * Enhanced Product: SN74AHC123A-EP Addendum-Page 2 PACKAGE OPTION ADDENDUM www.ti.com 5-Sep-2011 * Military: SN54AHC123A NOTE: Qualified Version Definitions: * Catalog - TI's standard catalog product * Enhanced Product - Supports Defense, Aerospace and Medical Applications * Military - QML certified for Military and Defense Applications Addendum-Page 3 PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 6.6 2.5 12.0 16.0 Q1 SN74AHC123ADBR SSOP DB 16 2000 330.0 16.4 8.2 SN74AHC123ADGVR TVSOP DGV 16 2000 330.0 12.4 6.8 4.0 1.6 8.0 12.0 Q1 SN74AHC123ADR SOIC D 16 2500 330.0 16.4 6.5 10.3 2.1 8.0 16.0 Q1 SN74AHC123APWR TSSOP PW 16 2000 330.0 12.4 7.0 5.6 1.6 8.0 12.0 Q1 SN74AHC123APWR TSSOP PW 16 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1 SN74AHC123APWRG4 TSSOP PW 16 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) SN74AHC123ADBR SSOP DB 16 2000 367.0 367.0 38.0 SN74AHC123ADGVR TVSOP DGV 16 2000 367.0 367.0 35.0 SN74AHC123ADR SOIC D 16 2500 333.2 345.9 28.6 SN74AHC123APWR TSSOP PW 16 2000 364.0 364.0 27.0 SN74AHC123APWR TSSOP PW 16 2000 367.0 367.0 35.0 SN74AHC123APWRG4 TSSOP PW 16 2000 367.0 367.0 35.0 Pack Materials-Page 2 MECHANICAL DATA MPDS006C - FEBRUARY 1996 - REVISED AUGUST 2000 DGV (R-PDSO-G**) PLASTIC SMALL-OUTLINE 24 PINS SHOWN 0,40 0,23 0,13 24 13 0,07 M 0,16 NOM 4,50 4,30 6,60 6,20 Gage Plane 0,25 0-8 1 0,75 0,50 12 A Seating Plane 0,15 0,05 1,20 MAX PINS ** 0,08 14 16 20 24 38 48 56 A MAX 3,70 3,70 5,10 5,10 7,90 9,80 11,40 A MIN 3,50 3,50 4,90 4,90 7,70 9,60 11,20 DIM 4073251/E 08/00 NOTES: A. B. C. D. All linear dimensions are in millimeters. This drawing is subject to change without notice. Body dimensions do not include mold flash or protrusion, not to exceed 0,15 per side. Falls within JEDEC: 24/48 Pins - MO-153 14/16/20/56 Pins - MO-194 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 MECHANICAL DATA MSSO002E - JANUARY 1995 - REVISED DECEMBER 2001 DB (R-PDSO-G**) PLASTIC SMALL-OUTLINE 28 PINS SHOWN 0,38 0,22 0,65 28 0,15 M 15 0,25 0,09 8,20 7,40 5,60 5,00 Gage Plane 1 14 0,25 A 0-8 0,95 0,55 Seating Plane 2,00 MAX 0,10 0,05 MIN PINS ** 14 16 20 24 28 30 38 A MAX 6,50 6,50 7,50 8,50 10,50 10,50 12,90 A MIN 5,90 5,90 6,90 7,90 9,90 9,90 12,30 DIM 4040065 /E 12/01 NOTES: A. B. C. D. All linear dimensions are in millimeters. This drawing is subject to change without notice. Body dimensions do not include mold flash or protrusion not to exceed 0,15. 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