5962-8761203VCA - Texas Instruments

FEATURES

GND

VCC

J OR W PACKAGE

(TOP VIEW)

DESCRIPTION

1A 3

1B 1Y

3A 9

3B 3Y

2A 6

2B 2Y

411

4A 12

4B 4Y

SN54AC02-SP

www.ti.com

.......................................................................................................................................... SCHS368A – OCTOBER 2008 – REVISED DECEMBER 2008

RAD-TOLERANT CLASS V, QUADRUPLE 2-INPUT POSITIVE-NOR GATES

•AC Types Feature 1.5-V to 5.5-V Operation•Rad-Tolerant: 50 KRad(Si) TID

(1)

– TID Dose Rate < 2 mRad/sec•QML-V Qualified, SMD 5962-87612

(1) Radiation tolerance is a typical value based upon initial devicequalification. Radiation Lot Acceptance Testing is available -contact factory for details.

The ' AC02 devices contain four independent 2-input NOR gates that perform the Boolean function Y = A • B orY = A + B in positive logic.

ORDERING INFORMATION

(1)

PACKAGE

(2)

ORDERABLE TOP-SIDEPART NUMBER MARKING

J - package 5962-8761203VCA 5962-8761203VCA– 55 ° C to 125 ° C tubeW - package 5962-8761203VDA 5962-8761203VDA

(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TIWeb site at www.ti.com .(2) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available atwww.ti.com/sc/package .

FUNCTION TABLE(EACH GATE)

INPUTS

OUTPUT

YA B

H X LX H LL L H

LOGIC DIAGRAM (POSITIVE LOGIC)

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of TexasInstruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date.

Copyright © 2008, Texas Instruments IncorporatedProducts conform to specifications per the terms of the TexasInstruments standard warranty. Production processing does notnecessarily include testing of all parameters.

ABSOLUTE MAXIMUM RATINGS

(1)

RECOMMENDED OPERATING CONDITIONS

(1)

SN54AC02-SP

SCHS368A – OCTOBER 2008 – REVISED DECEMBER 2008 ..........................................................................................................................................

www.ti.com

over operating free-air temperature range (unless otherwise noted)

MIN MAX UNIT

Supply voltage range – 0.5 6 VI

Input clamp current

(2)

< 0 or V

> V

± 20 mAI

Output clamp current

(2)

< 0 ± 50 mAI

Continuous output current V

= 0 to V

± 50 mAContinuous current through V

or GND ± 100 mAT

stg

Storage temperature range – 65 150 ＝C

(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratingsonly, and functional operation of the device at these or any other conditions beyond those indicated under recommended operatingconditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.(2) The input and output voltage ratings may be exceeded provided the input and output current ratings are observed.

= 25 ° C – 55 ° C TO125 ° C

UNITMIN MAX MIN MAX

Supply voltage 1.5 5.5 1.5 5.5 VV

= 1.5 V 1.2 1.2V

High-level input voltage V

= 3 V 2.1 2.1 VV

= 5.5 V 3.85 3.85V

= 1.5 V 0.3 0.3V

Low-level input voltage V

= 3 V 0.9 0.9 VV

= 5.5 V 1.65 1.65V

Input voltage 0 V

0 V

Output voltage 0 V

0 V

High-level output current V

= 4.5 V to 5.5 V – 24 – 24 mAI

Low-level output current V

= 4.5 V to 5.5 V 24 24 mAV

= 1.5 V to 3 V 50 50Δt/ Δv Input transition rise or fall rate ns/VV

= 3.6 V to 5.5 V 20 20

(1) All unused inputs of the device must be held at V

or GND to ensure proper device operation. Refer to the TI application report,Implications of Slow or Floating CMOS Inputs, literature number SCBA004.

Product Folder Link(s): SN54AC02-SP

ELECTRICAL CHARACTERISTICS

SN54AC02-SP

www.ti.com

.......................................................................................................................................... SCHS368A – OCTOBER 2008 – REVISED DECEMBER 2008

over operating free-air temperature range (unless otherwise noted)

= 25 ° C – 55 ° C TO125 ° CPARAMETER TEST CONDITIONS V

UNITMIN MAX MIN MAX

1.5 V 1.4 1.4I

= – 50 µA 3 V 2.9 2.94.5 V 4.4 4.4V

= V

or V

= – 4mA 3 V 2.58 2.4I

= – 24 mA 4.5 V 3.94 3.7I

= – 50 mA

(1)

5.5 V 3.851.5 V 0.1 0.1I

= 50 µA 3 V 0.1 0.14.5 V 0.1 0.1V

= V

or V

= 12 mA 3 V 0.36 0.5I

= 24 mA 4.5 V 0.36 0.525I

= 50 mA

(1)

5.5 V 1.65I

= V

or GND 5.5 V ± 0.1 ± 1 µAI

= V

or GND, I

= 0 5.5 V 4 80 µAC

10 10 pF

(1) Test one output at a time, not exceeding 1-second duration. Measurement is made by forcing indicated current and measuring voltageto minimize power dissipation. Test verifies a minimum 50- Ωtransmission-line drive capability at 85 ° C and 75- Ωtransmission-line drivecapability at 125 ° C.

Product Folder Link(s): SN54AC02-SP

SWITCHING CHARACTERISTICS

OPERATING CHARACTERISTICS

SN54AC02-SP

SCHS368A – OCTOBER 2008 – REVISED DECEMBER 2008 ..........................................................................................................................................

www.ti.com

over recommended operating free-air temperature range, V

= 1.5 V, C

= 50 pF (unless otherwise noted) (see Figure 1 )

– 55 ° C TOFROM TO

125 ° CPARAMETER UNIT(INPUT) (OUTPUT)

MIN MAX

PLH

144A or B Y nst

PHL

144

over recommended operating free-air temperature range, V

= 3.3 V ± 0.3 V, C

= 50 pF (unless otherwise noted) (seeFigure 1 )

– 55 ° C TOFROM TO

125 ° CPARAMETER UNIT(INPUT) (OUTPUT)

MIN MAX

PLH

4 16.1A or B Y nst

PHL

4 16.1

over recommended operating free-air temperature range, V

= 5 V ± 0.5 V, C

= 50 pF (unless otherwise noted) (seeFigure 1 )

– 55 ° C TOFROM TO

125 ° CPARAMETER UNIT(INPUT) (OUTPUT)

MIN MAX

PLH

2.9 11.5A or B Y nst

PHL

2.9 11.5

= 5 V, T

= 25 ° C

PARAMETER TYP UNIT

Power dissipation capacitance 55 pF

Product Folder Link(s): SN54AC02-SP

PARAMETER MEASUREMENT INFORMATION

VOLTAGE WAVEFORMS

SETUP AND HOLD AND INPUT RISE AND FALL TIMES

tsu

50% VCC

50% 10%10% 90% 90%

VCC

0 V

trtf

Reference

Input

Data

Input

VOLTAGE WAVEFORMS

PROPAGATION DELAY AND OUTPUT TRANSITION TIMES

50% VCC

50% 10%10%

90% 90%

VCC

VOH

VOL

0 V

trtf

Input

In-Phase

Output

50% VCC

tPLH tPHL

50% VCC 50%

10% 10% 90%90% VOH

VOL

tPHL tPLH

Out-of-Phase

Output

NOTES: A. CL includes probe and test-fixture capacitance.

B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.

Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.

C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr = 3 ns, tf = 3 ns.

Phase relationships between waveforms are arbitrary.

D. For clock inputs, fmax is measured with the input duty cycle at 50%.

E. The outputs are measured one at a time with one input transition per measurement.

F. tPLH and tPHL are the same as tpd.

G. tPZL and tPZH are the same as ten.

H. tPLZ and tPHZ are the same as tdis.

From Output

Under Test

CL = 50 pF

(see Note A)

LOAD CIRCUIT

S1 2 × VCC

R1 = 500 Ω†Open

GND

0 V

VOLTAGE WAVEFORMS

PULSE DURATION

Input 50% VCC

50% VCC

VCC

tPLH/tPHL

tPLZ/tPZL

tPHZ/tPZH

Open

2 × VCC

GND

TEST S1

Output

Control

Output

Waveform 1

S1 at 2 × VCC

(see Note B)

Output

Waveform 2

S1 at GND

(see Note B)

VOL

VOH

tPZL

tPZH

tPLZ

tPHZ

≈VCC

0 V

50% VCC 20% VCC

50% VCC ≈0 V

VOLTAGE WAVEFORMS

OUTPUT ENABLE AND DISABLE TIMES

50% VCC 50% VCC

80% VCC

VCC

R2 = 500 Ω†

†When VCC = 1.5 V, R1 = R2 = 1 kΩ

VOLTAGE WAVEFORMS

RECOVERY TIME

50% VCC

VCC

0 V

CLR

Input

CLK 50% VCC

VCC

trec

0 V

SN54AC02-SP

www.ti.com

.......................................................................................................................................... SCHS368A – OCTOBER 2008 – REVISED DECEMBER 2008

Figure 1. Load Circuit and Voltage Waveforms

Product Folder Link(s): SN54AC02-SP

PACKAGING INFORMATION

Orderable Device Status (1) Package

Type Package

Drawing Pins Package

Qty Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)

5962-8761203VCA ACTIVE CDIP J 14 1 TBD A42 N / A for Pkg Type

5962-8761203VDA ACTIVE CFP W 14 1 TBD A42 N / A for Pkg Type

(1) The marketing status values are defined as follows:

ACTIVE: Product device recommended for new designs.

LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.

NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in

a new design.

PREVIEW: Device has been announced but is not in production. Samples may or may not be available.

OBSOLETE: TI has discontinued the production of the device.

(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check

http://www.ti.com/productcontent for the latest availability information and additional product content details.

TBD: The Pb-Free/Green conversion plan has not been defined.

Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements

for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered

at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.

Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and

package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS

compatible) as defined above.

Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame

retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)

(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder

temperature.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is

provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the

accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take

reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on

incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited

information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI

to Customer on an annual basis.

PACKAGE OPTION ADDENDUM

www.ti.com 15-Oct-2009

Addendum-Page 1

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