Document No. 008-0256-0 Page 2 - 3 Rev. G
Model CB3 & CB3LV
7.0mm x 5.0mm Low Cost
HCMOS/TTL Clock Oscillator
ELECTRICAL CHARACTERISTICS
PARAMETER SYMBOL MIN TYP MAX UNIT
Maximum Supply Voltage VCC -0.5 - +7.0 V
Storage Temperature TSTG -40 - +100 °C
Frequency Range
CB3 1.5 - 107
CB3LV 1.5 - 200
Frequency Stability Δf/fO- - 20,25,50 or 100 ± ppm
Aging Δf-35± ppm
O
eratin
Tem
erature
Commercial -20 +70
Industrial -40 +85
Su
l
Volta
e
CB3 4.5 5.0 5.5
CB3LV 3.0 3.3 3.6
Supply Current
1.5MHz to 20MHz CL=50pF -10 25
20.001MHz to 80MHz CL=50pF -30 50
80.001MHz to 107MHz CL=15pF -40 80
1.5MHz to 20MHz CL=15pF -7 12
20.001MHz to 80MHz CL=15pF -20 40
80.001MHz to 200MHz CL=15pF -30 60
Output Load CL
-
-
-
-
-
-
50
30
15
pF
Output Voltage Levels
Logic '1' Level VOH
90%VCC
VCC-0.6V --
Logic '0' Level VOL --
10%VCC
0.4
Output Current
Logic '1' Level IOH - - -16/-8
Logic '0' Level IOL -- +16/+8
Output Duty Cycle SYM 45 - 55 %
Rise and Fall Time
1.5MHz to 20MHz CL=50pF -8 10
20.001MHz to 80MHz CL=50pF -5 8
80.001MHz to 200MHz CL=15pF -2.5 5
1.5MHz to 20MHz CL=15pF -6 8
20.001MHz to 80MHz CL=15pF -3 5
80.001MHz to 200MHz CL=15pF -1.5 3
Start Up Time TS-- 10 ms
Enable Function
Enable Input Voltage VIH 2.0 - -
Disable Input Voltage VIL -- 0.8
Enable Time TPLZ -- 200 ns
Standby Current IST -- 10 µA
Period Jitter, Pk-Pk - - - 50
Period Jitter, RMS - - - 5
Phase Jitter, RMS - - - 1
Notes:
1.
ELECTRICAL PARAMETERS
mA
V
ps
VCC V
fOMHz
TA°C
25
Inclusive of initial tolerance at time of shipment, changes in supply voltage, load, temperature and 1st year aging.
CB3LV
ICC mA
CB3
-
-
V
CONDITIONS
-
-
-
-
-
See Note 1 and Ordering Information
First year
±10%
Frequency Ran
e
Tested load condition noted for t
ical values.
1.5MHz to 50MHz
50.001MHz to 80MHz
80.001MHz to 200MHz
@ 50% Level
@ 10% - 90% Levels
Tested load condition noted for t
ical values.
CMOS Load
10 TTL LOAD
CMOS
TTL Load
VOH = 3.9V/2.2V VCC = 4.5V/3.0V
VOL = 0.4V VCC = 4.5V/3.0V
ns
Pin 1 Logic '0', Output Disabled
Bandwidth 12kHz - 20MHz
CB3
CB3LV
TR, TF
Application of VCC
Pin 1 Logic '1', Output Enabled
Pin 1 Logic '0', Output Disabled
Pin 1 Logic '1'