Document No. 008-0256-0 Page 1- 3 Rev. G
www.ctscorp.com
Model CB3 & CB3LV
HCMOS/TTL Clock Oscillator
FEATURES
Standard 7.0mm x 5.0mm 4-Pad Surface Mount Package
HCMOS/TTL Compatible Output
Fundamental and 3rd Overtone Crystal Designs
Frequency Range 1 – 200 MHz
Frequency Stability ±50 ppm Standard, ±25 ppm and ±20 ppm Available
Operating Voltages +5.0Vdc or +3.3Vdc
Operating Temperature to -40°C to +85°C
Output Enable Standard
Tape & Reel Packaging
RoHS/Green Compliant (6/6)
APPLICATIONS
Applications for Model CB3 and CB3LV include digital video, networking equipment, wireless communications,
broadband access, Ethernet/Gigabit Ethernet, microprocessors/DSP/FPGA, storage area networks, fiber channel,
computers and peripherals, test and measurement, SONET/SDH/DWDM, base stations and Pico cells.
ORDERING INFORMATION
4] CTS Distributors may add a -T or -1 at the end of the part number to indicate Tape and Reel packaging.
Not all perform an ce com binat ion s and f re qu e n cie s m ay be available.
Contact y ou r local C T S Representat iv e or CTS Custome r Se rv ice for availability.
6 = ± 20 ppm 1
5 = ± 25 ppm
3 = ± 50 ppm [std]
7 = ± 32 ppm 2
2 = ± 100 ppm 2
C = -20°C to +70°C [standard]
I = -40°C to +85°C 1
1] 6I Stability/Temperature combination is not available.
3] Frequency is recorded with only leading significant digits before the ‘M’ and 4 - 6 significant digits after the ‘M’ (including zeros).
[Ex. 3.579545 MHz, code as 3M579545; 14.31818 MHz, code as 14M31818; 125 MHz, code as 125M0000]
LV = +3.3Vdc
Blank = +5.0Vdc M - indicates MHz and decimal point. 3
FREQUEN C Y STA BILITY OPERATING TEM PER A TURE RANG E
SUPPLY VOLTAGE FREQUENCY IN MHz
M-
2] These stabilities are not recommended for new designs.
-CB3
PACKAGING INFORM ATION [reference]
Device quantity is 1,000 pieces maximum per reel.
Document No. 008-0256-0 Page 2 - 3 Rev. G
Model CB3 & CB3LV
7.0mm x 5.0mm Low Cost
HCMOS/TTL Clock Oscillator
ELECTRICAL CHARACTERISTICS
PARAMETER SYMBOL MIN TYP MAX UNIT
Maximum Supply Voltage VCC -0.5 - +7.0 V
Storage Temperature TSTG -40 - +100 °C
Frequency Range
CB3 1.5 - 107
CB3LV 1.5 - 200
Frequency Stability Δf/fO- - 20,25,50 or 100 ± ppm
Aging Δf-35± ppm
O
p
eratin
g
Tem
p
erature
Commercial -20 +70
Industrial -40 +85
Su
pp
l
y
Volta
g
e
CB3 4.5 5.0 5.5
CB3LV 3.0 3.3 3.6
Supply Current
1.5MHz to 20MHz CL=50pF -10 25
20.001MHz to 80MHz CL=50pF -30 50
80.001MHz to 107MHz CL=15pF -40 80
1.5MHz to 20MHz CL=15pF -7 12
20.001MHz to 80MHz CL=15pF -20 40
80.001MHz to 200MHz CL=15pF -30 60
Output Load CL
-
-
-
-
-
-
50
30
15
pF
Output Voltage Levels
Logic '1' Level VOH
90%VCC
VCC-0.6V --
Logic '0' Level VOL --
10%VCC
0.4
Output Current
Logic '1' Level IOH - - -16/-8
Logic '0' Level IOL -- +16/+8
Output Duty Cycle SYM 45 - 55 %
Rise and Fall Time
1.5MHz to 20MHz CL=50pF -8 10
20.001MHz to 80MHz CL=50pF -5 8
80.001MHz to 200MHz CL=15pF -2.5 5
1.5MHz to 20MHz CL=15pF -6 8
20.001MHz to 80MHz CL=15pF -3 5
80.001MHz to 200MHz CL=15pF -1.5 3
Start Up Time TS-- 10 ms
Enable Function
Enable Input Voltage VIH 2.0 - -
Disable Input Voltage VIL -- 0.8
Enable Time TPLZ -- 200 ns
Standby Current IST -- 10 µA
Period Jitter, Pk-Pk - - - 50
Period Jitter, RMS - - - 5
Phase Jitter, RMS - - - 1
Notes:
1.
ELECTRICAL PARAMETERS
mA
V
ps
VCC V
fOMHz
TA°C
25
Inclusive of initial tolerance at time of shipment, changes in supply voltage, load, temperature and 1st year aging.
CB3LV
ICC mA
CB3
-
-
V
CONDITIONS
-
-
-
-
-
See Note 1 and Ordering Information
First year
±10%
Frequency Ran
g
e
Tested load condition noted for t
yp
ical values.
1.5MHz to 50MHz
50.001MHz to 80MHz
80.001MHz to 200MHz
@ 50% Level
@ 10% - 90% Levels
Tested load condition noted for t
yp
ical values.
CMOS Load
10 TTL LOAD
CMOS
TTL Load
VOH = 3.9V/2.2V VCC = 4.5V/3.0V
VOL = 0.4V VCC = 4.5V/3.0V
ns
Pin 1 Logic '0', Output Disabled
Bandwidth 12kHz - 20MHz
CB3
CB3LV
TR, TF
Application of VCC
Pin 1 Logic '1', Output Enabled
Pin 1 Logic '0', Output Disabled
Pin 1 Logic '1'
Document No. 008-0256-0 Page 3 - 3 Rev. G
Model CB3 & CB3LV
7.0mm x 5.0mm Low Cost
HCMOS/TTL Clock Oscillator
ELECTRICAL CHARACTERISTICS
MECHANICAL SPECIFICATIONS
PACKAGE DRAWING
NOTES
1. Termination pads [e4]. Barrier-plating is nickel
[Ni] with gold [Au] flash plate.
2. Reflow conditions per JEDEC J-STD-020, 260°C
maximum.
3. Moisture Sensitivity Level 1 per JEDEC J-STD-020.
SUGGESTED SOLDER PAD GEOMETRY
CBYPASS should be 0.01 uF.
D.U.T. PIN ASSIGNMENTS
PIN SYMBOL DESCRIPTION
1 EOH Enable
2 GND Circuit & Package Ground
3 Output RF Output
4 VCC Supply Voltage
TEST CIRCUIT, CMOS LOAD
LVCMOS OUTPUT WAVEFORM
ENABLE TRUTH TABLE
PIN 1 PIN 3
Logic ‘1’ Output
Open Output
Logic ‘0’ High Imp.
CTS**CB3
XXXMXXXXXX
YYWWSTV
MARKING INFORMATION
1. ** – Manufacturing Site Code.
[Note a dash may follow the site code and is acceptable.]
2. XXXMXXXXXX – Frequency is marked with only
leading significant digits before the ‘M’ and
4 – 6 digits after the ‘M’ (including zeros).
Ex. XMXXXXXX [3M579545]
XXMXXXXX [14M31818]
XXXMXXXX [125M0000]
3. YYWW – Date code, YY – year, WW – week.
4. ST – Frequency stability/temperature code.
[Refer to Ordering Information.]
5. V – Voltage code. 3 = 3.3V, 5 = 5.0V.