MTP12P10 - ON Semiconductor - Datasheet.Directory

June, 2006 − Rev. 4 1Publication Order Number:

MTP12P10/D

MTP12P10

Preferred Device

Power MOSFET

12 Amps, 100 Volts

P−Channel TO−220

This Power MOSFET is designed for medium voltage, high speed

power switching applications such as switching regulators, converters,

solenoid and relay drivers.

Features

•Silicon Gate for Fast Switching Speeds − Switching Times Specified

at 100°C

•Designer’s Data − IDSS, VDS(on), VGS(th) and SOA Specified

at Elevated Temperature

•Rugged − SOA is Power Dissipation Limited

•Source−to−Drain Diode Characterized for Use With Inductive Loads

•Pb−Free Package is Available*

MAXIMUM RATINGS (TC = 25°C unless otherwise noted)

Rating Symbol Value Unit

Drain−Source Voltage VDSS 100 Vdc

Drain−Gate Voltage (RGS = 1.0 MW)VDGR 100 Vdc

Gate−Source Voltage

− Continuous

− Non−repetitive (tp ≤ 50 ms) VGS

VGSM

±20

±40 Vdc

Vpk

Drain Current − Continuous

Drain Current − Pulsed ID

IDM 12

28 Adc

Total Power Dissipation

Derate above 25°CPD75

0.6 W

W/°C

Operating and Storage Temperature Range TJ, Tstg −65 to 150 °C

Thermal Resistance

− Junction−to−Case

− Junction−to−Ambient°RqJC

RqJA 1.67

62.5

°C/W

Maximum Lead Temperature for Soldering

Purposes, 1/8″ from case for 10 seconds TL260 °C

Stresses exceeding Maximum Ratings may damage the device. Maximum

Ratings are stress ratings only. Functional operation above the Recommended

Operating Conditions is not implied. Extended exposure to stresses above the

Recommended Operating Conditions may affect device reliability.

*For additional information on our Pb−Free strategy and soldering details, please

download the ON Semiconductor Soldering and Mounting Techniques

Reference Manual, SOLDERRM/D.

12 AMPERES, 100 VOLTS

RDS(on) = 300 mW

Device Package Shipping

ORDERING INFORMATION

MTP12P10 TO−220AB 50 Units/Rail

TO−220AB

CASE 221A

STYLE 5

123

P−Channel

MARKING DIAGRAM

AND PIN ASSIGNMEN

MTP12P10 = Device Code

A = Location Code

Y = Year

WW = Work Week

G = Pb−Free Package

MTP12P10G

AYWW

Gate 3

Source

Drain

Preferred devices are recommended choices for future use

and best overall value.

MTP12P10G TO−220AB

(Pb−Free) 50 Units/Rail

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MTP12P10

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ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted)

Characteristic Symbol Min Max Unit

OFF CHARACTERISTICS

Drain−Source Breakdown Voltage (VGS = 0, ID = 0.25 mA) V(BR)DSS 100 − Vdc

Zero Gate Voltage Drain Current

(VDS = Rated VDSS, VGS = 0)

(VDS = Rated VDSS, VGS = 0, TJ = 125°C)

IDSS −

−10

100

mAdc

Gate−Body Leakage Current, Forward (VGSF = 20 Vdc, VDS = 0) IGSSF − 100 nAdc

Gate−Body Leakage Current, Reverse (VGSR = 20 Vdc, VDS = 0) IGSSR − 100 nAdc

ON CHARACTERISTICS (Note 1)

Gate Threshold Voltage (VDS = VGS, ID = 1.0 mA)

TJ = 100°CVGS(th) 2.0

1.5 4.5

4.0 Vdc

Static Drain−Source On−Resistance (VGS = 10 Vdc, ID = 6.0 Adc) RDS(on) − 0.3 W

Drain−Source On−Voltage (VGS = 10 V)

(ID = 12 Adc)

(ID = 6.0 Adc, TJ = 100°C)

VDS(on) −

−4.2

3.8

Vdc

Forward Transconductance (VDS = 15 V, ID = 6.0 A) gFS 2.0 − mhos

DYNAMIC CHARACTERISTICS

Input Capacitance (VDS = 25 V, VGS = 0, f = 1.0 MHz)

See Figure 10

Ciss − 920 pF

Output Capacitance Coss − 575

Reverse Transfer Capacitance Crss − 200

SWITCHING CHARACTERISTICS (Note 1) (TJ = 100°C)

T urn−On Delay Time

(VDD = 25 V, ID = 0.5 Rated ID, RG = 50 W)

See Figures 12 and 13

td(on) − 50 ns

Rise Time tr− 150

Turn−Off Delay Time td(off) − 150

Fall Time tf− 150

Total Gate Charge (VDS = 0.8 Rated VDSS, ID = Rated ID, VGS = 10 V

)

See Figure 11

Qg33 (Typ) 50 nC

Gate−Source Charge Qgs 16 (Typ) −

Gate−Drain Charge Qgd 17 (Typ) −

SOURCE−DRAIN DIODE CHARACTERISTICS (Note 1)

Forward On−Voltage

(IS = Rated ID, VGS = 0)

VSD 4.0 (Typ) 5.5 Vdc

Forward T urn−On Time ton Limited by stray inductance

Reverse Recovery Time trr 300

(Typ) − ns

INTERNAL PACKAGE INDUCTANCE (TO−204)

Internal Drain Inductance, (Measured from the contact screw on the header closer to the

source pin and the center of the die) Ld5.0 (Typ) −nH

Internal Source Inductance

(Measured from the source pin, 0.25″ from the package

to the source bond pad)

Ls12.5

(Typ) −

INTERNAL PACKAGE INDUCTANCE (TO−220)

Internal Drain Inductance

(Measured from the contact screw on tab to center of die)

(Measured from the drain lead 0.25″ from package to center of die)

Ld3.5 (Typ)

4.5 (Typ) −

−

Internal Source Inductance

(Measured from the source lead 0.25″ from package to source bond pad) Ls7.5 (Typ) −

1. Pulse Test: Pulse Width ≤300 ms, Duty Cycle ≤ 2%.

MTP12P10

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TYPICAL ELECTRICAL CHARACTERISTICS

−VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)

Figure 1. On−Region Characteristics

TJ, JUNCTION TEMPERATURE (°C)

Figure 2. Gate−Threshold Voltage Variation

With Temperature

VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)

Figure 3. Transfer Characteristics

TJ, JUNCTION TEMPERATURE (°C)

Figure 4. Normalized Breakdown Voltage

versus Temperature

ID, DRAIN CURRENT (AMPS)

Figure 5. On−Resistance versus Drain Current

TJ, JUNCTION TEMPERATURE (°C)

Figure 6. On−Resistance Variation

With Temperature

−ID, DRAIN CURRENT (AMPS)RDS(on), DRAIN−TO−SOURCE RESISTANCE (OHMS)

RDS(on), DRAIN−TO−SOURCE RESISTANCE

(NORMALIZED)

ID, DRAIN CURRENT (AMPS)

VGS(th), GATE THRESHOLD VOLTAGE (NORMALIZED)

VBR(DSS), DRAIN−TO−SOURCE BREAKDOWN VOLTAGE

(NORMALIZED)

0109876543210

1.2

1.1

0.9

0.8

−50 −25 0 25 50 75 100 125 150

0201612840

1.6

1.2

0.8

0.4

−50 −75 0 25 50 75 100 125 150

0.5

0.4

0.3

0.2

0.1

04036322824201612840

1.8

1.6

1.4

1.2

0.8

0.6

0.4

0.2

−50 −25 0 25 50 75 100 125 150

TJ = 25°C

VGS = −20 V

8 V

10 V

7 V

6 V

5 V

VDS = VGS

ID = 1 mA

VDS = 20 V

TJ = −55°C

25°C

100°C

VGS = 0

ID = 0.25 mA

TJ = 100°C

25°C

−55°C

VGS = 15 V

VGS = 10 V

ID = 6 A

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SAFE OPERATING AREA INFORMATION

ID, DRAIN CURRENT (AMPS)

VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)

Figure 7. Maximum Rated Forward Biased

Safe Operating Area

VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)

Figure 8. Maximum Rated Switching

Safe Operating Area

02040 6080

100

RDS(on) LIMIT

PACKAGE LIMIT

THERMAL LIMIT

VGS = 20 V

SINGLE PULSE

TC = 25°C

10 ms

1 ms

10 ms 30

100

0.1 ms

MTM/MTP12P06

MTM/MTP12P10

10 30 50 70 90

MTM/MTP12P06

MTM/MTP12P10

FORWARD BIASED SAFE OPERATING AREA

The FBSOA curves define the maximum drain−to−source

voltage and drain current that a device can safely handle

when it is forward biased, or when it is on, or being turned

on. Because these curves include the limitations of

simultaneous high voltage and high current, up to the rating

of the device, they are especially useful to designers of linear

systems. The curves are based on a case temperature of 25°C

and a maximum junction temperature of 150°C. Limitations

for repetitive pulses at various case temperatures can be

determined by using the thermal response curves. ON

Semiconductor Application Note, AN569, “Transient

Thermal Resistance−General Data and Its Use” provides

detailed instructions.

SWITCHING SAFE OPERATING AREA

The switching safe operating area (SOA) of Figure 8 is the

boundary that the load line may traverse without incurring

damage to the MOSFET. The fundamental limits are the

peak current, IDM and the breakdown voltage, V(BR)DSS.

The switching SOA shown in Figure 8 is applicable for both

turn−on and turn−off of the devices for switching times less

than one microsecond.

The power averaged over a complete switching cycle

must be less than:

TJ(max) − TC

RqJC

Figure 9. Thermal Response

r(t), NORMALIZED EFFECTIVE

TRANSIENT THERMAL RESISTANCE

RqJC(t) = r(t) RqJC

RqJC = 1.67°C/W MAX

D CURVES APPLY FOR POWER

PULSE TRAIN SHOWN

READ TIME AT t1

TJ(pk) − TC = P(pk) RqJC(t)

P(pk)

DUTY CYCLE, D = t1/t2

t, TIME (ms)

0.01

D = 0.5

0.05

0.01

SINGLE PULSE

0.01

0.02

0.03

0.02

0.05

0.1

0.2

0.3

0.5

0.02 0.05 0.1 0.2 0.5 1 2 5 10 20 50 100 200 500 1000

0.1

0.2

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VDS, SOURCE−TO−DRAIN VOLTAGE (VOLTS)

C, CAPACITANCE (pF)

Figure 10. Capacitance Variation

1600

4030

1200

800

400

020

100

TC = 25°C

VGS = 0

f = 1 MHz

Coss

Ciss

Crss

0 5 10 15 20 25 30 35 40 45 50

Qg, TOTAL GATE CHARGE (nC)

Figure 11. Gate Charge versus

Gate−To−Source Voltage

TJ = 25°C

ID = 12 A

VDS = 30 V

80 V

50 V

VGS, GATE SOURCE VOLTAGE (VOLTS)

−2

−4

−6

−8

−10

−12

−14

−16

RESISTIVE SWITCHING

PULSE GENERATOR

VDD

Vout

Vin

Rgen

50 W

z = 50 W

50 W

DUT

Figure 12. Switching Test Circuit

toff

OUTPUT, Vout

ton

trtd(off) tf

td(on)

90%90%

10%

INPUT, Vin 10%

50%

90%

50%

PULSE WIDTH

Figure 13. Switching Waveforms

INVERTED

MTP12P10

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PACKAGE DIMENSIONS

TO−220

CASE 221A−09

ISSUE AB

NOTES:

1. DIMENSIONING AND TOLERANCING PER ANSI

Y14.5M, 1982.

2. CONTROLLING DIMENSION: INCH.

3. DIMENSION Z DEFINES A ZONE WHERE ALL

BODY AND LEAD IRREGULARITIES ARE

ALLOWED.

STYLE 5:

PIN 1. GATE

2. DRAIN

3. SOURCE

4. DRAIN

DIM MIN MAX MIN MAX

MILLIMETERSINCHES

A0.570 0.620 14.48 15.75

B0.380 0.405 9.66 10.28

C0.160 0.190 4.07 4.82

D0.025 0.035 0.64 0.88

F0.142 0.147 3.61 3.73

G0.095 0.105 2.42 2.66

H0.110 0.155 2.80 3.93

J0.018 0.025 0.46 0.64

K0.500 0.562 12.70 14.27

L0.045 0.060 1.15 1.52

N0.190 0.210 4.83 5.33

Q0.100 0.120 2.54 3.04

R0.080 0.110 2.04 2.79

S0.020 0.055 0.508 1.39

T0.235 0.255 5.97 6.47

U0.000 0.050 0.00 1.27

V0.045 −−− 1.15 −−−

Z−−− 0.080 −−− 2.04

123

SEATING

PLANE

−T−

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