FN8370 Rev 2.00 Page 1 of 14
August 19, 2016
FN8370
Rev 2.00
August 19, 2016
ISL29034
Integrated Digital Light Sensor
DATASHEET
The ISL29034 is an integrated ambient and infrared
light-to-digital converter with I2C (SMBus compatible) interface. Its
advanced self-calibrated photodiode array emulates human eye
response with excellent IR rejection. The on-chip ADC is capable
of rejecting 50Hz and 60Hz flicker caused by artificial light
sources. The Lux range select feature allows users to program the
Lux range for optimized counts/Lux.
For ambient light sensing, an internal 16-bit ADC has been
designed based upon the charge-balancing technique. The
ADC conversion time is nominally 105ms and is user
selectable from 11µs to 105ms, depending on oscillator
frequency and ADC resolution. In normal operation, typical
current consumption is 57µA. In order to further minimize
power consumption, two power-down modes have been
provided. If polling is chosen over continuous measurement of
light, the auto power-down function shuts down the whole chip
after each ADC conversion for the measurement. The other
power-down mode is controlled by software via the I2C
interface. The power consumption can be reduced to less than
0.3µA when powered down.
The ISL29034 supports a software brownout condition
detection. The device powers up with the brownout bit asserted
until the host clears it through the I2C interface. Designed to
operate on supplies from 2.25V to 3.63V with an I2C supply from
1.7V to 3.63V, the ISL29034 is specified for operation across the
-40°C to +85°C ambient temperature range.
Features
• Resolution. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16-bit ADC
• Wide dynamic range1: . . . . . . . . . . . . . . . . . . . . . . . . . . 4,200,000
• Integrated noise reduction . . . . . . . . . . . . . . . . . . . . . 50/60Hz
• Close to human eye response with excellent IR/UV rejection
• Shutdown modes. . . . . . . . . . . . . . . . . . . .software and automatic
• Supply current (typical) . . . . . . . . . . . . . . . . . . . . . . . . . . . 57µA
• Shutdown current (maximum) . . . . . . . . . . . . . . . . . . . 0.51µA
•I
2C (SMB compatible) power supply . . . . . . . . . 1.7V to 3.63V
• Sensor power supply . . . . . . . . . . . . . . . . . . . . . 2.25V to 3.63V
• Operating temperature range. . . . . . . . . . . . . -40°C to +85°C
• Small form factor package . . . . . . . 4 Ld 1.5x1.3x0.75 ODFN
Applications
• Mobile devices: smart phone, PDA, GPS
• Computing devices: notebook PC, MacBook, tablets
• Consumer devices: LCD-TV, digital picture frame, digital camera
• Industrial and medical light sensing
Related Literature
•AN1591, “Evaluation Hardware/Software Manual for ALS
and Proximity Sensor”
TABLE 1. KEY DIFFERENCES BETWEEN FAMILY OF PARTS
PART NUMBER ALS SENSING INTERRUPT PIN
NUMBER OF
PINS
ISL29034 Yes No 4 Ld
ISL29035 Yes Yes 6 Ld
FIGURE 1. ISL29034 TYPICAL APPLICATION DIAGRAM
FIGURE 2. NORMALIZED SPECTRAL RESPONSE FOR AMBIENT
LIGHT SENSING
ISL29034
MCU
1µF
SCL
SDA
1
2
3
VDD
SCL
SDA
VDD
4
GND
VDD_PULLUP
4.7k
4.7k
100
0
0.2
0.4
0.6
0.8
1.0
1.2
300 400 500 600 700 800 900 1000 1100
WAVELENGTH (nm)
HUMAN EYE
AMBIENT LIGHT SENSOR
ISL29034
FN8370 Rev 2.00 Page 2 of 14
August 19, 2016
Pin Configuration
ISL29034
(4 LD ODFN)
TOP VIEW
Block Diagram
FIGURE 3. BLOCK DIAGRAM
SCL
SDA
4
3
R
500k
INTEGRATING
ADC
CMD
Register
DATA
REGISTER
IREF
fOSC
COMMAND
REGISTER
LIGHT
DATA
PROCESS
2
GND
1
V
DD
I2C/SMB
PHOTODIODE
ARRAY
ISL29034
1
2
4
3
VDD
GND
SDA
SCL
Pin Descriptions
PIN
NUMBER PIN NAME DESCRIPTION
1 VDD Positive supply
2GNDGround pin
3SCLI
2C serial clock.
4SDAI
2C serial data.
Ordering Information
PART NUMBER
(Notes 1, 2, 3)
TEMP RANGE
(°C)
TAPE AND REEL
(UNITS)
PACKAGE
(RoHS COMPLIANT)
PKG.
DWG. #
ISL29034IROZ-T7 -40 to +85 3k 4 Ld ODFN L4.1.5x1.3
ISL29034IROZ-EVALZ Evaluation Board
NOTES:
1. Please refer to TB347 for details on reel specifications.
2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets; molding compounds/die attach materials and NiPdAu plate
- e4 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL
classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
3. For Moisture Sensitivity Level (MSL), please see device information page for ISL29034. For more information on MSL please see tech brief TB477.
ISL29034
FN8370 Rev 2.00 Page 3 of 14
August 19, 2016
Absolute Maximum Ratings Thermal Information
VDD to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +4.0V
I2C Bus (SCL, SDA) Pin Voltage . . . . . . . . . . . . . . . . . . . . . . . . . -0.2V to 4.0V
I2C Bus (SCL, SDA) Pin Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . <10mA
Input Voltage Slew Rate (Maximum) . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.1V/µs
ESD Ratings
Human Body Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3kV
Thermal Resistance (Typical) JA (°C/W)
4 Ld ODFN Package (Note 4) . . . . . . . . . . . . . . . . . . . . . 287
Maximum Junction Temperature (TJMAX). . . . . . . . . . . . . . . . . . . . . . . +90°C
Storage Temperature Range. . . . . . . . . . . . . . . . . . . . . . . .-40°C to +100°C
Operating Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40°C to +85°C
Pb-Free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see TB477
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product
reliability and result in failures not covered by warranty.
NOTE:
4. JA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
Electrical Specifications VDD = 3.0V, TA = +25°C, 16-bit ADC operation, unless otherwise specified.
PARAMETER SYMBOL TEST CONDITIONS
MIN
(Note 7)TYP
MAX
(Note 7)UNIT
Power Supply Range VDD 2.25 3.63 V
Supply Current IDD 57 85 µA
Supply Current when Powered Down IDD1 Software disabled or auto power-down 0.24 0.51 µA
Supply Voltage Range for I2C Interface VI2C 1.70 3.63 V
ADC Integration/Conversion Time tint 16-bit ADC data 105 ms
I2C Clock Rate Range FI2C 400 kHz
Count Output When Dark DATA_0 E = 0 Lux, Range 0 (1k Lux) 1 5 Counts
Full-Scale ADC Code DATA_F 65535 Counts
Part-to-Part Variation (3 population) %/Value E = 300 Lux, cold white LED
Range 0 (1k Lux)
±5 %
Light Count Output with LSB of 0.015 Lux/Count ADCR0 E = 300 Lux, fluorescent light (Note 5),
ALS Range 0 (1k Lux)
15000 20473 25000 Counts
Light Count Output with LSB of 0.06 Lux/Count ADCR1 E = 300 Lux, fluorescent light (Note 5),
ALS Range 1 (4k Lux)
5100 Counts
Light Count Output with LSB of 0.24 Lux/Count ADCR2 E = 300 Lux, fluorescent light (Note 5),
ALS Range 2 (16k Lux)
1400 Counts
Light Count Output with LSB of 0.96 Lux/Count ADCR3 E = 300 Lux, fluorescent light (Note 5),
ALS Range 3 (64k Lux)
366 Counts
Infrared Count Output (Note 6)ADC_IR
R0 Range 0 (1k Lux) 1402 1997 2598 Counts
Infrared Count Output (Note 6)ADC_IR
R1 Range 1 (4k Lux) 481 Counts
Infrared Count Output (Note 6)ADC_IR
R2 Range 2 (16k Lux) 148 Counts
Infrared Count Output (Note 6)ADC_IR
R3 Range 3 (64k Lux) 42 Counts
SDA Current Sinking Capability ISDA 45 mA
NOTES:
5. 550nm green LED is used in production test. The 550nm LED irradiance is calibrated to produce the same DATA count against an illuminance level
of 300 Lux fluorescent light.
6. 850 nm IR LED is used in production test.
7. Compliance to datasheet limits is assured by one or more methods: production test, characterization and/or design.
ISL29034
FN8370 Rev 2.00 Page 4 of 14
August 19, 2016
F
I2C Interface Specifications V
DD = 3.0V, TA = +25°C, 16-bit ADC operation, unless otherwise specified.
PARAMETER SYMBOL TEST CONDITIONS
MIN
(Note 7)TYP
MAX
(Note 7)UNIT
SDA and SCL Input Buffer LOW Voltage VIL 0.55 V
SDA and SCL Input Buffer HIGH Voltage VIH 1.25 V
SDA and SCL Input Buffer Hysteresis VHys
(Note 8)
0.05 x VDD V
SDA Output Buffer LOW Voltage
(open-drain), Sinking 4mA
VOL
(Note 8)
0 0.06 0.40 V
SDA and SCL Pin Capacitance CPIN
(Note 8)
TA = +25°C, f = 1MHz, VDD = 5V,
VIN =0V, V
OUT = 0V
10 pF
SCL Frequency fSCL 400 kHz
Pulse Width Suppression Time at SDA and
SCL Inputs
tIN Any pulse narrower than the maximum
specification is suppressed
50 ns
SCL Falling Edge to SDA Output Data Valid tAA 900 ns
Time the Bus Must be Free Before the Start
of a New Transmission
tBUF 1300 ns
Clock LOW Time tLOW 1300 ns
Clock HIGH Time tHIGH 600 ns
START Condition Set-Up Time tSU:STA 600 ns
START Condition Hold Time tHD:STA 600 ns
Input Data Set-Up Time tSU:DAT 100 ns
Input Data Hold Time tHD:DAT 30 ns
STOP Condition Set-Up Time tSU:STO 600 ns
STOP Condition Hold Time tHD:STO 600 ns
Output Data Hold Time tDH 0ns
SDA and SCL Rise Time tR
(Note 8)
20 + 0.1 x Cb ns
SDA and SCL Fall Time tF
(Note 8)
20 + 0.1 x Cb ns
Capacitive Loading of SDA or SCL Cb
(Note 10)
Total on-chip and off-chip 400 pF
SDA and SCL Bus Pull-Up Resistor Off-chip RPU
(Note 8)
Maximum is determined by tR and tF
For Cb = 400pF, maximum is about
2kΩ ~2.5kΩ
For Cb = 40pF, maximum is about
15kΩ ~ 20kΩ
1kΩ
NOTES:
8. Limits should be considered typical and are not production tested.
9. These are I2C specific parameters and are not tested, however, they are used to set conditions for testing devices to validate specification.
10. Cb is the capacitance of the bus in pF.
ISL29034
FN8370 Rev 2.00 Page 5 of 14
August 19, 2016
SDA vs SCL Timing
FIGURE 4. I2C BUS TIMING
tSU:STO
tDH
tHIGH
tSU:STA
tHD:STA
tHD:DAT
tSU:DAT
SCL
SDA
(INPUT TIMING)
SDA
(OUTPUT TIMING)
tF
tLOW
tBUF
tAA
tRtHD:STO
FIGURE 5. I2C WRITE CYCLE TIMING
SCL
SDA 8TH BIT OF LAST BYTE
STOP
CONDITION
START
CONDITION
tWC
ACK
ISL29034
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Principles of Operation
Photodiodes and ADC
The ISL29034 contains two photodiode arrays, which convert light
into current. A typical spectral response for ambient light sensing is
shown in Figure 6 on page 6. After light is converted to current
during the light signal process, the current output is converted to
digital by a built-in 16-bit Analog-to-Digital Converter (ADC). An I2C
command reads the ambient light intensity in counts.
The converter is a charge-balancing integrating type 16-bit ADC. The
chosen method for conversion is best for converting small current
signals in the presence of an AC periodic noise. A 105ms integration
time, for instance, highly rejects 50Hz and 60Hz power line noise
simultaneously.
The integration time of the built-in ADC is determined by the internal
oscillator, and the n-bit (n = 4, 8, 12, 16) counter inside the ADC. A
good balancing act of integration time and resolution (depending on
the application) is required for optimal results.
The ADC has I2C programmable range select to dynamically
accommodate various lighting conditions. For very dim
conditions, the ADC can be configured at its lowest range
(Range 0) in the ambient light sensing.
Low-Power Operation
The ISL29034 initial operation is at the power-down mode after a
supply voltage is provided. The data registers contain the default
value at 0. When the ISL29034 receives an I2C command to do a
one-time measurement from an I2C master, it will start the ADC
conversion with light sensing. It will go to the power-down mode
automatically after one conversion is finished and keep the
conversion data available for the master to fetch anytime
afterwards. The ISL29034 will continuously do ADC conversion
with light sensing if it receives an I2C command of continuous
measurement. It will continuously update the data registers with
the latest conversion data. It will go to the power-down mode
after it receives the I2C command of power-down.
Typical Performance Curves
FIGURE 6. NORMALIZED SPECTRAL RESPONSE FOR AMBIENT
LIGHT SENSING
FIGURE 7. NORMALIZED RADIATION PATTERN
FIGURE 8. TEMPERATURE TEST IN DARK CONDITION FIGURE 9. ALS TRANSFER FUNCTION
0
0.2
0.4
0.6
0.8
1.0
1.2
300 400 500 600 700 800 900 1000 1100
WAVELENGTH (nm)
HUMAN EYE
AMBIENT LIGHT SENSOR
0
0.2
0.4
0.6
0.8
1.0
1.2
-60 -50 -40 -30 -20 -10 0 10 20 30 40 50 60
NORMALIZED SENSITIVITY
ANGLE (°)
0
2
4
6
8
10
12
14
-60-50-40-30-20-10 0 102030405060708090100
ALS READING (COUNTS)
TEMPERATURE (°C)
1000 LUX RANGE
0
200
400
600
800
1000
0 200 400 600 800 1000
ALS MEASURED LUX (LUX)
AMBIENT LIGHT (LUX)
1000 LUX RANGE
ISL29034
FN8370 Rev 2.00 Page 7 of 14
August 19, 2016
Ambient Light and IR Sensing
There are four operational modes in ISL29034: Programmable
ALS once with auto power-down, programmable IR sensing once
with auto power-down, programmable continuous ALS sensing
and programmable continuous IR sensing. These four modes can
be programmed in series to fulfill the application needs. The
detailed program configuration is listed in “Command-I Register
(Address: 0x00)” on page 9.
When the part is programmed for ambient light sensing, the
ambient light with wavelength within the “Ambient Light
Sensing” spectral response curve in Figure 15 is converted into
current. With ADC, the current is converted to an unsigned n-bit
(up to 16 bits) digital output.
When the part is programmed for infrared (IR) sensing, the IR
light with wavelength within the “IR Sensing” spectral response
curve in Figure 15 is converted into current. With ADC, the
current is converted to an unsigned n-bit (up to 16 bits) digital
output.
Serial Interface
The ISL29034 supports the Inter-Integrated Circuit (I2C) bus data
transmission protocol. The I2C bus is a two-wire serial bidirectional
interface consisting of SCL (Clock) and SDA (Data). Both the wires
are connected to the device supply via pull-up resistors. The I2C
protocol defines any device that sends data onto the bus as a
transmitter and the receiving device as the receiver. The device
controlling the transfer is a master and the device being controlled is
the slave. The transmitting device pulls down the SDA line to
transmit a “0” and releases it to transmit a “1”. The master always
initiates the data transfer, only when the bus is not busy, and
provides the clock for both transmit and receive operations. The
ISL29034 operates as a slave device in all applications. The serial
communication over the I2C interface is conducted by sending the
Most Significant Bit (MSB) of each byte of data first.
Start Condition
During data transfer, the SDA line must remain stable while the SCL
line is HIGH. All I2C interface operations must begin with a START
condition, which is a HIGH to LOW transition of SDA while SCL is
HIGH (refer to Figure 12 on page 8). The ISL29034 continuously
monitors the SDA and SCL lines for the START condition and does
not respond to any command until this condition is met (refer to
Figure 12). A START condition is ignored during the power-up
sequence.
Stop Condition
All I2C interface operations must be terminated by a STOP
condition, which is a LOW to HIGH transition of SDA while SCL is
HIGH (refer to Figure 12). A STOP condition at the end of a
read/write operation places the device in its standby mode. If a
stop is issued in the middle of a Data byte, or before 1 full Data
byte + ACK is sent, then the serial communication of the
ISL29034 resets itself without performing the read/write. The
contents of the array are not affected.
Acknowledge
An Acknowledge (ACK) is a software convention used to indicate
a successful data transfer. The transmitting device releases the
SDA bus after transmitting 8 bits. During the ninth clock cycle,
the receiver pulls the SDA line LOW to acknowledge the reception
of the eight bits of data (refer to Figure 12). The ISL29034
responds with an ACK after recognition of a START condition
followed by a valid Identification Byte, and once again, after
successful receipt of an Address Byte. The ISL29034 also
responds with an ACK after receiving a Data byte of a write
operation. The master must respond with an ACK after receiving
a Data byte of a read operation.
Device Addressing
Following a START condition, the master must output a Device
Address byte. The 7 MSBs of the Device Address byte are known as
the device identifier. The device identifier bits of the ISL29034 are
internally hard-wired as “1000100”. The LSB of the Device Address
byte is defined as a Read or Write (R/W) bit. When this R/W bit is a
“1”, a read operation is selected and when “0”, a write operation is
selected (refer to Figure 10). The master generates a START
condition followed by Device Address byte 1000100x (x as R/W)
and the ISL29034 compares it with the internal device identifier.
Upon a correct comparison, the device outputs an acknowledge
(LOW) on the SDA line (refer to Figure 12).
Write Operation
BYTE WRITE
In a byte write operation, the ISL29034 requires the Device
Address byte, Register Address byte, and the Data byte. The
master starts the communication with a START condition. Upon
receipt of the Device Address byte, Register Address byte and the
Data byte, the ISL29034 responds with an Acknowledge (ACK).
Following the ISL29034 data acknowledge response, the master
terminates the transfer by generating a STOP condition.
The ISL29034 then begins an internal write cycle of the data to
the volatile memory. During the internal write cycle, the device
inputs are disabled and the SDA line is in a high impedance state,
so the device will not respond to any requests from the master
(refer to Figure 11).
BURST WRITE
The ISL29034 has a burst write operation, which allows the
master to write multiple consecutive bytes from a specific
address location. It is initiated in the same manner as the byte
write operation, but instead of terminating the write cycle after
the first Data byte is transferred, the master can write to the
whole register array. After the receipt of each byte, the ISL29034
responds with an acknowledge, and the address is internally
incremented by one. The address pointer remains at the last
address byte written. When the counter reaches the end of the
register address list, it “rolls over” and goes back to the first
Register Address.
DEVICE ADDRESS
BYTE
REGISTER
ADDRESS BYTE
DATA BYTE
1 0 0 0 1 0 0 R/W
A7 A6 A5 A4 A3 A2 A1 A0
D7 D6 D5 D4 D3 D2 D1 D0
FIGURE 10. DEVICE ADDRESS, REGISTER ADDRESS AND DATA BYTE
ISL29034
FN8370 Rev 2.00 Page 8 of 14
August 19, 2016
Read Operation
The ISL29034 has two basic read operations: Byte read and
Burst read.
BYTE READ
Byte read operations allow the master to access any register
location in the ISL29034. The Byte read operation is a two step
process. The master issues the START condition, and the Device
Address byte with the R/W bit set to “0”, receives an
acknowledge, then issues the Register Address byte. After
acknowledging receipt of the Register Address byte, the master
immediately issues another START condition and the Device
Address byte with the R/W bit set to “1”. This is followed by an
acknowledge from the device and then by the 8-bit data word.
The master terminates the read operation by not responding with
an acknowledge and then issuing a stop condition
(refer to Figure 13).
BURST READ
Burst read operation is identical to the Byte read operation. After
the first Data byte is transmitted, the master now responds with
an acknowledge, indicating it requires additional data. The
device continues to output data for each acknowledge received.
The master terminates the read operation by not responding with
an acknowledge but issuing a STOP condition (refer to Figure 14).
For more information about the I2C standard, please consult the
Phillips™ I2C specification documents.
Power-On Reset
The Power-On Reset (POR) circuitry protects the internal logic
against powering up in the incorrect state. The ISL29034 will
power-up into Standby mode after VDD exceeds the POR trigger
level and will power-down into Reset mode when VDD drops
below the POR trigger level. This bidirectional POR feature
protects the device against ‘brown-out’ failure following a
temporary loss of power.
The POR is an important feature because it prevents the
ISL29034 from starting to operate with insufficient voltage, prior
to stabilization of the internal bandgap. The ISL29034 prevents
communication to its registers and greatly reduces the likelihood
of data corruption on power-up.
FIGURE 11. BYTE WRITE SEQUENCE
10001000
A
C
K
A
C
K
A
C
K
S
T
O
P
S
T
A
R
T
DEVICE ADDRESS
BYTE ADDRESS BYTE DATA BYTE
SIGNAL FROM
MASTER DEVICE
SIGNAL AT SDA
SIGNALS FROM
SLAVE DEVICE
FIGURE 12. START, DATA STABLE, ACKNOWLEDGE AND STOP CONDITION
ISL29034
FN8370 Rev 2.00 Page 9 of 14
August 19, 2016
Register Description
Following are detailed descriptions of the control registers related to
the operation of the ISL29034 ambient light sensor device. These
registers are accessed by the I2C serial interface. For details on the
I2C interface, refer to “Serial Interface” on page 7.
All the features of the device are controlled by the registers. The ADC
data can also be read. The following sections explain the details of
each register bit. All RESERVED bits are Intersil used bits ONLY. The
value of the reserved bit can change without notice.
Decimal to Hexadecimal Conversion
To convert decimal value to hexadecimal value, divide the decimal
number by 16, and write the remainder on the side as the least
significant digit. This process is continued by dividing the quotient by
16 and writing the remainder until the quotient is 0. When
performing the division, the remainders, which will represent the
hexadecimal equivalent of the decimal number, are written
beginning with the least significant digit (right) and each new digit is
written to the next most significant digit (the left) of the previous
digit. Consider the number 175 decimal.
Command-I Register (Address: 0x00)
The Command-I register consists three operation mode bits. The
default register value is 0x00 at power-on.
Command-I Register (Address: 0x0 Operation Mode Bits[7:5])
The ISL29034 has different operating modes. These modes are
selected by setting B7 to B5 bits on register address 0x00. The
device powers up on a disable mode. Table 5 on page 10 lists the
possible operating modes.
10001000
A
C
K
A
C
K
S
T
A
R
T
DEVICE ADDRESS
WRITE ADDRESS BYTE
SIGNAL FROM
MASTER DEVICE
SIGNAL AT SDA
SIGNALS FROM
SLAVE DEVICE
A
C
K
S
T
O
P
DEVICE ADDRESS
READ DATA BYTE
S
T
A
R
T
10001001
FIGURE 13. BYTE ADDRESS READ SEQUENCE
10001000
A
C
K
A
C
K
S
T
A
R
T
DEVICE
ADDRESS
WRITE ADDRESS BYTE
SIGNAL FROM
MASTER DEVICE
SIGNAL AT SDA
SIGNALS FROM
SLAVE DEVICE
A
C
K
S
T
O
P
DEVICE
ADDRESS READ DATA BYTE 1
S
T
A
R
T
10001001
A
C
K
DATA BYTE 2
A
C
K
DATA BYTE n
(n IS ANY INTEGER
GREATER THAN 1)
FIGURE 14. BURST READ SEQUENCE
TABLE 2. REGISTER MAP
NAME
REGISTER
ADDRESS REGISTER BITS
DEFAULT ACCESSDEC HEX B7 B6 B5 B4 B3 B2 B1 B0
COMMAND-I 0 0x00 OP2 OP1 OP0 RESERVED 0x00 RW
COMMAND-II 1 0x01 RESERVED RES1 RES0 RANGE1 RANGE0 0x00 RW
DATALSB 20x02 D7 D6 D5 D4 D3 D2 D1 D0 0x00 RO
DATAMSB 3 0x03 D15 D14 D13 D12 D11 D10 D9 D8 0x00 RO
ID 15 0x0F BOUT RESERVED 1 0 1 RESERVED 1x101xxx RW
TABLE 3. DECIMAL TO HEXADECIMAL
DIVISION QUOTIENT REMINDER HEX NUMBER
175/16 10 = A 15 = F 0xAF
TABLE 4. COMMAND-I REGISTER ADDRESS
NAME
ADDR
(HEX)
REGISTER BITS DFLT
(HEX)B7 B6 B5 B4 B3 B2 B1 B0
COMMAND-I 0x00 OP2 OP1 OP0 RESERVED 0x00
ISL29034
FN8370 Rev 2.00 Page 10 of 14
August 19, 2016
Command-II Register (Address: 0x01)
The Command-II register consists of ADC control bits. In this
register, there are two range bits and two ADC resolution bits.
The default register value is 0x00 at power-on.
FULL SCALE LUX RANGE [B1:B0]
The full scale Lux range has four different selectable ranges. The
range determines the full scale Lux range (1k, 4k, 16k, and 64k).
Each range has a maximum allowable Lux value. Table 7 lists the
possible values of FSR.
Integration Time ADC Resolution [B3:B2]
B2 and B3 determine the ADC’s resolution and the number of
clock cycles per conversion. Changing the number of clock cycles
does more than just change the resolution of the device; it also
changes the integration time, which is the period the device’s
Analog-to-Digital (A/D) converter samples the photodiode current
signal for a measurement. Table 8 lists the possible ADC
resolution. Only 16 bit ADC resolution can reject better
50Hz/60Hz noise flickering light source.
.
Integration Time
Data Registers (Addresses: 0x02 and 0x03)
The ISL29034 has two 8-bit read-only registers to hold the upper
and lower byte of the ADC value. The Upper byte is accessed at
Address 0x03 and the Lower byte is accessed at Address 0x02.
For 16-bit resolution, the data is from D0 to D15; for 12-bit
resolution, the data is from D0 to D11; for 8-bit resolution, the
data is from D0 to D7 and for 4-bit resolution, the data is from
D0 to D3. The registers are refreshed after every conversion
cycle. The default register value is 0x00 at power-on.
ID Register (Address: 0x0F)
The ID register has three different types of information.
TABLE 5. OPERATING MODES BITS
B7 B6 B5 OPERATION
0 0 0 Power-down the device (Default)
0 0 1 The device measures ALS only once every integration
cycle. This is the lowest operating mode. (Note 11)
010IR once
0 1 1 Reserved (Do Not Use)
1 0 0 Reserved (Do Not Use)
1 0 1 Measures ALS continuously
1 1 0 Measures IR continuous
1 1 1 Reserved (Do Not Use)
NOTE:
11. Intersil does not recommend using this mode
TABLE 6. COMMAND-II REGISTER BITS
NAME
REG.
ADDR
(HEX)
REGISTER BITS
DFLT
(HEX)B7 B6 B5 B4 B3 B2 B1 B0
COMMAND
-II
0x01 RESERVED RES
1
RES
0
RANGE
1
RANGE
0
0x00
TABLE 7. RANGE REGISTER BITS
RANGE
SELECTION B1 B0
FULL SCALE LUX RANGE
(LUX)
0 0 0 1,000
1 0 1 4,000
2 1 0 16,000
3 1 1 64,000
TABLE 8. ADC RESOLUTION DATA WIDTH
B3 B2 NUMBER OF CLOCK CYCLES n-BIT ADC
002
16 = 65,536 16
012
12 = 4,096 12
102
8 = 256 8
112
4 = 16 4
TABLE 9. INTEGRATION TIME OF n-BIT ADC
n # ADC BITS INTEGRATION TIME (ms)
4 0.022
8 0.352
12 5.6
16 105
TABLE 10. ADC REGISTER BITS
NAME
Reg.
Addr
(HEX)
REGISTER BITS
DFLT
(HEX)B7 B6 B5 B4 B3 B2 B1 B0
DATALSB 0x02 D7 D6 D5 D4 D3 D2 D1 D0 0x00
DATAMSB 0x03 D15 D14 D13 D12 D11 D10 D9 D8 0x00
TABLE 11. ADC DATA REGISTERS
ADDRESS
(HEX) CONTENTS
0x02 D0 is LSB for 4-, 8-, 12- or 16-bit resolution; D3 is MSB for
4-bit resolution; D7 is MSB for 8-bit resolution
0x03 D15 is MSB for 16-bit resolution; D11 is MSB for 12-bit
resolution
TABLE 12. ID REGISTER BITS
NAME
ADDR
(HEX)
REGISTER BITS
DFLTB7 B6 B5 B4 B3 B2 B1 B0
ID 0x0F BOUT RESERVED 1 0 1 RESERVED 1x101xxx
ISL29034
FN8370 Rev 2.00 Page 11 of 14
August 19, 2016
RESERVED BITS [B2:B0] AND [B6]
All RESERVED bits on the ISL29034 are Intersil used bits only.
Bit0 to Bit2 and Bit6 are RESERVED bits where their value might
change without any notification to the user. It is advised when
using the identification bits to identify the device in a syste, the
software should mask the Bit0 to Bit2 and Bit6 to Bit7 to properly
identify the device.
DEVICE ID BITS [B5:B3]
The ISL29034 provides 3 bits to identify the device in a system.
These bits are located on register address 0x0F, Bit3 to Bit5. The
identification bit value for the ISL29034 is xx101xxx. The device
identification bits are read only bits. It is important to notice that
Bit7 is a status bit for Brownout Condition (BOUT).
BROWNOUT STATUS BIT TO BOUT [B7]
Bit7 on register address 0x0F is a status bit for Brownout
Condition (BOUT). The default value of this bit is “BOUT = 1”
during the initial power-up, which indicates the device may
possibly have gone through a brownout condition. Therefore, the
status bit should be reset to “BOUT = 0” by an I2C write command
during the initial configuration of the device.
The default register value is 0xA8 at power-on.
Applications Information
Figure 15 is a normalized spectral response of various types of
light sources for reference.
Calculating Lux
The ISL29034’s ADC output codes, DATA, are directly
proportional to Lux in the ambient light sensing.
Where Ecal is the calculated Lux reading. The constant is
determined by the full-scale range and the ADC’s maximum
output counts. The constant is independent of the light sources
(fluorescent, incandescent and sunlight) because the light
sources IR component is removed during the light signal process.
The constant can also be viewed as the sensitivity (the smallest
Lux measurement the device can measure).
Where, Range is defined in Table 7 on page 10. Countmax is the
maximum output counts from the ADC.
The transfer function used for n-bits ADC becomes:
Where n = 4, 8, 12 or 16. This is the number of ADC bits
programmed in the command register. 2n represents the
maximum number of counts possible from the ADC output. Data is
the ADC output stored in the data registers (02 hex and 03 hex).
Enhancing EV Accuracy
The device has on-chip passive optical filter designed to block
(reject) most of the incident Infra Red. However, EV
measurement may be vary under differing IR-content light
sources. In order to optimize the measurement variation
between differing IR-content light sources, ISL29034 provides IR
channel, which is programmed at COMMAND-1 (Reg0x0) to
measure the IR level of differing IR-content light sources.
The ISL29034’s ADC output codes, DATA, are directly
proportional to the IR intensity received in the IR sensing.
Then EV accuracy can be found in Equation 5:
Here, DATAEV is the received ambient light intensity ADC output
codes. K is a resolution of visible portion. Its unit is Lux/count.
The typical value of K is 0.82. DATAIR is the received IR intensity.
The constant changes with the spectrum of background IR,
such as A, F2 and D65 (Notes 8, 9 and 10). The also changes
with the ADC’s range and resolution selections. A typical for
Range1 and Range2 is -11292.86 and Range3 and Range4 is
2137.14 without IR tinted glass.
Noise Rejection
Electrical AC power worldwide is distributed at either 50Hz or
60Hz. Artificial light sources vary in intensity at the AC power
frequencies. The undesired interference frequencies are infused
on the electrical signals. This variation is one of the main sources
of noise for the light sensors. Integrating type ADC’s have
excellent noise-rejection characteristics for periodic noise
sources whose frequency is an integer multiple of the conversion
rate. By setting the sensor’s integration time to an integer
multiple of periodic noise signal, the performance of an ambient
light sensor can be improved greatly in the presence of noise. In
order to reject the AC noise, the integration time of the sensor
must to adjusted to match the AC noise cycle. For instance, a
60Hz AC unwanted signal’s sum from 0ms to k*16.66ms
(k = 1,2...ki) is zero. Similarly, setting the device’s integration
time to be an integer multiple of the periodic noise signal, greatly
improves the light sensor output signal in the presence of noise.
FIGURE 15. NORMALIZED SPECTRAL RESPONSE OF LIGHT SOURCES
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1.0
350 550 750 950
WAVELENGTH (nm)
NORMALIZED INTENSITY
FLUORESCENT
SUN
INCAND.
HALOGEN
Ecal DATA=(EQ. 1)
Range
Countmax
----------------------------
=(EQ. 2)
(EQ. 3)
Ecal
Range
2n
------------------- DATA=
DATAIR EIR
=(EQ. 4)
EVAccuracy KxDATAEV DATAIR
+= (EQ. 5)
ISL29034
FN8370 Rev 2.00 Page 12 of 14
August 19, 2016
Suggested PCB Footprint
It is important that users check TB477 “Surface Mount Assembly
Guidelines for Optical Dual Flat Pack No Lead (ODFN) Package”
before starting ODFN product board mounting.
Board Mounting Considerations
For applications requiring the light measurement, the board
mounting location should be reviewed. The device uses an
Optical Dual Flat Pack No Lead (ODFN) package, which subjects
the die to mild stresses when the printed circuit (PC) board is
heated and cooled, which slightly changes the shape. Because of
these die stresses, placing the device in areas subject to slight
twisting can cause degradation of reference voltage accuracy. It
is normally best to place the device near the edge of a board, or
on the shortest side, because the axis of bending is most limited
in that location.
Layout Considerations
The ISL29034 is relatively insensitive to layout. Like other I2C
devices, it is intended to provide excellent performance even in
significantly noisy environments. There are only a few
considerations that will ensure best performance.
Route the supply and I2C traces as far as possible from all
sources of noise. Use two power-supply decoupling capacitors,
1µF and 0.1µF, placed close to the device.
Soldering Considerations
Convection heating is recommended for reflow soldering;
direct-infrared heating is not recommended. The plastic ODFN
package does not require a custom reflow soldering profile and is
qualified to +260°C. A standard reflow soldering profile with a
+260°C maximum is recommended.
Temperature Coefficient
The limits stated for Temperature Coefficient (TC) are governed
by the method of measurement. The “Box” method is usually
used for specifying the temperature coefficient. The
overwhelming standard for specifying the temperature drift of a
reference is to evaluate the maximum voltage change over the
specified temperature range. This yields ppm/°C, and is
calculated using Equation 4:
Where:
VHIGH is the maximum reference voltage over the temperature
range.
VLOW is the minimum reference voltage over the temperature
range.
VNOMINAL is the nominal reference voltage at +25°C.
THIGH - TLOW is the specified temperature range (°C).
Digital Inputs and Termination
The ISL29034 digital inputs are guaranteed to CMOS levels. The
internal register is updated on the rising edge of the clock.
To minimize reflections, proper termination should be
implemented. If the lines driving the clock and the digital inputs
are 50Ω lines, then 50Ω termination resistors should be placed
as close to the sensor inputs as possible, connected to the digital
ground plane (if separate grounds are used).
Typical Circuit
A typical application for the ISL29034 is shown in Figure 16. The
ISL29034’s I2C address is internally hard-wired as 1000100. The
device can be tied onto a system’s I2C bus together with other I2C
compliant devices.
(EQ. 6)
TC
VHIGH VLOW
–
VNOMINAL THIGH TLOW
–
---------------------------------------------------------------------------------- 106
=
FIGURE 16. ISL29034 TYPICAL CIRCUIT FIGURE 17. 4 LD ODFN SENSOR LOCATION OUTLINE
ISL29034
MCU
1µF
SCL
SDA
1
2
3
VDD
SCL
SDA
VDD
4
GND
VDD_PULLUP
4.7k
4.7k
100
FN8370 Rev 2.00 Page 13 of 14
August 19, 2016
ISL29034
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in the quality certifications found at www.intersil.com/en/support/qualandreliability.html
Intersil products are sold by description only. Intersil may modify the circuit design and/or specifications of products at any time without notice, provided that such
modification does not, in Intersil's sole judgment, affect the form, fit or function of the product. Accordingly, the reader is cautioned to verify that datasheets are
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Revision History The revision history provided is for informational purposes only and is believed to be accurate, however, not
warranted. Please go to web to make sure you have the latest revision.
DATE REVISION CHANGE
August 19, 2016 FN8370.2 - Figure 2 on page 1: Updated y-axis titles.
- On page 4: Added typical value of VOL (0.06)
- On page 6: Corrected Figure 5 graph and label, corrected graph of Figure 6, corrected Figure 8 label (removed
under F2 light source).
- Added table of “key differences” on page 1.
- Updated the L4.1.5x1.3 Package Outline Drawing to the latest revision:
Tiebar Note updated
From: Tiebar shown (if present) is a non-functional feature.
To: Tiebar shown (if present) is a non-functional feature and may be located on any of the 4 sides (or ends).
April 9, 2014 FN8370.1 Initial Release
ISL29034
FN8370 Rev 2.00 Page 14 of 14
August 19, 2016
Package Outline Drawing
L4.1.5x1.3
4 LD 1.5X1.3 OPTICAL DUAL FLAT NO-LEAD (ODFN)
Rev 6, 4/15
BOTTOM VIEW
DETAIL "X"
SIDE VIEW
TYPICAL RECOMMENDED LAND PATTERN
TOP VIEW
4
3
1
2
1
3
4
2
(4X) 0.10
INDEX AREA
PIN 1
A
BPIN #1
3X 0 . 40 ± 0 . 10
B0.10 M AC
C
SEATING PLANE
BASE PLANE
0.08
0.10
SEE DETAIL "X"
C
C
0 . 00 MIN.
0 . 05 MAX.
0 . 2 REF
C5
6
6
1.30
1.50
0.50
0.25 ±0.07
(0.55)
(0.50)
(1.30)
(4 x 0.25)
(3x0.60)
0.70 ±0.05
(0.55)
INDEX AREA
4
(0.75)
located within the zone indicated. The pin #1 identifier may be
Unless otherwise specified, tolerance : Decimal ± 0.05
The configuration of the pin #1 identifier is optional, but must be
between 0.18mm and 0.32mm from the terminal tip.
Dimension applies to the metallized terminal and is measured
Dimensions in ( ) for Reference Only.
Dimensioning and tolerancing conform to AMSE Y14.5m-1994.
6.
either a mold or mark feature.
3.
5.
4.
2.
Dimensions are in millimeters.1.
NOTES:
This package not defined by JEDEC, but MO-229 can be used as7.
a general reference.
Tiebar shown (if present) is a non-functional feature and may
be located on any of the 4 sides (or ends).