HD74AC107/HD74ACT107
Dual JK Flip-Flop (with Separate Clear and Clock)
ADE-205-363 (Z)
1st. Edition
Sep. 2000
Description
The HD74AC107/HD74ACT107 dual JK master/slave flip-flops have a separate clock for each flip-flop.
Inputs to the master section are controlled by the clock pulse. The clock pulse also regulates the state of the
coupling transistors which connect the master and slave sections. The sequence of operation is as follows:
1) isolate slave from master; 2) enter information from J and K inputs to master; 3) disable J and K inputs;
4) transfer information from master to slave.
Features
• Outputs Source/Sink 24 mA
• HD74ACT107 has TTL-Compatible Inputs
Pin Arrangement
1
2
3
4
5
6
7
J1
Q1
Q1
K1
Q2
Q2
GND
VCC
CD1
CP1
K2
CD2
CP2
J2
14
13
12
11
10
9
8
(Top view)
HD74AC107/HD74ACT107
2
Logic Symbol
1J1Q1
Q1
K1
CP1
CD1
J2Q2
Q2
K2
CP2
CD2
38
9
112
6
5
12
4
13 10
VCC = Pin14
GND = Pin7
Pin Names
J1, J2, K1, K2Data Inputs
CP1, CP2Clock Pulse Inputs (Active Falling Edge)
CD1, CD2 Direct Clear Inputs (Active Low)
Q1, Q2, Q1, Q 2 Outputs
Truth Table
Inputs Outputs
@ tn@ tn + 1
JK Q
LL Qn
LH L
HL H
HH Qn
H : High Voltage Level
L : Low Voltage Level
tn: Bit time before clock pulse.
tn + 1 : Bit time after clock pulse.
HD74AC107/HD74ACT107
3
Logic Diagram
CD
CP
CP
CP
CP
Q
Q
#CP
#CP
#CP
#CP
CP
CP
CP
J
K
DC Characteristics (unless otherwise specified)
Item Symbol Max Unit Condition
Maximum quiescent supply current ICC 40 µAV
IN = VCC or ground, VCC = 5.5 V,
Ta = Worst case
Maximum quiescent supply current ICC 4.0 µAV
IN = VCC or ground, VCC = 5.5 V,
Ta = 25°C
Maximum additional ICC/input
(HD74ACT107) ICCT 1.5 mA VIN = VCC – 2.1 V, VCC = 5.5 V
Ta = Worst case
HD74AC107/HD74ACT107
4
AC Characteristics: HD74AC107
Ta = +25°C
CL = 50 pF Ta = –40°C to +85°C
CL = 50 pF
Item Symbol VCC (V)*1Min Typ Max Min Max Unit
Maximum clock fmax 3.3 125 — — 100 — MHz
frequency 5.0 150 — — 125 —
Propagation delay tPLH 3.3 1.0 9.5 13.0 1.0 14.0 ns
CP to Q or Q5.0 1.0 7.5 10.0 1.0 11.0
Propagation delay tPHL 3.3 1.0 10.0 13.5 1.0 14.5 ns
CP to Q or Q5.0 1.0 8.0 10.5 1.0 11.5
Propagation delay tPLH 3.3 1.0 9.5 13.0 1.0 14.0 ns
CD to Q5.0 1.0 7.5 10.0 1.0 11.0
Propagation delay tPHL 3.3 1.0 9.5 13.0 1.0 14.0 ns
CD to Q5.0 1.0 7.5 10.0 1.0 11.0
Note: 1. Voltage Range 3.3 is 3.3 V ± 0.3 V
Voltage Range 5.0 is 5.0 V ± 0.5 V
Operating Requirements: HD74AC107
Ta = +25°C
CL = 50 pF
Ta = –40°C
to +85°C
CL = 50 pF
Item Symbol VCC (V)*1Typ Guaranteed Minimum Unit
Setup time tsu 3.3 3.0 5.5 6.0 ns
J or k to CP5.0 2.0 4.0 4.5
Hold time th3.3 –1.5 0.0 0.0
CP to J or k 5.0 –0.5 0.0 0.0
Pulse width tw3.3 2.0 5.5 7.0
CP or CD5.0 2.0 4.5 5.0
Recovery time trec 3.3 1.5 3.0 3.0
CD to CP5.0 1.0 3.0 3.0
Note: 1. Voltage Range 3.3 is 3.3 V ± 0.3 V
Voltage Range 5.0 is 5.0 V ± 0.5 V
HD74AC107/HD74ACT107
5
AC Characteristics: HD74ACT107
Ta = +25°C
CL = 50 pF Ta = –40°C to +85°C
CL = 50 pF
Item Symbol VCC (V)*1Min Typ Max Min Max Unit
Maximum clock
frequency fmax 5.0 100 — — 80 — MHz
Propagation delay
CP to Q or QtPLH 5.0 1.0 9.5 12.5 1.0 13.5 ns
Propagation delay
CP to Q or QtPHL 5.0 1.0 10.5 13.0 1.0 14.0
Propagation delay
CD to QtPLH 5.0 1.0 8.5 11.0 1.0 12.0
Propagation delay
CD to Q tPHL 5.0 1.0 8.5 11.0 1.0 12.0
Note: 1. Voltage Range 5.0 is 5.0 V ± 0.5 V
Operating Requirements: HD74ACT107
Ta = +25°C
CL = 50 pF
Ta = –40°C
to +85°C
CL = 50 pF
Item Symbol VCC (V)*1Typ Guaranteed Minimum Unit
Setup time
J or k to CP
tsu 5.0 2.5 7.0 8.0 ns
Hold time
CP to J or k th5.0 0.0 1.5 1.5
Pulse width
CP or CD
tw5.0 4.5 7.0 8.0
Recovery time
CD to CP
trec 5.0 — 3.0 3.0
Note: 1. Voltage Range 5.0 is 5.0 V ± 0.5 V
Capacitance
Item Symbol Typ Unit Condition
Input capacitance CIN 4.5 pF VCC = 5.5 V
Power dissipation capacitance CPD 35.0 pF VCC = 5.0 V
HD74AC107/HD74ACT107
6
Package Dimensions
Hitachi Code
JEDEC
EIAJ
Mass
(reference value)
DP-14
Conforms
Conforms
0.97 g
Unit: mm
7.62
0.25
0° – 15°
19.20
20.32 Max
1
814
7
1.30
2.54 ± 0.25 0.48 ± 0.10
6.30
7.40 Max
0.51 Min
2.54 Min 5.06 Max
+ 0.10
– 0.05
2.39 Max
Hitachi Code
JEDEC
EIAJ
Mass
(reference value)
FP-14DA
—
Conforms
0.23 g
Unit: mm
*Dimension including the plating thickness
Base material dimension
*0.22 ± 0.05
*0.42 ± 0.08
0.70 ± 0.20
0.12
0.15
0° – 8°
M
0.10 ± 0.10
2.20 Max
5.5
10.06
1.42 Max
14 8
17
10.5 Max
+ 0.20
– 0.30
7.80
1.15
1.27
0.40 ± 0.06
0.20 ± 0.04
HD74AC107/HD74ACT107
7
Hitachi Code
JEDEC
EIAJ
Mass
(reference value)
FP-14DN
Conforms
Conforms
0.13 g
Unit: mm
0° – 8°
1.27
14 8
17
0.15
0.25
M
1.75 Max 3.95
*0.20 ± 0.05
8.65
9.05 Max
*0.40 ± 0.06
0.14
+ 0.11
– 0.04
0.635 Max 6.10
+ 0.10
– 0.30
0.60
+ 0.67
– 0.20
1.08
*Pd plating
HD74AC107/HD74ACT107
8
Cautions
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copyright, trademark, or other intellectual property rights for information contained in this document.
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intellectual property rights, in connection with use of the information contained in this document.
2. Products and product specifications may be subject to change without notice. Confirm that you have
received the latest product standards or specifications before final design, purchase or use.
3. Hitachi makes every attempt to ensure that its products are of high quality and reliability. However,
contact Hitachi’s sales office before using the product in an application that demands especially high
quality and reliability or where its failure or malfunction may directly threaten human life or cause risk
of bodily injury, such as aerospace, aeronautics, nuclear power, combustion control, transportation,
traffic, safety equipment or medical equipment for life support.
4. Design your application so that the product is used within the ranges guaranteed by Hitachi particularly
for maximum rating, operating supply voltage range, heat radiation characteristics, installation
conditions and other characteristics. Hitachi bears no responsibility for failure or damage when used
beyond the guaranteed ranges. Even within the guaranteed ranges, consider normally foreseeable
failure rates or failure modes in semiconductor devices and employ systemic measures such as fail-
safes, so that the equipment incorporating Hitachi product does not cause bodily injury, fire or other
consequential damage due to operation of the Hitachi product.
5. This product is not designed to be radiation resistant.
6. No one is permitted to reproduce or duplicate, in any form, the whole or part of this document without
written approval from Hitachi.
7. Contact Hitachi’s sales office for any questions regarding this document or Hitachi semiconductor
products.
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Tel: Tokyo (03) 3270-2111 Fax: (03) 3270-5109
Copyright Hitachi, Ltd., 2000. All rights reserved. Printed in Japan.
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