©2004 Fairchild Semiconductor Corporation Rev. A, March 2004
FQP9N25C/FQPF9N25C
QFET®
FQP9N25C/FQPF9N25C
250V N-Channel MOSFET
General Description
These N-Channel enhancement mode power field effect
transistors are produced using Fairchild’s proprietary,
planar stripe, DMOS technology.
This advanced technology has been especially tailored to
minimize on-state resistance, provide superior switching
performance, and withstand high energy pulse in the
avalanche and commutation mode. These devices are well
suited for high efficiency switching DC/DC converters,
switch mode power supplies, DC-AC converters for
uninterrupted power supplies and motor controls.
Features
8.8A, 250V, RDS(on) = 0.43 @VGS = 10 V
Low gate charge ( typical 26.5 nC)
Low Crss ( typical 45.5 pF)
•Fast switching
100% avalanche tested
Improved dv/dt capability
Absolute Maximum Ratings TC = 25°C unless otherwise noted
* Drain current limited by maximum junction temperature.
Thermal Characteristics
Symbol Parameter FQP9N25C FQPF9N25C Units
VDSS Drain-Source Voltage 250 V
IDDrain Current - Continuous (TC = 25°C) 8.8 8.8 * A
- Continuous (TC = 100°C) 5.6 5.6 * A
IDM Drain Current - Pulsed (Note 1) 35.2 35.2 * A
VGSS Gate-Source Voltage ± 30 V
EAS Single Pulsed Avalanche Energy (Note 2) 285 mJ
IAR Avalanche Current (Note 1) 8.8 A
EAR Repetitive Avalanche Energy (Note 1) 7.4 mJ
dv/dt Peak Diode Recovery dv/dt (Note 3) 5.5 V/ns
PDPower Dissipation (TC = 25°C) 74 38 W
- Derate above 25°C 0.59 0.3 W/°C
TJ, TSTG Operating and Storage Temperature Range -55 to +150 °C
TL
Maximum lead temperature for soldering purposes,
1/8" from case for 5 seconds 300 °C
Symbol Parameter FQP9N25C FQPF9N25C Units
RθJC Thermal Resistance, Junction-to-Case 1.69 3.29 °C/W
RθJS Thermal Resistance, Case-to-Sink Typ. 0.5 -- °C/W
RθJA Thermal Resistance, Junction-to-Ambient 62.5 62.5 °C/W
TO-220
FQP Series
GS
DTO-220F
FQPF Series
GS
D
{
{
{
{
{
{
S
D
G
Rev. A, March 2004
FQP9N25C/FQPF9N25C
©2004 Fairchild Semiconductor Corporation
Electrical Characteristics TC = 25°C unless otherwise noted
Notes:
1. Repetitive Rating : Pulse width limited by maximum junction temperature
2. L = 5.9mH, IAS = 8.8A, VDD = 50V, RG = 25 Ω, Starting TJ = 25°C
3. ISD 8.8A, di/dt 300A/µs, VDD BVDSS, Starting TJ = 25°C
4. Pulse Test : Pulse width 300µs, Duty cycle 2%
5. Essentially independent of operating temperature
Symbol Parameter Test Conditions Min Typ Max Units
Off Characteristics
BVDSS Drain-Source Breakdown Voltage VGS = 0 V, ID = 250 µA250 -- -- V
BVDSS
/ TJ
Breakdown Voltage Temperature
Coefficient ID = 250 µA, Referenced to 25°C -- 0.30 -- V/°C
IDSS Zero Gate Voltage Drain Current VDS = 250 V, VGS = 0 V -- -- 10 µA
VDS = 200 V, TC = 125°C -- -- 100 µA
IGSSF Gate-Body Leakage Current, Forward VGS = 30 V, VDS = 0 V -- -- 100 nA
IGSSR Gate-Body Leakage Current, Reverse VGS = -30 V, VDS = 0 V -- -- -100 nA
On Characteristics
VGS(th) Gate Threshold Voltage VDS = VGS, ID = 250 µA2.0 -- 4.0 V
RDS(on) Static Drain-Source
On-Resistance VGS = 10 V, ID = 4.4 A -- 0.35 0.43
gFS Forward Transconductance VDS = 40 V, ID = 4.4 A (Note 4) -- 7.0 -- S
Dynamic Characteristics
Ciss Input Capacitance VDS = 25 V, VGS = 0 V,
f = 1.0 MHz
-- 545 710 pF
Coss Output Capacitance -- 115 150 pF
Crss Reverse Transfer Capacitance -- 45.5 60 pF
Switching Characteristics
td(on) Turn-On Delay Time VDD = 125 V, ID = 8.8 A,
RG = 25
(Note 4, 5)
-- 15 40 ns
trTurn-On Rise Time -- 85 180 ns
td(off) Turn-Off Delay Time -- 90 190 ns
tfTurn-Off Fall Time -- 65 140 ns
QgTotal Gate Charge VDS = 200 V, ID = 8.8 A,
VGS = 10 V
(Note 4, 5)
-- 26.5 35 nC
Qgs Gate-Source Charge -- 3.5 -- nC
Qgd Gate-Drain Charge -- 13.5 -- nC
Drain-Source Diode Characteristics and Maximum Ratings
ISMaximum Continuous Drain-Source Diode Forward Current -- -- 8.8 A
ISM Maximum Pulsed Drain-Source Diode Forward Current -- -- 35.2 A
VSD Drain-Source Diode Forward Voltage VGS = 0 V, IS = 8.8 A -- -- 1.5 V
trr Reverse Recovery Time VGS = 0 V, IS = 8.8 A,
dIF / dt = 100 A/µs (Note 4)
-- 218 -- ns
Qrr Reverse Recovery Charge -- 1.58 -- µC
Rev. A, March 2004©2004 Fairchild Semiconductor Corporation
FQP9N25C/FQPF9N25C
0 5 10 15 20 25 30
0
2
4
6
8
10
12
VDS = 125V
VDS = 50V
VDS = 200V
Note : ID = 8.8A
VGS, Gate-Source Voltage [V]
QG, Total Gate Charge [nC]
10-1 100101
0
500
1000
1500
2000
Ciss = Cgs + Cgd (Cds = shorted)
Coss = Cds + Cgd
Crss = Cgd
Notes :
1. VGS = 0 V
2. f = 1 MHz
Crss
Coss
Ciss
Capacitance [pF]
VDS, Drain-Source Voltage [V]
0.2 0.4 0.6 0.8 1.0 1.2 1.4
10-1
100
101
150
Notes :
1. VGS = 0V
2. 250µ s Pulse Test
25
IDR, Reverse Drain Current [A]
VSD, Source-Drain voltage [V]
0102030
0.00
0.25
0.50
0.75
1.00
1.25
VGS = 20V
VGS = 10V
Note : TJ = 25
RDS(ON) [],
Drain-Source On-Resistance
ID, Drain Current [A]
246810
10-1
100
101
150oC
25oC-55oC
Notes :
1. VDS = 40V
2. 250µ s Pulse Test
ID, Drain Current [A]
VGS, Gate-Source Voltage [V]
10-1 100101
10-1
100
101
VGS
Top : 15.0 V
10.0 V
8.0 V
7.0 V
6.5 V
6.0 V
5.5 V
5.0 V
Bottom : 4.5 V
Notes :
1. 250µ s Pulse Test
2. TC = 25
ID, Drain Current [A]
VDS, Drain-Source Voltage [V]
Typical Characteristics
Figure 5. Capacitance Characteristics Figure 6. Gate Charge Characteristics
Figure 3. On-Resistance Variation vs
Drain Current and Gate Voltage
Figure 4. Body Diode Forward Voltage
Variation with Source Current
and Temperature
Figure 2. Transfer CharacteristicsFigure 1. On-Region Characteristics
Rev. A, March 2004
FQP9N25C/FQPF9N25C
©2004 Fairchild Semiconductor Corporation
100101102
10-1
100
101
102
10 µs
10 ms
100 µs
DC
1 ms
Operation in This Area
is Limited by R DS(on)
Notes :
1. TC = 25 oC
2. TJ = 150 oC
3. Single Pulse
ID, Drain Current [A]
VDS, Drain-Source Voltage [V]
100101102
10-1
100
101
102
10 ms
100 µs
DC
1 ms
Operation in This Area
is Limited by R DS(on)
Notes :
1. TC
= 25 o
C
2. TJ = 150 oC
3. Single Pulse
ID, Drain Current [A]
V
DS, Drain-Source Voltage [V]
25 50 75 100 125 150
0
2
4
6
8
10
ID, Drain Current [A]
TC, Case Temperature [ ]
-100 -50 0 50 100 150 200
0.0
0.5
1.0
1.5
2.0
2.5
3.0
Notes :
1. VGS = 10 V
2. ID
= 4.4 A
RDS(ON), (Normalized)
Drain-Source On-Resistance
TJ, Junction Temperature [oC]
-100 -50 0 50 100 150 200
0.8
0.9
1.0
1.1
1.2
Notes :
1. VGS = 0 V
2. ID
= 250 µ A
BVDSS, (Normalized)
Drain-Source Breakdown Voltage
T
J, Junction Temperature [oC]
Typical Characteristics (Continued)
Figure 9-1. Maximum Safe Operating Area
for FQP9N25C
Figure 10. Maximum Drain Current
vs Case Temperature
Figure 7. Breakdown Voltage Variation
vs Temperature
Figure 8. On-Resistance Variation
vs Temperature
Figure 9-2. Maximum Safe Operating Area
for FQPF9N25C
Rev. A, March 2004
FQP9N25C/FQPF9N25C
©2004 Fairchild Semiconductor Corporation
10-5 10-4 10-3 10-2 10-1 100101
10-2
10-1
100
N o te s :
1. Z θJC (t) = 3.29 /W Max.
2. D uty F ac tor, D = t1/t2
3. T JM - T C = PDM * ZθJC (t)
sin g le p uls e
D=0.5
0.02
0.2
0.05
0.1
0.01
ZθJC(t), Thermal Response
t1, Square W ave Pulse Duration [sec]
10-5 10-4 10-3 10-2 10-1 100101
10-2
10-1
100
N ote s :
1. Z θJC (t) = 1 .6 9 /W M a x.
2. D u ty F a cto r, D = t1/t2
3. T JM - T C = PDM * Z θJC(t)
single pulse
D=0.5
0.02
0.2
0.05
0.1
0.01
ZθJC(t), Thermal Response
t1, Square W ave Pulse Duration [sec]
Typical Characteristics (Continued)
Figure 11-1. Transient Thermal Response Curve for FQP9N25C
Figure 11-2. Transient Thermal Response Curve for FQPF9N25C
t1
PDM
t2
t1
PDM
t2
Rev. A, March 2004
FQP9N25C/FQPF9N25C
©2004 Fairchild Semiconductor Corporation
Gate Charge Test Circuit & Waveform
Resistive Switching Test Circuit & Waveforms
Unclamped Inductive Switching Test Circuit & Waveforms
Charge
VGS
10V
Qg
Qgs Qgd
3mA
VGS
DUT
VDS
300nF
50KΩ
200nF
12V
Same Type
as DUT
Charge
VGS
10V
Qg
Qgs Qgd
3mA
VGS
DUT
VDS
300nF
50KΩ
200nF
12V
Same Type
as DUT
VGS
VDS
10%
90%
td(on) tr
ton toff
td(off) tf
VDD
10V
VDS
RL
DUT
RG
VGS
VGS
VDS
10%
90%
td(on) tr
ton toff
td(off) tf
VDD
10V
VDS
RL
DUT
RG
VGS
EAS =LI
AS2
----
2
1--------------------
BVDSS -V
DD
BVDSS
VDD
VDS
BVDSS
t p
VDD
IAS
VDS (t)
ID (t)
Time
10V DUT
RG
L
ID
t p
EAS =LI
AS2
----
2
1
EAS =LI
AS2
----
2
1
----
2
1--------------------
BVDSS -V
DD
BVDSS
VDD
VDS
BVDSS
t p
VDD
IAS
VDS (t)
ID (t)
Time
10V DUT
RG
LL
ID
ID
t p
Rev. A, March 2004
FQP9N25C/FQPF9N25C
©2004 Fairchild Semiconductor Corporation
Peak Diode Recovery dv/dt Test Circuit & Waveforms
DUT
VDS
+
_
Driver
RGSame Type
as DUT
VGS dv/dt controlled by RG
•I
SD controlled by pulse period
VDD
L
ISD
10V
VGS
( Driver )
ISD
( DUT )
VDS
( DUT )
VDD
Body Diode
Forward Voltage Drop
VSD
IFM , Body Diode Forward Current
Body Diode Reverse Current
IRM
Body Diode Recovery dv/dt
di/dt
D = Gate Pulse Width
Gate Pulse Period
--------------------------
DUT
VDS
+
_
Driver
RGSame Type
as DUT
VGS dv/dt controlled by RG
•I
SD controlled by pulse period
VDD
LL
ISD
10V
VGS
( Driver )
ISD
( DUT )
VDS
( DUT )
VDD
Body Diode
Forward Voltage Drop
VSD
IFM , Body Diode Forward Current
Body Diode Reverse Current
IRM
Body Diode Recovery dv/dt
di/dt
D = Gate Pulse Width
Gate Pulse Period
--------------------------
D = Gate Pulse Width
Gate Pulse Period
--------------------------
Rev. A, March 2004
FQP9N25C/FQPF9N25C
©2004 Fairchild Semiconductor Corporation
Package Dimensions
4.50 ±0.20
9.90 ±0.20
1.52 ±0.10
0.80 ±0.10 2.40 ±0.20
10.00 ±0.20
1.27 ±0.10
ø3.60 ±0.10
(8.70)
2.80 ±0.1015.90 ±0.20
10.08 ±0.30 18.95MAX.
(1.70)
(3.70)(3.00)
(1.46)
(1.00)
(45°)
9.20 ±0.2013.08 ±0.20
1.30 ±0.10
1.30 +0.1
0
–0.0
5
0.50 +0.10
–0.05
2.54TYP
[2.54 ±0.20]2.54TYP
[2.54 ±0.20]
TO-220
Dimensions in Millimeters
Rev. A, March 2004
FQP9N25C/FQPF9N25C
©2004 Fairchild Semiconductor Corporation
Package Dimensions (Continued)
(7.00) (0.70)
MAX1.47
(30°)
#1
3.30 ±0.1
0
15.80 ±0.20
15.87 ±0.20
6.68 ±0.20
9.75 ±0.30
4.70 ±0.20
10.16 ±0.20
(1.00x45°)
2.54 ±0.20
0.80 ±0.10
9.40 ±0.20
2.76 ±0.2
0
0.35 ±0.10
ø3.18 ±0.10
2.54TYP
[2.54 ±0.20]2.54TYP
[2.54 ±0.20]
0.50 +0.10
–0.05
TO-220F
Dimensions in Millimeters
©2004 Fairchild Semiconductor Corporation
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY
PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY
LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN;
NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR
CORPORATION.
As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the body,
or (b) support or sustain life, or (c) whose failure to perform
when properly used in accordance with instructions for use
provided in the labeling, can be reasonably expected to
result in significant injury to the user.
2. A critical component is any component of a life support
device or system whose failure to perform can be
reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification Product Status Definition
Advance Information Formative or In
Design
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
Preliminary First Production This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
Obsolete Not In Production This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
Rev. I8
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