AN00-005 Implement 3.3Vdual using AIC1521 and AIC1117 for PCI Supply on IAPC Motherboard Stanley Chen Introduction However, as the PCI 2.2 fully supports the ACPI Today, PCs need to remain constantly connected to power management, a new additional signal was the outside world, but at the same time consume defined as a power source. Which delivers power to minimum power. Even looking "idle", it is still possible the PCI add-in card for generation of power to receive a message from the Internet or an incoming management events when the main power to the card fax or a phone call. The PC must go from "sleep" mode has been turned off by software, that is, 3.3VDUAL (pin to "on" mode automatically, that is, an Instantly #A14) Available PC (IAPC) An IAPC appears to be "off", but it can come back to its Operation Description full ready state within a couple of seconds and The 3.3VDUAL output is intended to power subsystem respond to the waking-up in time and service the such as the computer's PCI (Peripheral Component request. In order to meet these requirements, the Interconnect) slot. 3.3VDUAL is generated by two parts, ACPI (Advanced Configuration and Power Interface) one from VCC3, and the other from 5VSBY. Which is has been defined by Intel, Microsoft, and Toshiba. shown in figure 1. The "sleep" state of an IAPC is called "Suspend to When main power VCC3 is provided, the MOSFET Q1 RAM", also means the state of S3. This is is turned on as a switch, so that input and output are implemented by utilizing: connected. When main power not provided, the power switch AIC1521 is controlled by control logic, then u Split power planes in the system design connecting the AIC1117 LDO output, which is u An auxiliary power sources (VAUX) for dual mode generating regulated 3.3V, as an output, from 5VSBY. power distribution. The MOSFET Q1 must be connected as shown in the figure 1 that is to avoid back-feed. May 2000 1 AN00-005 Q1 VCC3 AIC1117-33CY U2 5VSBY R1 12V VIN 3 GND 1 1K 1 R2 3 1K 2 R3 Q2 5 VOUT 3 GND 2 VIN CTL AIC1521-1 1 + C1 10mF 4 8 R4 10 u u u 4 U3 NC 5 9 S3# C2 220mF 2 NPN 6 C3 PWRGOOD VOUT 3.3V Dual + C4 R3=6.2kW , R4=100kW , C3=0.1mF , C4=0.001mF AIC1117-33 = SOT-223 package AIC1521-1 = SOT-89-5 Figure 1. AIC1117 + AIC1521 IAPC 3.3Vdual for MB solution The state of the switches is controlled by the S3# and PWRGOOD (PWR_OK) lines. Figure 2 below illustrates a simplified block diagram with the truth 0 1 Both 1 0 5VSBY 1 1 VCC3 Table 1 The 3.3Vdual output truth table table in table 1. ATX timing To speak of the power sources for MB, the ATX power is currently the mainstream in PC industry. According to ATX specification 2.03, the Time of PS_ON, PWR_OK, and Germane voltage rails should be as figure 3 below: S3# 0 PWRGOOD 3.3VDUAL from 0 5VSBY 2 AN00-005 Figure 3 Power Supply Timing Time t1 t2 t3 t4 t5 t6 Description Power on time Rise time Power OK delay Power OK rise time AC loss to PWR_OK hold-up time Power-down warning Typical value 500ms 0.1mst220ms 100mst3500ms T410ms T516 ms t61ms t3 is the time which the 3.3V5V and 12V are above the under voltage threshold (usually 95%). And PWROK is pulled high after t3. t6 is the time which PWR_OK is pulled low before 3.3V5V and 12V falls below its under voltage threshold . The power OK delay should be less than 500ms and power OK hold-up time more than 16ms for all of the SPS powers. Basically, those are the most important parameters for 3.3VDUAL output switched between 2 sources. Figure 4 shows once the system wakes up from sleeping (S3) state, the PS_ON is pulled low so that Figure 4 From S3 to S0 the DC output rises after a period of time, that is, power-on time. The following two figures show the relationship between DC output and PS_ON : 3 AN00-005 Figure 5 From S0 to S3 After a while, the PWR_OK rises to logic high that is to indicate the power status of DC output. The power OK delay is to ensure the stability of DC output quality. Note that an important parameter, called Power-down warning, is to pull the PWR_OK low before the failure of DC output, as shown in the two figures below: Figure 7 From S0 to S3 IAPC Application The AIC1521-1 implemented here is a 500mA-power switch, which is originally used as an integrated highside power switch for self-powered and bus-powered USB application. Now it's implemented as a pure switch due to its continuous 800mA current guaranteed for switching the 3.3V LDO output, which is considered as one of the sources of the 3.3Vdual output application in motherboard (IAPC function). However, the AIC1117 implemented here is quite a widespread used LDO in industry, which provides 800mA continuous output current with low dropout and fast transient response. R3,C3,R4, and C4 form a delay function, which causes an overlap between two sources. When one source switches to the other the unacceptable drop by Figure 6 From S3 to S0 the switching would no longer exist, even smaller output capacitor attached. Figure 8 and Figure 9 show the transit from S3 to S0 with 700us delay (R4,C4) and from S0 to S3 with 1ms delay (R3,C3) transitions, respectively, for 300mA output current from an active load (Chroma 63010). 4 AN00-005 Figure 8 From S3 to S0 Figure 9 From S0 to S3 75mV variation is far less than the 5% range of 3.3VDUAL specified. Figure 10 and figure 11 show the transit from S3 to S0 The 800mA capability has already covered the with 700us delay (R4,C4) and from S0 to S3 with 1ms maximum output capibility of 5VSBY (720mA) from ATX delay (R3,C3) transitions, respectively, for 800mA power in application of 800mA. 140mV variation is still output current from an active load (Chroma 63010). under the 5% tolerance. Figure 10 From S3 to S0 Figure 11 From S0 to S3 5 AN00-005 Conclusion Instantly Available recommended. PCs require unique Power Management devices to provide regulated voltage Got any questions? Call AIC for applications assistance. sources and intelligent switches between power References sources. This solution allows motherboard manufactures to meet the power requirement of IAPC for not only providing the outstanding performance but also reducing the total BOM cost, as the components are so easy to get in market. I. AIC1521 data sheet power switch from Analog Integrated Corp. II. AIC1117 data sheet LDO from Analog Integrated Corp. III. IAPC system power delivery requirements and Keeping the output capacitor, which is larger than recommendations Rev1.0 from Intel Corp. 220uF and as close as possible to output node, IV. PCI power management interface specification ensures the stability of the system. It is highly Rev1.1 from PCISIG 6